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TRIPLE 2-WIDE
OA/OAI GATE
SY100S317
FEATURES
■ Max. propagation delay of 900ps
■ IEE min. of –48mA
■ Extended supply voltage option:
VEE = –4.2V to –5.5V
■ Voltage and temperature compensation for improved
noise immunity
■ Internal 75KΩ input pull-down resistors
■ Approximately 40% lower power than Fairchild
■ Function and pinout compatible with Fairchild F100K
■ Available in 24-pin CERPACK and 28-pin PLCC
packages
BLOCK DIAGRAM
E
a
D
1a
D
2a
D
3a
D
4a
E
b
D
1b
D
2b
D
3b
D
4b
E
c
O
a
O
a
O
b
O
b
DESCRIPTION
The SY100S317 is a set of ultra-fast, triple 2-wide OR/
AND gates designed for use in high-performance ECL
systems. This device offers both true and complement
outputs. The inputs on this device have 75KΩ pull-down
resistors.
PIN CONFIGURATIONS
2a
1a
a
D
OaO
6
5
4
O
b
3
O
b
2
V
CCA
1
V
CC
28
V
CC
27
O
D3bD
c
O
c
4b
c
E
EE
V
EbE
a
2618
25
2c
4c
D
D3cD
19
1
3b
4b
2
3
1c
2c
3c
4c
Top View
Flatpack
4
F24-1
5
6
18
17
16
15
14
13
D
4a
D
3a
D
2a
D
1a
O
a
O
a
7248239221021112012
c
c
O
O
CC
V
CCA
V
b
b
O
O
Top View
PLCC
J28-1
4b
1c
D
D
EES
V
EES
V
D4aD3aD
E
a
12
E
b
13
V
EE
14
V
EES
15
E
c
16
D
1b
17
D
2b
1911201021922823724
3b
D
D
D
D
D
D
D
D
1c
D
2c
D
3c
D
4c
O
c
O
c
PIN NAMES
Pin Function
Dna – Dnc Data Inputs (n = 1...4)
Ea – Ec Enable Inputs
Oa – Oc Data Outputs
Oa – Oc Complementary Data Outputs
VEES VEE Substrate
CCA VCCO for ECL Outputs
V
Rev.: G Amendment: /0
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Issue Date: July, 1999
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Micrel
SY100S317
DC ELECTRICAL CHARACTERISTICS
VEE = –4.2V to –5.5V unless otherwise specified, VCC = VCCA = GND
Symbol Parameter Min. Typ. Max. Unit Condition
IIH Input HIGH Current, All Inputs ——200 µAVIN = VIH (Max.)
I
EE Power Supply Current –48 –32 –22 mA Inputs Open
AC ELECTRICAL CHARACTERISTICS
CERPACK
VEE = –4.2V to –5.5V unless otherwise specified, VCC = VCCA = GND
TA = 0°CTA = +25°CTA = +85°C
Symbol Parameter Min. Max. Min. Max. Min. Max. Unit Condition
PLH Propagation Delay 300 1000 300 1000 300 1000 ps
t
tPHL Data to Output
PLH Propagation Delay 300 800 300 800 300 800 ps
t
tPHL Enable to Output
t
TLH Transition Time 300 900 300 900 300 900 ps
tTHL 20% to 80%, 80% to 20%
PLCC
VEE = –4.2V to –5.5V unless otherwise specified, VCC = VCCA = GND
T
A = 0°CTA = +25°CTA = +85°C
Symbol Parameter Min. Max. Min. Max. Min. Max. Unit Condition
PLH Propagation Delay 300 900 300 900 300 900 ps
t
tPHL Data to Output
PLH Propagation Delay 300 700 300 700 300 700 ps
t
tPHL Enable to Output
TLH Transition Time 300 900 300 900 300 900 ps
t
tTHL 20% to 80%, 80% to 20%
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Micrel
TIMING DIAGRAM
SY100S317
INPUT
t
TRUE
OUTPUT
COMPLEMENT
NOTE:
VEE = –4.2V to –5.5V unless otherwise specified, VCC = VCCA = GND
PHL
t
PLH
t
TLH
Propagation Delay and Transition Times
20%
50%
80%
0.7 ± 0.1 ns0.7 ± 0.1 ns
50%
80%
50%
t
PLH
t
PHL
20%
t
THL
–0.95V
–1.69V
PRODUCT ORDERING CODE
Ordering Package Operating
Code Type Range
SY100S317FC F24-1 Commercial
SY100S317JC J28-1 Commercial
SY100S317JCTR J28-1 Commercial
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Micrel
24 LEAD CERPACK (F24-1)
SY100S317
Rev. 03
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Micrel
28 LEAD PLCC (J28-1)
SY100S317
Rev. 03
MICREL-SYNERGY 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA
TEL + 1 (408) 980-9191 FAX + 1 (408) 914-7878 WEB http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or
other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.
© 2000 Micrel Incorporated
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