EXTREMELY HIGH dv /d t C APABILITY GATETO-SOURCE ZENER DIODES
n
100% AVALANCHE TESTED
n
VERY LOW INTRINSIC CAPAC ITANCES
n
GATE CHARGE MINIMIZED
DESCRIPTION
The third generation of MESH O VERLAY™ Power
MOSFETs for very high voltage exhibits unsurpassed on-resistance per unit area while integrating
back-to-back Zener diodes between gate and
source. Such arrangement gives extra ESD capability with higher ruggedness performance as requested by a large variety of single-switch applications.
APPLICATIONS
n
SINGLE-ENDED SMPS IN MONITORS,
COMPUTER AND INDUSTRIAL APPLICATION
n
WELDING EQUIPMENT
TO-247
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
P
TOT
I
GS
V
ESD(G-S)
dv/dt (1)Peak Diode Recovery voltage slope3V/ns
T
stg
T
j
(•)Pu l se width limited by safe operat i ng area
≤6.7A, di/dt ≤100A/µs, VDD ≤ V
(1)I
SD
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
800V
800V
Gate- source Voltage±25V
Drain Current (continuos) at TC = 25°C
Drain Current (continuos) at TC = 100°C
(●)
Drain Current (pulsed)27A
Total Dissipation at TC = 25°C
VDD = 100V, Tj = 150°C
(see test circuit, Figure 5)
33ns
12ns
4358nC
13ns
1.6V
680ns
GATE-SOURCE ZENER DIODE
SymbolParameterTest ConditionsMin.Typ.Max.Unit
BV
GSO
Gate-Source Breakdown
Igs=± 1mA (Open Drain)25V
Voltage
αTVoltage Thermal CoefficientT=25°C Note(3)1.3
I
RzDynamic Resistance
Note: 1. Pulsed: Pu l se duration = 300 µs, duty cycle 1. 5 % .
2. Pulse width li mited by safe operating area .
3. ∆V
= αT (25°-T ) BV
BV
GSO
(25°)
= 20 mA, VGS = 0
D
90Ω
10
-4
/°C
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specif ically been designed to enhanc e not only t he dev ice’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to souce. In this respect the 25V Zener voltage is appropiate to achieve an efficient and
cost-effective intervention to protect the device’s int egrity. These integrated Zener diodes th us avoid the
usage of external components.
3/8
Page 4
STW8NC80Z
Ther m al Imp e danceSafe Operating Area
Output Characteristics
TransconductanceStatic Drain-source On Resistance
Transfer Characteristics
4/8
Page 5
STW8NC80Z
Capacitance VariationsGate Charge vs Gate-source Voltage
Normalized Gate Threshold Volta ge vs Temp.Norma lized On Resistance vs Temperature
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subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
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