This Power MOSFET is thelatestdevelopment of
STMicroelectronicsunique”SingleFeature
Size” strip-basedprocess. The resulting
transistor shows extremely high packing density
forlowon-resistance,ruggedavalanche
characteristics and less critical alignment steps
thereforearemarkablemanufacturing
reproducibility.
Ther mal Resist ance Junction- caseMax
Ther mal Resist ance Junction- ambientMax
Ther mal Resist ance Case-sinkTy p
Maximum Lea d Te mperat ure Fo r S oldering Purpos e
l
Avalanche Current , Repetit i v e or Not -R e petitive
(pulse width limited b y T
Single Pulse Avalanche Energy
AS
(starting T
=25oC, ID=IAR,VDD=30V)
j
max)
j
0.75
30
0.1
300
80A
350mJ
o
C/W
oC/W
o
C/W
o
C
ELECTRICAL CHARACTERISTICS (T
=25oC unlessotherwisespecified)
case
OFF
SymbolParameterTest Cond ition sMin.Typ.Max.Unit
V
(BR)DSS
Drain-sourc e
=250µAVGS=0
I
D
60V
Breakdown Volt age
I
DSS
I
GSS
Zer o G at e Volt age
Drain Current ( V
GS
Gat e-body Le aka ge
Current (V
DS
=0)
=0)
V
=MaxRating
DS
=MaxRatingTc=125oC
V
DS
= ± 20 V
V
GS
1
10
± 100nA
ON (∗)
SymbolParameterTest Cond ition sMin.Typ.Max.Unit
V
GS(th )
Gate Threshold
V
DS=VGSID
=250µA
234V
Voltage
R
DS(on)
Stati c Drain-so urce On
VGS=10V ID=40A8.510mΩ
Resistance
I
D(on)
On St at e Dra in Cur rent VDS>I
D(on)xRDS(on)max
80A
VGS=10V
DYNAMIC
SymbolParameterTest Cond ition sMin.Typ.Max.Unit
g
(∗)Forward
fs
Tr ansconductance
C
C
C
Input Capacit an ce
iss
Out put Capacit ance
oss
Reverse T ransf er
rss
Capa cit an c e
VDS>I
D(on)xRDS(on)maxID
=40 A1938S
VDS=25V f=1MHz VGS= 07600
890
150
10000
1100
200
µA
µA
pF
pF
pF
2/8
Page 3
STW80NE06-10
ELECTRICAL CHARACTERISTICS (continued)
SWITCHINGON
SymbolParameterTest Cond ition sMin.Typ.Max.Unit
t
d(on)
t
r
Turn-on Tim e
Rise T ime
VDD=30VID=40A
=4.7 ΩVGS=10V
R
G
(see test circuit, figure 3)
Q
Q
Q
Total Gate Charge
g
Gat e-Sour ce Charge
gs
Gate-Drain Charge
gd
VDD=48V ID=80A VGS= 10 V140
SWITCHINGOFF
SymbolParameterTest Cond ition sMin.Typ.Max.Unit
t
r(Voff)
t
Of f - voltage Ris e T ime
t
Fall Time
f
Cross-ov er Time
c
VDD=48V ID=40A
=4.7 Ω VGS=10V
R
G
(see test circuit, figure 5)
SOURCE DRAIN DIODE
SymbolParameterTest Cond ition sMin.Typ.Max.Unit
I
SD
I
SDM
V
SD
t
Q
I
RRM
(∗) Pulsed: Pulse duration =300 µs, duty cycle1.5 %
(•) Pulse width limited by safe operating area
Source-drain Current
(•)
Source-drain Current
(pulsed)
(∗)Fo r war d On VoltageISD=80A VGS=01.5V
Reverse Rec overy
rr
Time
Reverse Rec overy
rr
= 80 Adi/dt = 10 0 A /µ s
I
SD
=30VTj=150oC
V
DD
(see test circuit, figure 5)
Charge
Reverse Rec overy
Current
50
15065200
20
50
45
75
130
60
100
170
80
320
100
0.4
8
ns
ns
nC
nC
nC
ns
ns
ns
A
A
ns
µC
A
Safe Operating AreaThermalImpedance
3/8
Page 4
STW80NE06-10
OutputCharacteristics
Transconductance
TransferCharacteristics
StaticDrain-sourceOn Resistance
GateCharge vs Gate-sourceVoltage
4/8
CapacitanceVariations
Page 5
STW80NE06-10
Normalized GateThresholdVoltage vs
Temperature
Source-drainDiode Forward Characteristics
Normalized On Resistancevs Temperature
5/8
Page 6
STW80NE06-10
Fig. 1: UnclampedInductive Load Test Circuit
Fig. 3: SwitchingTimes Test Circuits For
ResistiveLoad
Fig. 2: Unclamped Inductive Waveform
Fig. 4: GateCharge testCircuit
Fig. 5: Test Circuit For InductiveLoad Switching
And Diode RecoveryTimes
Information furnished is believed tobe accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may resultfrom its use. No license is
granted by implication orotherwiseunder any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject tochange without notice. This publication supersedes and replaces allinformation previouslysupplied. STMicroelectronics products
are not authorized for use as critical componentsin life support devices or systems without express written approval of STMicroelectronics.
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The ST logo isa trademarkof STMicroelectronics
1998 STMicroelectronics– Printed in Italy – All Rights Reserved
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.
8/8
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