This PowerMOSFET is the latest developmentof
STMicroelectronicsunique”SingleFeature
Size”strip-basedprocess. The resulting
transistor shows extremely high packing density
forlowon-resistance,ruggedavalanche
characteristics and less critical alignment steps
thereforearemarkablemanufacturing
reproducibility.
APPLICATIONS
■ HIGHCURRENT, HIGH SPEED SWITCHING
■ SOLENOIDAND RELAYDRIVERS
■ MOTORCONTROL, AUDIOAMPLIFIERS
■ DC-DC& DC-ACCONVERTERS
■ AUTOMOTIVEENVIRONMENT(INJECTION,
ABS, AIR-BAG, LAMPDRIVERS,Etc.)
3
2
1
TO-247
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
V
V
I
DM
P
dv/dt (
T
(•) Pulsewidth limited by safeoperating area(1)ISD≤60 A, di/dt ≤ 200 A/µs, VDD≤ V
June 1999
Dra in- sour c e Vol t age (VGS= 0)100V
DS
Dra in- gate Voltage (RGS=20kΩ)100V
DGR
Gat e-source Voltage
GS
I
Dra in Current ( continuous) at Tc=25oC60A
D
I
Dra in Current ( continuous) at Tc=100oC42A
D
20V
±
(•)D rain Cu rr ent ( p uls ed )240A
Tot al Dissipation at Tc=25oC180W
tot
Der ati ng Factor1.2W/
1) Peak Diode Re c overy v olt age slope9V/ns
St orage Tem pe r at ure-65 to 175
stg
T
Max. Operat ing Junct ion Temperature175
j
(BR)DSS,Tj≤TJMAX
o
C
o
C
o
C
1/8
Page 2
STW60NE10
THERMAL DATA
R
thj-case
Rthj-amb
R
thc-sink
T
AVALANCHE CHARACTERISTICS
SymbolParameterMax ValueU nit
I
AR
E
Ther mal Resistanc e Junct ion-caseMax
Ther mal Resistanc e Junct ion-ambientMax
Ther mal Resistanc e Case-sinkTy p
Maximum L ead Tempera tur e For Solder ing Purp ose
l
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
Single Pulse A valanche Energy
AS
(starting T
=25oC, ID=IAR,VDD=35V)
j
max)
j
0.83
30
0.1
300
60A
500mJ
o
C/W
oC/W
o
C/W
o
C
ELECTRICAL CHARACTERISTICS
=25oC unless otherwisespecified)
(T
case
OFF
SymbolParameterTest Condit ionsMin.Typ.Max.Unit
V
(BR)DSS
Drain-source
ID=250µAVGS= 0100V
Break dow n Voltage
I
DSS
I
GSS
Zero Gate Voltage
Drain Current (V
GS
Gat e- bod y Leakage
Current (V
DS
=0)
=0)
V
=MaxRating
DS
=MaxRatingTc= 125oC
V
DS
V
=± 20 V
GS
1
10
100nA
±
ON(∗)
SymbolParameterTest Condit ionsMin.Typ.Max.Unit
V
GS(th)
R
DS(on)
Gate Threshold Voltage VDS=VGSID= 250 µ A234V
Sta t ic Drain-sour ce On
VGS=10V ID= 30 A0.0160.022
Resistance
I
D(on)
On StateDrain Current VDS>I
D(on)xRDS(on )max
60A
VGS=10V
DYNAMIC
SymbolParameterTest Condit ionsMin.Typ.Max.Unit
g
(∗)Forward
fs
Tr ansc on duc tance
C
C
C
Input Capacitance
iss
Out put Capacitance
oss
Reverse Transfer
rss
Capacit a nc e
VDS>I
D(on)xRDS(on )maxID
=18 A30S
VDS=25V f=1MHz VGS= 05300
640
215
µ
µA
Ω
pF
pF
pF
A
2/8
Page 3
STW60NE10
ELECTRICAL CHARACTERISTICS
(continued)
SWITCHINGON
SymbolParameterTest Condit ionsMin.Typ.Max.Unit
t
d(on)
t
Tur n-on Delay Time
Rise Time
r
VDD=50VID=30A
R
=4.7
G
Ω
VGS=10V
28
100
(Resis t iv e Load, see fig. 3)
Q
Q
Q
Tot al Gate Charge
g
Gat e- Source Char g e
gs
Gate-Drain Charge
gd
VDD=80V ID=60A VGS= 10 V142
27
59
185nC
SWITCHINGOFF
SymbolParameterTest Condit ionsMin.Typ.Max.Unit
t
d(off)
Tur n-of f Delay Time
t
Fall T ime
f
VDD=50VID=30A
=4.7 ΩVGS=10V
R
G
160
45
(Resis t iv e Load, see fig. 3)
t
r(Voff)
t
t
Off-volt age Rise Tim e
Fall T ime
f
Cross-over Time
c
V
=80VID=60A
clamp
=4.7 ΩVGS=10V
R
G
(Indu ctive Load, see fig. 5)
40
45
85
SOURCE DRAIN DIODE
SymbolParameterTest ConditionsMin.Typ.Max.Unit
I
SD
I
SDM
V
SD
t
Q
I
RRM
(∗) Pulsed: Pulse duration = 300µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Sou rc e-d rai n Cur ren t
(•)
Sou rc e-d rai n Cur ren t
60
240
(pulsed)
(∗)ForwardOnVoltage ISD=60A VGS=01.5V
Reverse Recovery
rr
Time
Reverse Recovery
rr
ISD= 60 Adi/dt = 100 A /µs
=50VTj=150oC
V
DD
(s ee tes t cir cu it, fig . 5)
170
1.02
Charge
Reverse Recovery
12
Current
ns
ns
nC
nC
ns
ns
ns
ns
ns
A
A
ns
µC
A
Safe Operating AreaThermal Impedan ce
3/8
Page 4
STW60NE10
OutputCharacteristics
Transconductance
TransferCharacteristics
Static Drain-sourceOn Resistance
Gate Charge vs Gate-sourceVoltage
4/8
CapacitanceVariations
Page 5
STW60NE10
NormalizedGate ThresholdVoltage vs
Temperature
Source-drainDiode Forward Characteristics
NormalizedOn Resistancevs Temperature
5/8
Page 6
STW60NE10
Fig. 1:
UnclampedInductiveLoad TestCircuit
Fig. 3: SwitchingTimes Test Circuits For
ResistiveLoad
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