Datasheet STW45NM50FD Datasheet (SGS Thomson Microelectronics)

Page 1
STW45NM50FD
N-CHANNEL 500V - 0.07Ω - 45A TO-247
FDmesh™Power MOSFET (With FAST DIODE)
TYPE V
DSS
R
DS(on)
I
D
STW45NM50FD 500V < 0.1 45 A
n
TYPICAL RDS(on) = 0.07
n
n
100% AVALANCHE TESTED
n
LOW INPUT CAPACITANCE AND GATE CHARGE
n
LOW GATE INPUT RESIST ANC E
n
TIGHT PROCESS CONTROL AND HIGH MANUFACTURING YIELDS
DESCRIPTION
The FDmesh
associates all advantages of re-
duced on-resistance and fast swi tching with an in­trinsic fast-recovery body diode. It is therefore strongly recommended for bridge topologies, in par­ticular ZVS phase-shift converters.
APPLICATIONS
n
ZVS PHASE-SHIFT FULL BRIDGE CONVERTERS FOR SMPS AND WELDING EQUIPMENT
3
2
1
TO-247
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
P
TOT
dv/dt (1) Peak Diode Recovery voltage slope 20 V/ns
T
stg
T
j
(•)Pu l se width limite d by safe operating area
Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k)
500 V 500 V
Gate- source Voltage ±30 V
Drain Current (continuos) at TC = 25°C Drain Current (continuos) at TC = 100°C
(l)
Drain Current (pulsed) 180 A Total Dissipation at TC = 25°C
45 A
28.4 A
417 W
Derating Factor 2.08 W/°C
Storage Temperature –65 to 150 °C Max. Operating Junction Temperature 150 °C
(1) ISD 45A, di/dt 400A/µs, VDD V
(BR)DSS
, Tj T
JMAX.
1/8June 2002
Page 2
STW45NM50FD
THERMA L D ATA
Rthj-case Thermal Resistance Junction-case Max 0.3 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 30 °C/W
T
l
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
I
AR
E
AS
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
Maximum Lead Temperature For Soldering Purpose 300 °C
Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by T
max)
j
Single Pulse Avalanche Energy (starting T
Drain-source
= 25 °C, ID = IAR, VDD = 35 V)
j
ID = 250 µA, VGS = 0 500 V
22.5 A
800 mJ
Breakdown Voltage Zero Gate Voltage
Drain Current (V
GS
Gate-body Leakage Current (V
DS
= 0)
= 0)
V
= Max Rating
DS
VDS = Max Rating, TC = 125 °C V
= ±30V ±100 nA
GS
10 µA
100 µA
ON
(1)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
GS(th)
R
DS(on)
Gate Threshold Voltage Static Drain-source On
V
= VGS, ID = 250µA
DS
VGS = 10V, ID = 22.5A
345V
0.07 0.10
Resistance
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
(1) Forward Transconductance VDS > I
g
fs
C
iss
C
oss
C
rss
Input Capacitance Output Capacitance 680 pF Reverse Transfer
I
D
V
Capacitance
C
(3) Equivalent Output
oss eq.
VGS = 0V, VDS = 0V to 400V 350 pF
Capacitance
R
G
Gate Input Resistance f=1 MHz Gate DC Bias = 0
Test Signal Level = 20mV Open Drain
Note: 1. Pulsed: Pu l se duration = 300 µs, duty cyc l e 1.5 %.
= 22.5A
DS
D(on)
x R
DS(on)max,
= 25V, f = 1 MHz, VGS = 0
20 S
3600 pF
82 pF
2
2/8
Page 3
STW45NM50FD
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
t
d(on)
Q
Q
Q
t
r
g
gs
gd
Turn-on Delay Time Rise Time 28 ns Total Gate Charge
Gate-Source Charge 22 nC Gate-Drain Charge 40 nC
SWITCHING OFF
Symbol Param eter Test Conditions Min. Typ. Max. U nit
t
r(Voff)
t
t
f
c
Off-voltage Rise Time Fall Time 25 ns Cross-over Time 44 ns
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
VSD (1)
t
rr
Q
rr
I
RRM
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1 .5 %.
2. Pulse width limi ted by safe operating area .
3. C
Source-drain Current 45 A
(2)
Source-drain Current (pulsed) 180 A Forward On Voltage Reverse Recovery Time
Reverse Recovery Charg e 2.2 µC Reverse Recovery Curren t 18 A
is defined as a const ant equivalent capacitance giving the same charging time a s C
oss eq.
V
.
DSS
= 250V, ID = 22.5A
DD
RG= 4.7 VGS = 10V (see test circuit, Figure 3)
V
= 400V, ID = 45A,
DD
V
= 10V
GS
V
= 400V, ID = 45A,
DD
RG= 4.7Ω, V
GS
= 10V
(see test circuit, Figure 3)
ISD = 45A, VGS = 0 I
= 45A, di/dt = 100A/µs,
SD
V
= 100V
DD
(see test circuit, Figure 5)
28 ns
92 120 nC
11 ns
1.5 V
245 ns
when VDS increases from 0 to 80%
oss
Safe Operating Area Thermal Impedence
3/8
Page 4
STW45NM50FD
Output Characteristics Transfer Characteristics
Transconductance
Gate Charge vs Gate-source Voltage
Static Drain-source On Resistance
Capacitance Variations
4/8
Page 5
STW45NM50FD
Source-drain Diode Forward Characteristics
Normalized On Resistance vs TemperatureNormalized Gate Thereshold Voltage vs Temp.
5/8
Page 6
STW45NM50FD
Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuit For
Resistive Load
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
6/8
Page 7
TO-247 MECHANICAL DATA
STW45NM50FD
DIM.
A 4.85 5.15 0.19 0.20 D 2.20 2.60 0.08 0.10 E 0.40 0.80 0.015 0.03
F 1 1.40 0.04 0.05 F1 3 0.11 F2 2 0.07 F3 2 2.40 0.07 0.09 F4 3 3.40 0.11 0.13
G 10.90 0.43
H 15.45 15.75 0.60 0.62
L 19.85 20.15 0.78 0.79 L1 3.70 4.30 0.14 0.17 L2 18.50 0.72 L3 14.20 14.80 0.56 0.58 L4 34.60 1.36 L5 5.50 0.21
M 2 3 0.07 0.11
V
V2
Dia 3.55 3.65 0.14 0.143
MIN. TYP MAX. MIN. TYP. MAX.
mm. inch
5º5º
60º 60º
7/8
Page 8
STW45NM50FD
8/8
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