Datasheet STS7DNF30L Datasheet (SGS Thomson Microelectronics)



DUAL N - CHANNEL30V - 0.018Ω - 7A SO-8

TYPE V

ST S7DNF30L 30 V < 0.022 Ω 7A

■ TYPICALR

■ STANDARD OUTLINE FOR EASY

DS(on)

DSS

= 0.018 Ω

AUTOMATEDSURFACEMOUNTASSEMBLY

■ LOW THRESHOLDDRIVE

DESCRIPTION

This Power MOSFET is the secondgeneration of
STMicroelectronics unique ” Single Feature
Size

”

strip-based process. The resulting
transistor shows extremely high packing density
for low on-resistance, rugged avalanche
characteristics and less critical alignment steps
therefore a remarkable manufacturing
reproducibility.

R

DS(on)

I

D

STS7DNF30L

STripFET POWER MOSFET

PRELIMINARY DATA

SO-8

APPLICATIONS

■ DC MOTOR DRIVE

■ DC-DCCONVERTERS

■ BATTERYMANAGMENTIN NOMADIC

INTERNAL SCHEMATIC DIAGRAM

EQUIPMENT

■ POWERMANAGEMENTIN

PORTABLE/DESKTOPPC

s

ABSOLUTE MAXIMUM RATINGS

Symb o l Parameter Value Unit

V

V

V

I

DM

P

(•) Pulse width limited by safeoperating area

Drain-source Volt age (VGS=0) 30 V

DS

Drain- gate Voltage (RGS=20kΩ)30V

DGR

Gate-s ource Voltage ± 20 V

GS

Drain Current (co ntinuous) at Tc = 25oC

I

D

Single Operat ion
Drain Current (co ntinuous) at T
Single Operat ion

(•) Drain Current (puls ed) 28 A

Tot al Di ssipation at Tc=25oC Dual Opera tion

tot

Tot al Di ssipation at T

=25oCSinlgeOperation

c

=100oC

c

7
4

2

1.6

A
A

W
W

November 1999

1/6

STS7DNF30L

THERMAL DATA

R

thj-amb

T

Tstg

(*)Mountedon FR-4 board (Steady State)

*Ther mal Resistan c e Junction-amb ient S ingle Opera ti on
Maximum Operating Ju nc t ion T emperat ure

j

Sto rage Temperature

Dual Operation

78

62.5
150

-65 to 150

o

C/W

o

C/W

o
o

C
C

ELECTRICAL CHARACTERISTICS

=25oC unless otherwisespecified)

(T

case

OFF

Symbol Parameter Test Conditions Min. Typ. Max. Unit

V

(BR)DSS

Drain-source

ID=250µAVGS=0 30 V

Break dow n Voltage

I

DSS

I

GSS

Zero Gate Voltage
Drain Cur rent ( V

GS

Gat e- bod y L eakage
Current (V

DS

=0)

=0)

V

=MaxRating

DS

=MaxRating Tc=125oC

V

DS

V

=± 20 V

GS

1

10

100 nA

±

ON (∗)

Symbol Parameter Test Conditions Min. Typ. Max. Unit

V

GS(th)

R

DS(on)

I

D(on)

Gate Threshold Voltage VDS=VGSID= 250 µA11.62.5V
Sta t ic Drain -s ource On

Resistance

VGS=10V ID=3.5A

=4.5V ID=3.5A

V

GS

On State Drain Current VDS>I

D(on)xRDS(on )max

0.018

0.021

7A

0.022

0.026ΩΩ

VGS=10V

DYNAMIC

Symbol Parameter Test Conditions Min. Typ. Max. Unit

g

(∗)Forward

fs

Tr ansc on duc tance

C

C

C

Input Capac i t ance

iss

Out put Capacitance

oss

Reverse Tr ansfer

rss

Capacit a nc e

VDS>I

D(on)xRDS(on )maxID

=3.5A 10 S

VDS=25V f=1MHz VGS= 0 V 1050

250

85

µA
µA

pF
pF
pF

2/6

STS7DNF30L

ELECTRICAL CHARACTERISTICS

(continued)

SWITCHINGON

Symbol Parameter Test Conditions Min. Typ. Max. Unit

t

d(on)

Tur n-on Delay Time
Rise Ti me

t

r

VDD=15V ID=3.5A
R

=4.7

G

Ω

VGS=4.5V

22
60

(Resis t iv e Loa d, see fig. 3)

Q
Q
Q

Tot al Gat e Charge

g

Gat e- Source Charg e

gs

Gate-Drain Charge

gd

VDD=24V ID=8A VGS= 5 V 17.5

4
7

23 nC

SWITCHINGOFF

Symbol Parameter Test Conditions Min. Typ. Max. Unit

t

d(off)

Tur n-of f Delay Time

t

Fall T ime

f

VDD=15V ID=3.5A

=4.7 Ω VGS=4.5V

R

G

42
10

(Resis t iv e Loa d, see fig. 3)

t

r(Voff)

t

t

Off-volt age Rise T im e
Fall T ime

f

Cross-over Time

c

V

=24V ID=7A

clamp

=4.7 Ω VGS=4.5V

R

G

(Indu ct iv e Load , s e e fig. 5)

11
12
25

SOURCEDRAINDIODE

Symbol Parameter Test Conditions Min. Typ. Max. Unit

I

SD

I

SDM

V

SD

t

Q

I

RRM

(∗) Pulsed:Pulse duration = 300µs, duty cycle 1.5%
(•) Pulse width limited by safe operating area

Source-drain Current

(•)

Source-drain Current

8

32

(pulsed)

(∗)ForwardOnVoltage ISD=7A VGS=0 1.2 V

Reverse Recovery

rr

Time
Reverse Recovery

rr

ISD=7A di/dt=100A/µs

=20V Tj=150oC

V

DD

(see test circuit, fig. 5)

50

40
Charge
Reverse Recovery

1.6

Current

ns
ns

nC
nC

ns
ns

ns
ns
ns

A
A

ns

nC

A

3/6

STS7DNF30L

Fig. 1:

UnclampedInductiveLoad TestCircuit

Fig. 3: SwitchingTimes Test Circuits For
ResistiveLoad

Fig. 2:

UnclampedInductiveWaveform

Fig. 4: Gate Chargetest Circuit

Fig. 5:

Test CircuitFor InductiveLoad Switching

And Diode Recovery Times

4/6

SO-8 MECHANICALDATA

STS7DNF30L

DIM.

MIN. TYP. MAX. MIN. TYP. MAX.

A 1.75 0.068
a1 0.1 0.25 0.003 0.009
a2 1.65 0.064
a3 0.65 0.85 0.025 0.033

b 0.35 0.48 0.013 0.018
b1 0.19 0.25 0.007 0.010

C 0.25 0.5 0.010 0.019
c1 45 (typ.)

D 4.8 5.0 0.188 0.196

E 5.8 6.2 0.228 0.244

e 1.27 0.050
e3 3.81 0.150

F 3.8 4.0 0.14 0.157

L 0.4 1.27 0.015 0.050

M 0.6 0.023

S 8 (max.)

mm inch

0016023

5/6

STS7DNF30L

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