Datasheet STS4DPF30L Datasheet (SGS Thomson Microelectronics)

STS4DPF30L

DUAL P-CHANNEL 30V - 0.07 Ω - 4A SO-8

STripFET™ POWER MOSFET

PRELIMINARY DATA

TYPE

V

DSS

STS4DPF30L 30 V <0.08

■ TYPICAL R

■ STANDARD OUTLINE FO R EAS Y

(on) = 0.07 Ω

DS

R

DS(on)

I

D

Ω

4 A

AUTOMATED SURFACE MOUNT ASSEMBLY

■ LOW THRESHOLD DRIVE

DESCRIPTION

This Power MOSFET is the latest dev elo pment of

STMicroelectronis unique "Single Feature Size™"
strip-based process. The resulting transistor
shows extremely high packing density for low on­resistance, rugged avalanche characteristics and
less critical alignment steps therefore a remark­able manufacturing reproducibility.

APPLICATIONS

■ BATTERY MANAGEMENT IN NOMADIC

EQUIPMENT

■ POWER MANAGEMENT IN CELLULAR

PHONES

■ DC-DC CONVERTER

SO-8

INTERNAL SCHEMATIC DIAGRAM

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

V

V

DGR

V

I

I

DM

P

(

Puls e width limit ed by safe opera ti ng are a. Note: F or t he P- CHA NNE L MOS FE T ac tu al po la rity o f v olt ages a nd

•)

April 2002

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

Drain-source Voltage (VGS = 0)

DS

Drain-gate Voltage (RGS = 20 kΩ)
Gate- source Voltage ± 16 V

GS

Drain Current (continuous) at TC = 25°C Single Operation

D

Drain Current (continuous) at T

(

•)

Drain Current (pulsed) 16 A
Total Dissipation at TC = 25°C Dual Operation

tot

Total Dissipation at T

= 25°C Single Operation

C

= 100°C Single Operation

C

current has to be rever sed

30 V
30 V

4

2.5

2.0

1.6

A
A

W
W

1/6

STS4DPF30L

THERMAL DATA

Rthj-amb

T

T

stg

(*)

When Mounted on 1 inch2 FR-4 board, 2 oz of Cu and t [ 10 sec.

(*)Thermal Resistance Junction-ambient Single Operation
Thermal Operating Junction-ambient

j

Storage Temperature

Dual Operating

78

62.5

-55 to150

-55 to 150

°C/W
°C/W

°C
°C

ELECTRICAL CHARACTERISTICS (T

= 25 °C UNLESS OTHERWISE SPECIFIED)

CASE

OFF

Symbol Parameter Test Conditions Min. Typ. Max. Unit

I

V

(BR)DSS

Drain-source

= 250 µA, VGS = 0

D

30 V

Breakdown Voltage

V

= Max Rating

DS

V

= Max Rating TC = 125°C

DS

V

= ± 16 V

GS

1

10

±100 nA

ON

(*)

I

DSS

I

GSS

Zero Gate Voltage
Drain Current (V

GS

Gate-body Leakage
Current (V

DS

= 0)

= 0)

Symbol Parameter Test Conditions Min. Typ. Max. Unit

V

V

GS(th)

R

DS(on)

Gate Threshold Voltage
Static Drain-source On

Resistance

= VGS I

DS

= 10 V ID = 2 A

V

GS

V

= 4.5 V ID = 2 A

GS

= 250 µA

D

1V

0.070

0.085

0.08

0.10

DYNAMIC

Symbol Parameter Test Conditions Min. Typ. Max. Unit

(*)

g

fs

C

iss

C

oss

C

rss

Forward Transconductance
Input Capacitance

Output Capacitance
Reverse Transfer
Capacitance

V

= 15V ID=2 A

DS

= 25V, f = 1 MHz, VGS = 0

V

DS

10 S

1350

490
130

µA
µA

Ω
Ω

pF
pF
pF

2/6

STS4DPF30L

ELECTRICAL CHARACTERISTICS (continued)

SWITCHING ON

Symbol Parameter Test Conditions Min. Typ. Max. Unit

= 15 V ID = 2 A

t

d(on)

t

Turn-on Delay Time

r

Rise Time

V

DD

R

= 4.7 Ω VGS = 4.5 V

G

(Resistive Load, Figure 1)

Q

Q

gs

Q

gd

Total Gate Charge

g

Gate-Source Charge
Gate-Drain Charge

= 24 V ID= 4 A VGS= 5 V

V

DD

(See test circuit, Figure 2)

SWITCHING OFF

Symbol Parameter Test Conditions Min. Typ. Max. Unit

= 15 V ID = 2 A

t

d(off)

t

Turn-off Delay Time

f

Fall Time

V

DD

R

= 4.7Ω, V

G

GS

= 4.5 V

(Resistive Load, Figure 1)

SOURCE DRAIN DIODE

Symbol Parameter Test Conditions Min. Typ. Max. Unit

I

SD

I

SDM

V

SD

t

rr

Q

rr

I

RRM

(*)

Pulsed: P ul se duration = 300 µs, duty cycle 1.5 %.

(

•)Pulse width limited by s af e operatin g area.

Source-drain Current

(•)

Source-drain Current (pulsed)

(*)

Forward On Voltage
Reverse Recovery Time

Reverse Recovery Charge
Reverse Recovery Current

I

= 4 A VGS = 0

SD

= 4 A di/dt = 100A/µs

I

SD

V

= 15 V Tj = 150°C

DD

(See test circuit, Figure 3)

25
35

12.5
5
3

125

35

45
36

1.6

16 nC

4

16

1.2 V

ns
ns

nC
nC

ns
ns

A
A

ns

nC

A

3/6

STS4DPF30L

Fig. 1: Switching Times Test Circuits For Resistive

Load

Fig. 3: Test Circuit For Diode Recovery Behaviour

Fig. 2: Gate Charge test Circuit

4/6

SO-8 MECHANICAL DATA

STS4DPF30L

DIM.

MIN. TYP. MAX. MIN. TYP. MAX.

A1.750.068
a1 0.1 0.25 0.003 0.009
a2 1.65 0.064
a3 0.65 0.85 0.025 0.033

b 0.35 0.48 0.013 0.018
b1 0.19 0.25 0.007 0.010

C 0.25 0.5 0.010 0.019

c1 45 (typ.)

D 4.8 5.0 0.188 0.196

E 5.8 6.2 0.228 0.244

e1.27 0.050
e3 3.81 0.150

F 3.8 4.0 0.14 0.157

L 0.4 1.27 0.015 0.050

M0.60.023

S 8 (max.)

mm inch

0016023

5/6

STS4DPF30L

Information furnished is believed to be ac curate and reli able. Howev er, STMicroel ectronics assumes no responsibilit y for the consequence s
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implic ation or otherwise under any patent or patent rights of STMi croelectr onics. Specifications mentioned in thi s publicati on are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as cri tical comp onents in life support dev i ces or systems wi t hout express written ap proval of STMi croelect ro nics.

The ST log o i s registered trademark of STMicroelectronics

2002 STMi croelectr oni cs - All Rights Reserved

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