Page 1
®
N - CHANNEL 60V - 0.180Ω - 2A SO-8
TYPE V
STS2DNE60 60 V < 0.23 Ω 2 A
■
TYPICAL R
■
STANDARD OUTLINE FOR EASY
DS(on)
DSS
= 0.18
AUTOMATED SUR F ACE MOUNT ASSEMBLY
■
LOW THRESHOLD DRIVE
DESCRIPTION
This Power MOSFET is the latest development of
STMicroelectronics unique " Single Feature
Size " strip-based process. The resulting
transistor shows extremely high packing density
for low on-resistance, rugged avalanche
characteristics and less critical alignment steps
therefore a remarkable manufacturing
reproducibility.
R
DS(on)
I
D
Ω
STS2DNE60
STripFET POWER MOSFET
PRELIMINARY DATA
SO-8
APPLICATIONS
■
DC MOTOR DRIVE
■
DC-DC CONVERTERS
■
BATTERY MANAGM ENT IN NOMADI C
INTERNAL SCHEMATIC DIAGRAM
EQUIPMENT
■
POWER MANAGEMENT IN
PORTABLE/DESKTOP PC
s
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
V
V
I
DM
P
Drain-source Voltage (VGS = 0) 60 V
DS
Drain- gate Voltage (RGS = 20 kΩ)60V
DGR
Gate-source Voltage ± 20 V
GS
I
Drain Current (continuous) at Tc = 25 oC
D
Single Operation
Drain Current (continuous) at T
Single Operation
(•) Drain Current (pulsed) 8 A
Total Dissipation at Tc = 25 oC Dual Operation
tot
Total Dissipation at T
= 25 oC Sinlge Operation
c
= 100 oC
c
2
1.3
2
1.6
A
A
W
W
October 1999
1/5
Page 2
STS2DNE60
THERMAL DATA
R
thj-amb
T
T
*Thermal Resistance Junction-ambient Single Operation
Dual Operation
Maximum Operating Junction Temperature
j
Storage Temperature
stg
78
62.5
150
-55 to 150
o
C/W
o
C/W
o
o
C
C
(*)
Mounted on FR-4 board (t
ELECTRICAL CHARACTERISTICS
≤ 10
sec)
= 25 oC unless otherwise specified)
(T
case
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
ID = 250 µA V
= 0 60 V
GS
Breakdown Voltage
I
I
ON (∗
DSS
GSS
Zero Gate Voltage
Drain Current (V
Gate-body Leakage
Current (V
)
DS
= 0)
GS
= 0)
= Max Rating
V
DS
V
= Max Rating Tc = 125 oC
DS
= ± 20 V ± 100 nA
V
GS
1
10
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
GS(th)
R
DS(on)
Gate Threshold Voltage V
Static Drain-source On
= VGS ID = 250 µA23.34V
DS
VGS = 10 V ID = 1 A 0.180 0.23 Ω
Resistance
I
D(on)
On State Drain Current VDS > I
V
= 10 V
GS
D(on)
x R
DS(on)max
2A
DYNAMIC
µA
µA
Symbol Parameter Test Conditions Min. Typ. Max. Unit
g
(∗) Forward
fs
VDS > I
D(on)
x R
DS(on)max
ID = 1 A 1.8 S
Transconductance
C
C
C
Input Capacitance
iss
Output Capacitance
oss
Reverse Transfer
rss
V
= 25 V f = 1 MHz V
DS
= 0 V 310
GS
45
12
Capacitance
2/5
pF
pF
pF
Page 3
STS2DNE60
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
Turn-on Delay Time
Rise Time
t
r
V
= 30 V ID = 1 A
DD
R
= 4.7 Ω VGS = 10 V
G
(Resistive Load, see fig. 3)
Q
Q
Q
Total Gate Charge
g
Gate-Source Charge
gs
Gate-Drain Charge
gd
V
= 24 V ID = 2 A V
DD
= 4.5 V 12
GS
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(off)
Turn-off Delay Time
Fall Time
t
f
V
= 30 V ID = 1 A
DD
R
= 4.7 Ω VGS = 10 V
G
(Resistive Load, see fig. 3)
t
r(Voff)
t
t
Off-voltage Rise Time
Fall Time
f
Cross-over Time
c
V
= 48 V ID = 2 A
clamp
R
= 4.7 Ω VGS = 10 V
G
(Inductive Load, see fig. 5)
SOURCE DRAIN DIODE
9
10
16 nC
5.1
2.7
25
5
4.5
5
12
ns
ns
nC
nC
ns
ns
ns
ns
ns
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SDM
I
SD
Source-drain Current
(•)
Source-drain Current
2
8
(pulsed)
(∗) Forward On Voltage ISD = 2 A VGS = 0 1.2 V
V
SD
t
Reverse Recovery
rr
Time
Q
Reverse Recovery
rr
I
= 2 A di/dt = 100 A/µs
SD
V
= 25 V Tj = 150 oC
DD
(see test circuit, fig. 5)
40
50
Charge
I
RRM
Reverse Recovery
2.5
Current
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
A
A
ns
nC
A
3/5
Page 4
STS2DNE60
SO-8 MECHANICAL DATA
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A1.750.068
a1 0.1 0.25 0.003 0.009
a2 1.65 0.064
a3 0.65 0.85 0.025 0.033
b 0.35 0.48 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.25 0.5 0.010 0.019
c1 45 (typ.)
D 4.8 5.0 0.188 0.196
E 5.8 6.2 0.228 0.244
e1.27 0.050
e3 3.81 0.150
F 3.8 4.0 0.14 0.157
L 0.4 1.27 0.015 0.050
M0.60.023
S 8 (max.)
mm inch
4/5
0016023
Page 5
STS2DNE60
Information f urnished i s believed t o be accurate an d reliabl e. How ever, STMicroelect ronics assu mes no responsib ility fo r the consequen ces
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to chan ge w ithout notice. This publicatio n su persedes a nd r eplaces al l inf ormati on previ ously suppl ied. STMicroelect ron ics produ cts
are not auth ori zed f or use as critical component s in life support devices or systems without exp ress writ te n approval of STMicroelectronics.
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© 1999 STMicr oelectronics – Printe d in Italy – All Rights Reserved
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