Datasheet STP5NA50FI, STP5NA50 Datasheet (SGS Thomson Microelectronics)

Page 1
STP5NA50
STP5NA50FI
N - CHANNEL ENHANCEMENT MODE
FAST POWER MOS TRANSISTOR
TYPE V
STP 5NA50 STP 5NA50FI
TYPICAL R
± 30V GATE TO SOURCE VOLTAGE RATING
REPETITIVE AVALANCHE DATA AT 100
LOW INTRINSIC CAPACITANCES
GATE GHARGE MINIMIZED
REDUCED THRESHOLD VOLTAGE SPREAD
DS(on)
DSS
500 V 500 V
= 1.2
R
DS(on)
<1.6 <1.6
I
D
5A 3A
o
C
DESCRIPTION
This series of POWER MOSFETS represents the most advanced high voltage technology. The optimized cell layout coupled with a new proprietary edge termination concur to give the device low R
and gate charge, unequalled
DS(on)
ruggedness and superior switching performance.
APPLICATIONS
HIGH CURRENT, HIGH SPEED SWITCHING
SWITCH MODE POWERSUPPLIES (SMPS)
DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE
3
2
1
TO-220 ISOWATT220
INTERNAL SCHEMATIC DIAGRAM
3
2
1
ABSOLUTE MAXIMUM RATINGS
Symb o l Paramet er Val u e Unit
ST P5NA50 ST P5NA50FI
V
V
V
I
DM
P
V
T
() Pulsewidth limited bysafe operating area
November 1996
Drain - s ource Voltage (VGS=0) 500 V
DS
Drain - gat e Voltage (RGS=20kΩ)500V
DGR
Gate-source Voltage ± 30 V
GS
Drain Current (continuous) at Tc=25oC53A
I
D
Drain Current (continuous) at Tc=100oC3.3 2A
I
D
(•) Drain Current (pulsed) 20 20 A
Total Di ssipation a t Tc=25oC 100 40 W
tot
Derat ing Factor 0.8 0.32 W/ Ins ulation Withs t and Voltage (DC) 2000 V
ISO
St or a ge Tem perature -65 t o 150
stg
Max. Operating Jun ction T emperature 150
T
j
o o
o
C
C C
1/10
Page 2
STP5NA50/FI
THERMAL DATA
TO-220 ISOW ATT 220
R
thj-case
R
thj-amb
R
thc-sink
T
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Uni t
I
AR
E
E
I
AR
Thermal Resistance J unction- c ase Max 1.25 3.12 Thermal Resistance Junc tion-am bie nt Max
Thermal Resistance Cas e-sink Typ Maximum Lead Temperature For So ldering Purpose
l
Avalanc h e Cu rr ent , Repet itive or Not-Rep etitive (pulse width limited by Tjmax, δ <1%)
Single Pul se Avalanche Ener gy
AS
(starti ng T Repetitive Avalanc he Energ y
AR
=25oC, ID=IAR,VDD=50V)
j
(pulse width limited by Tjmax, δ <1%) Avalanc h e Cu rr ent , Repet itive or Not-Rep etitive
(Tc= 100oC, pulse width l imited by Tjmax, δ <1%)
62.5
0.5
300
5A
280 mJ
7.4 mJ
3.3 A
o
C/W
o
C/W
o
C/W
o
C
ELECTRICAL CHARACTERISTICS (T
=25oC unless otherwisespecified)
case
OFF
Symbol Parameter Te st Condition s Min. Typ. Max. Unit
V
(BR)DSS
Drain - s ource
ID=250µAVGS= 0 500 V
Break d own Volta ge
I
DSS
I
GSS
Zer o G at e V oltage Drain Current (VGS=0)
Gat e- body Leakage Current (V
DS
=0)
VDS=MaxRating VDS= Max Rating x 0.8 Tc=125oC
= ± 30 V ± 10 0 nA
V
GS
25
250
ON (∗)
Symbol Parameter Te st Condition s Min. Typ. Max. Unit
V
GS(th)
R
DS(on)
Gate Threshold Voltage VDS=VGSID=250µA 2.25 3 3.75 V St at ic Drain-s our ce O n
VGS=10V ID= 2.5 A 1.3 1.6
Resistance
I
D(on)
On State Drain Current VDS>I
D(on)xRDS(on)max
5A
VGS=10V
DYNAMIC
Symbol Parameter Te st Condition s Min. Typ. Max. Unit
()Forward
g
fs
Tr ansconductance
C C C
Input Capacitance
iss
Out put Capacitance
oss
Reverse Transfer
rss
Capacitance
VDS>I
D(on)xRDS(on)maxID
=2.5A 2.7 4 S
VDS=25V f=1MHz VGS=0 700
115
30
930 155
45
µA µA
pF pF pF
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Page 3
STP5NA50/FI
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol Parameter Te st Condition s Min. Typ. Max. Unit
t
d(on)
(di/dt)
Q Q Q
Turn-on T ime
t
Rise Time
r
Turn-on Current S lope VDD=400V ID=5A
on
Total Gate Charge
g
Gat e- Source Charge
gs
Gate-Drain Charge
gd
SWITCHING OFF
Symbol Parameter Te st Condition s Min. Typ. Max. Unit
t
r(Voff)
t
Off -voltage Rise Time
t
Fall Time
f
Cross-over Time
c
SOURCE DRAINDIODE
VDD=250V ID=2.5A RG=15 Ω VGS=10V
17 30
(see test circuit, figure 3)
450 A/µs RG=15 Ω VGS=10V (see test circuit, figure 5)
VDD= 400 V ID=5A VGS=10V 32
7
14
VDD=400V ID=5A RG=15 Ω VGS=10V (see test circuit, figure 5)
18 12 30
25 40
45 nC
25 18 42
ns ns
nC nC
ns ns ns
Symbol Parameter Te st Condition s Min. Typ. Max. Unit
I
I
SDM
SD
Source-drain C urrent
()
Source-drain C urrent
5
20
(pulsed)
V
(∗) Forward On V oltage ISD=5A VGS=0 1.6 V
SD
t
Reverse Recovery
rr
Time
Q
Reverse Recovery
rr
ISD=5A di/dt=100A/µs VDD=50V Tj=150oC (see test circuit, figure 5)
380
3.8
Charge
I
RRM
Reverse Recovery
20
Current
() Pulsed:Pulse duration = 300 µs, dutycycle 1.5 % () Pulse widthlimited by safeoperating area
Safe Operating Areas for TO-220 Safe Operating Areas forISOWATT220
A A
ns
µC
A
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Page 4
STP5NA50/FI
Thermal ImpedeanceFor TO-220
Derating Curve For TO-220
Thermal ImpedanceFor ISOWATT220
Derating Curve For ISOWATT220
Output Characteristics
4/10
Transfer Characteristics
Page 5
Transconductance Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage Capacitance Variations
STP5NA50/FI
Temperature
Normalized On Resistance vs TemperatureNormalized Gate Threshold Voltage vs
5/10
Page 6
STP5NA50/FI
Turn-on Current Slope Turn-off Drain-source Voltage Slope
Cross-over Time Switching Safe Operating Area
Accidental Overload Area Source-drain Diode ForwardCharacteristics
6/10
Page 7
STP5NA50/FI
Fig. 1: Unclamped Inductive Load Test Circuits
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 2: Unclamped Inductive Waveforms
Fig. 4: Gate Charge Test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Reverse Recovery Time
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Page 8
STP5NA50/FI
TO-220 MECHANICAL DATA
DIM.
mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409
L2 16.4 0.645 L4 13.0 14.0 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151
E
A
L4
D
F2
F1
G1
H2
G
F
C
D1
L2
Dia.
L5
L7
L6
L9
P011C
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ISOWATT220 MECHANICAL DATA
STP5NA50/FI
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.4 4.6 0.173 0.181 B 2.5 2.7 0.098 0.106
D 2.5 2.75 0.098 0.108
E 0.4 0.7 0.015 0.027
F 0.75 1 0.030 0.039 F1 1.15 1.7 0.045 0.067 F2 1.15 1.7 0.045 0.067
G 4.95 5.2 0.195 0.204
G1 2.4 2.7 0.094 0.106
H 10 10.4 0.393 0.409 L2 16 0.630 L3 28.6 30.6 1.126 1.204 L4 9.8 10.6 0.385 0.417 L6 15.9 16.4 0.626 0.645 L7 9 9.3 0.354 0.366
Ø 3 3.2 0.118 0.126
mm inch
E
A
D
B
L3
L6
L7
Ø
F1
F
G1
H
G
F2
123
L2
L4
P011G
9/10
Page 10
STP5NA50/FI
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such informationnor for any infringement of patents or otherrights of third parties which may results from its use.No licenseis granted by implication or otherwise under any patentor patentrights of SGS-THOMSONMicroelectronics. Specifications mentioned in thispublication are subject to change withoutnotice. Thispublication supersedes andreplacesall information previously supplied. SGS-THOMSONMicroelectronics products are notauthorized for use ascriticalcomponents in lifesupportdevicesor systems withoutexpress writtenapproval ofSGS-THOMSONMicroelectonics.
1996 SGS-THOMSON Microelectronics -Printed in Italy- AllRightsReserved
Australia- Brazil -Canada -China - France- Germany - HongKong- Italy - Japan- Korea- Malaysia - Malta- Morocco- TheNetherlands -
Singapore- Spain - Sweden- Switzerland- Taiwan- Thailand- UnitedKingdom -U.S.A
SGS-THOMSONMicroelectronics GROUP OFCOMPANIES
.
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