Page 1
STP2NC60
STP2NC60 FP
N-CHANNEL 600V - 7Ω - 1.9A - TO-220/TO-220FP
PowerMesh™II MOSFET
TYPE V
STP2NC60
STP2NC60F P
■ TYPICAL R
■ EXTREMELY HIGH dv /d t C APABILITY
■ 100% AVALANCHE TESTED
■ NEW HIGH VOLTAGE BENCHMARK
■ GATE CHARGE MINIMIZED
DS
DSS
600 V
600 V
(on) = 7 Ω
R
DS(on)
< 8
< 8
I
D
Ω
Ω
1.9 A
1.9 A
DESCRIPTION
The PowerMESH
generation of MESH OVERLAY
™II is the evolution of the first
™. The layout re-
finements introduced greatly improve the Ron*area
figure of merit while keeping the device at the lea ding edge for what concerns swithing speed, gate
charge and ruggedness.
APPLICATIONS
■ HIGH CURRENT, HIGH SPEED SWITCHING
■ SWITH MODE POWER SUPPLI ES ( SMPS)
■ DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVER
3
2
TO-220
1
TO-220FP
1
INTERNAL SCHEMATIC DIAGRAM
3
2
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
STP2NC60 STP2NC60FP
(1)
j
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
600 V
600 V
Gate- source Voltage ±30 V
Drain Current (continuos) at TC = 25°C
Drain Current (continuos) at TC = 100°C
1.9 1.9 (*) A
1.2 1.2 (*) A
Drain Current (pulsed) 7.4 7.4 (*) A
Total Dissipation at TC = 25°C
70 30 W
Derating Factor 0.56 0.24 W/°C
Insulation Withstand Voltage (DC) - 2000 V
Storage Temperature –60 to 150 °C
Max. Operating Junction Temperature 150 °C
(1)ISD ≤1.9A, di/ dt ≤100A/µs, VDD ≤ V
(*) Limited only by Maximum Temperature Allowed
(BR)DSS
, Tj ≤ T
JMAX
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
P
TOT
dv/dt Peak Diode Recovery voltage slope 3.5 V/ns
V
ISO
T
stg
T
(•)Pu l se width limite d by safe operat i ng area
.
1/9April 2001
Page 2
STP2NC60/STP2NC60FP
THERMA L D ATA
TO-220 TO-220FP
Rthj-case Thermal Resistance Junction-case Max 1.76 4.125 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W
Rthc-sink Thermal Resistance Case-sink Typ 0.5 °C/W
T
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
I
AR
E
AS
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
Maximum Lead Temperature For Soldering Purpose 300 °C
l
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
max)
j
Single Pulse Avalanche Energy
(starting T
= 25 °C, ID = IAR, VDD = 50 V)
j
Drain-source
Breakdown Voltage
Zero Gate Voltage
Drain Current (V
GS
= 0)
Gate-body Leakage
Current (V
DS
= 0)
1.9 A
80 mJ
ID = 250 µA, VGS = 0 600
V
= Max Rating
DS
V
= Max Rating, TC = 125 °C
DS
V
= ±30V ±100 nA
GS
1µA
10 µA
V
ON
(1)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
V
GS(th)
R
DS(on)
Gate Threshold Voltage
Static Drain-source On
= VGS, ID = 250µA
DS
VGS = 10V, ID = 0.7 A
234V
78
Resistance
I
D(on)
On State Drain Current VDS > I
D(on)
x R
DS(on)max,
1.9 A
VGS=10V
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
(1) Forward Transconductance VDS > I
g
fs
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance 26 pF
Reverse Transfer
Capacitance
ID= 0.7A
V
DS
D(on)
x R
DS(on)max,
= 25V, f = 1 MHz, VGS = 0
1.25 S
160 pF
3.8 pF
Ω
2/9
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STP2NC60/STP2NC60FP
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
Turn-on Delay Time VDD = 300V, ID = 0.7 A
RG=4.7Ω VGS = 10V
t
r
Q
g
Q
gs
Q
gd
Rise Time 8 ns
Total Gate Charge
Gate-Source Charge 2.8 nC
Gate-Drain Charge 2.8 nC
(see test circuit, Figure 3)
V
= 480V, ID = 1.4 A,
DD
V
= 10V
GS
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
t
r(Voff)
Off-voltage Rise Time
t
f
t
c
Fall Time 9 ns
Cross-over Time 34 ns
= 480V, ID = 1.4 A,
DD
R
= 4.7Ω, V
G
GS
= 10V
(see test circuit, Figure 5)
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
VSD (1)
t
rr
Q
rr
I
RRM
Note: 1. Pulsed: Puls e duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
Source-drain Current 1.9 A
(2)
Source-drain Current (pulsed) 7.4 A
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge 950 nC
ISD = 1.4 A, VGS = 0
I
= 1.4 A, di/dt = 100A/µs,
SD
V
= 100V, Tj = 150°C
DD
(see test circuit, Figure 5)
Reverse Recovery Current 3.8 A
8ns
8.5 11.5 nC
25 ns
1.6 V
500 ns
Safe Operating Area for TO-220
Safe Operating Area for TO-220FP
3/9
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STP2NC60/STP2NC60FP
Thermal Impedance for TO-220
Output Characteristics Transfer Characteristics
Thermal Impedance for TO-220FP
Transconductance
4/9
Static Drain-source On Resistance
Page 5
STP2NC60/STP2NC60FP
Gate Charge vs Gate-source Voltage
Capacitance Variations
Normalized On Resistance vs Temperatur eNormalized Gate Thereshold Voltage vs Temp.
Source-drain Diode Forward Characteristics
5/9
Page 6
STP2NC60/STP2NC60FP
Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuit For
Resistive Load
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
6/9
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E
TO-220 MECHANICAL DATA
STP2NC60/STP2NC60FP
DIM.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409
L2 16.4 0.645
L4 13.0 14.0 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.2 6.6 0.244 0.260
L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151
MIN. TYP. MAX. MIN. TYP. MAX.
mm inch
A
C
D
L5
Dia.
L7
D1
L6
L2
L9
F1
G1
F
H2
G
F2
L4
P011C
7/9
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STP2NC60/STP2NC60FP
TO-220FP MECHANICAL DATA
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.4 4.6 0.173 0.181
B 2.5 2.7 0.098 0.106
D 2.5 2.75 0.098 0.108
E 0.45 0.7 0.017 0.027
F 0.75 1 0.030 0.039
F1 1.15 1.7 0.045 0.067
F2 1.15 1.7 0.045 0.067
G 4.95 5.2 0.195 0.204
G1 2.4 2.7 0.094 0.106
H 10 10.4 0.393 0.409
L2 16 0.630
L3 28.6 30.6 1.126 1.204
L4 9.8 10.6 0.385 0.417
L6 15.9 16.4 0.626 0.645
L7 9 9.3 0.354 0.366
Ø 3 3.2 0.118 0.126
mm inch
E
A
D
8/9
B
L3
L6
L7
¯
F1
F
G1
H
G
F2
123
L2
L4
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STP2NC60/STP2NC60FP
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such informa tion n or for an y infring ement of patent s or other rig hts of third part ies which may resu lt from its use . No l i cen se i s
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical compo nents in life support devices or systems without express written approval of STMicroelectronics.
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