Using the latest high voltage MESH OVERLAY
process, STMicroelectronics has designed an
advanced family ofpower MOSFETs with
outstanding performances. Thenew patent
pending strip layout coupled with the Company’s
proprietary edge termination structure, gives the
lowest RDS(on) per area, exceptional avalanche
and dv/dt capabilities and unrivalled gate charge
and switching characteristics.
R
DS(on)
<0.28Ω
<0.28Ω
I
D
16 A
8A
3
2
1
TO-220TO-220FP
INTERNAL SCHEMATIC DIAGRAM
3
2
1
APPLICATIONS
■ HIGHCURRENT, HIGH SPEED SWITCHING
■ UNINTERRUPTIBLEPOWERSUPPLY(UPS)
■ DC-DC& DC-ACCONVERTERSFOR
TELECOM,INDUSTRIAL ANDCONSUMER
ENVIRONMENT
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
STP 16NB25ST P16NB25F P
V
V
V
I
DM
P
dv/dt(
V
T
(•) Pulse width limited by safe operating area(1)ISD≤ 16A, di/dt ≤ 200A/µs, VDD≤ V
Dra in- sour c e Volt age (VGS= 0)250V
DS
Dra in- gat e Volt age (RGS=20kΩ)250V
DGR
Gat e-source Voltage± 30V
GS
Dra in Cu rr ent (cont inuous) at Tc=25oC168A
I
D
Dra in Cu rr ent (cont inuous) at Tc=100oC105A
I
D
(•)Drain Cu rr ent ( p uls ed )6432A
Tot al Dis sipation at Tc=25oC14045W
tot
Der ati ng Fact or1.120.36W/
) P eak Diode Re c overy voltage sl ope5.55.5V/ns
1
Insulation W ithsta nd Voltage (DC)-----2000V
ISO
St orage T em pe r at ure-65 to 150
stg
Max. Operating Junction Temperat ur e150
T
j
(BR)DSS
,Tj≤T
JMAX
o
C
o
C
o
C
March 1999
1/9
Page 2
STP16NB25/FP
THERMAL DATA
TO-220TO 220FP
R
thj-case
R
thj-amb
R
thc-sink
T
AVALANCHE CHARACTERISTICS
SymbolParameterMax V alueUnit
I
AR
E
Ther mal Res istance Junct ion-caseMa x0.92.77
Ther mal Res istance Junct ion-ambientMax
Ther mal Res istance C as e -s inkTy p
Maximum Lead Tempera tur e For Soldering Purpose
l
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
Single Pul s e A v alan che Energy
AS
(starting T
=25oC, ID=IAR,VDD=50V)
j
max)
j
62.5
0.5
300
16A
250mJ
o
C/W
o
C/W
o
C/W
o
C
ELECTRICAL CHARACTERISTICS
=25oC unless otherwisespecified)
(T
case
OFF
SymbolParameterTest ConditionsMin.Typ.Max.Unit
V
(BR)DSS
Drain-source
ID=250µAVGS= 0250V
Break dow n Voltage
I
DSS
I
GSS
Zero Gate Voltage
Drain Current ( V
GS
Gat e- bod y Leak ag e
Current (V
DS
=0)
=0)
V
=MaxRating
DS
=MaxRatingTc=125oC
V
DS
V
=± 30 V
GS
1
10
100nA
±
ON(∗)
SymbolParameterTest ConditionsMin.Typ.Max.Unit
V
GS(th)
R
DS(on)
Gate Threshold Voltage VDS=VGSID= 250µA345V
Sta t ic Drain-s ource On
VGS=10V ID= 8 A0.220.28
Resistance
I
D(on)
On StateDrain Current VDS>I
D(on)xRDS(on)max
16A
VGS=10V
DYNAMIC
SymbolParameterTest ConditionsMin.Typ.Max.Unit
g
(∗)Forward
fs
Tr ansc on duc tance
C
C
C
Input Capaci t anc e
iss
Out put Capac it ance
oss
Reverse Transfer
rss
Capacit a nc e
VDS>I
D(on)xRDS(on)maxID
=8 A4S
VDS=25V f=1MHz VGS= 01000
250
40
µA
µA
Ω
pF
pF
pF
2/9
Page 3
STP16NB25/FP
ELECTRICAL CHARACTERISTICS
(continued)
SWITCHINGON
SymbolParameterTest ConditionsMin.Typ.Max.Unit
t
d(on)
t
Tur n-on Delay Time
Rise Tim e
r
VDD=125VID=8A
R
=4.7
G
Ω
VGS=10V
12
12
(Resis t iv e Load, s ee fig. 3)
Q
Q
Q
Tot al Gate C harge
g
Gat e- Source Charg e
gs
Gate-Drain Charge
gd
VDD= 200 V ID=16A VGS=10V29
9
11
38nC
SWITCHINGOFF
SymbolParameterTest ConditionsMin.Typ.Max.Unit
t
d(off)
Tur n-of f Dela y T im e
t
Fall T ime
f
VDD=125VID=8A
=4.7 ΩVGS=10V
R
G
35
8
(Resis t iv e Load, s ee fig. 3)
t
r(Voff)
t
t
Off-voltage Rise T im e
Fall T ime
f
Cross-over Time
c
V
R
=200VID=16A
CLAM P
=4.7 ΩVGS=10V
G
(Indu ct iv e Load, se e fig. 5)
10
9
20
SOURCEDRAINDIODE
SymbolParameterTest ConditionsMin.Typ.Max.Unit
I
V
I
SDM
SD
Q
I
RRM
SD
t
Source-drain Current
(•)
Source-drain Current
16
64
(pulsed)
(∗)ForwardOnVoltage ISD=16A VGS=01.5V
Reverse Recovery
rr
Time
Reverse Recovery
rr
ISD= 16 Adi/dt = 100 A /µs
=50VTj=150oC
V
DD
(see test circuit, fig. 5)
210
1.5
Charge
Reverse Recovery
14
Current
ns
ns
nC
nC
ns
ns
ns
ns
ns
A
A
ns
µC
A
(∗) Pulsed:Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safeoperating area
SafeOperating Area for TO-220SafeOperating Area for TO-220FP
3/9
Page 4
STP16NB25/FP
ThermalImpedancefor TO-220
OutputCharacteristics
ThermalImpedanceforTO-220FP
TransferCharacteristics
Transconductance
4/9
Static Drain-sourceOn Resistance
Page 5
STP16NB25/FP
Gate Charge vs Gate-sourceVoltage
NormalizedGate ThresholdVoltage vs
Temperature
CapacitanceVariations
NormalizedOn Resistancevs Temperature
Source-drainDiode Forward Characteristics
5/9
Page 6
STP16NB25/FP
Fig. 1:
UnclampedInductiveLoad Test Circuit
Fig. 3: SwitchingTimes Test CircuitsFor
ResistiveLoad
Information furnished is believed tobe accurateand reliable.However, STMicroelectronics assumes no responsibilityforthe consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specificationmentioned in thispublication are
subjecttochange without notice. This publication supersedes and replaces all information previously supplied.STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The STlogo is a trademark ofSTMicroelectronics
1999 STMicroelectronics – Printed in Italy – All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
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.
9/9
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