Datasheet STP14NF12FP, STP14NF12 Datasheet (SGS Thomson Microelectronics)

Page 1
STP14NF12
STP14NF12FP
N-CHANNEL 120V - 0.16- 14A TO-220/TO-220FP
LOW GATE CHARGE STripFET™ POWER MOSFET
TYPE V
STP14NF12 STP14NF12FP
TYPICAL R
EXCEPTIONAL dv/dt CAPABILITY
APPLICATION ORIENTED
DS
DSS
120 V 120 V
(on) = 0.16
R
DS(on)
< 0.18 < 0.18
I
D
14 A 14 A
CHARACTERIZATION
DESCRIPTION
This Power MOSFET series realized with STMicro­electronics uniqueSTripFET process has specifical­ly been designed to minimize input capacitance and gate charge. It is therefore suitable as primary switch in advanced high-efficiency isolated DC-DC converters for Telecom and Computer application. It is also intended for any application with low gate charge drive requirements
APPLICATIONS
HIGH-EFFICIENCY DC-DC CONVERTERS
UPS AND MOTOR CONTRO L
3
TO-220
2
1
TO-220FP
1
INTERNAL SCHEMATIC DIAGRAM
3
2
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
STP14NF12 STP14NF12FP
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
P
TOT
dv/dt (1) Peak Diode Recovery voltage slope 9 V/ns
E
AS
V
ISO
T
j
T
stg
() Pulse width limited by safe operating area
Drain-source Voltage (VGS=0) Drain-gate Voltage (RGS=20kΩ) Gate- source Voltage ±20 V Drain Current (continuous) at TC= 25°C Drain Current (continuous) at TC= 100°C
()
Drain Current (pulsed) 56 34 A Total Dissipation at TC= 25°C Derating Factor 0.4 0.17 W/°C
(2)
Single Pulse Avalanche Energy 60 mJ Insulation Withstand Voltage (DC) - 2500 V Operating Junction Temperature Storage Temperature
(1) ISD≤14A, di/dt 300A/µs, VDD≤ V (2) Starting Tj= 25°C, ID= 14A, VDD=50V
14 8.5 A
60 25 W
120 V 120 V
96A
-55 to 175 °C
(BR)DSS,Tj≤TJMAX.
1/9August 2002
Page 2
STP14NF12/STP14NF12FP
THERMAL DATA
TO-220 TO-220FP
Rthj-case Thermal Resistance Junction-case Max 2.5 6 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W
T
l
Maximum Lead Temperature For Soldering Purpose 300 °C
ELECTRICAL CHARACTERISTICS (T
= 25 °C UNLESS OTHERWISE SPECIFIED)
CASE
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
ID= 250 µA, VGS= 0 120 V
Breakdown Voltage
I
DSS
I
GSS
Zero Gate Voltage Drain Current (V
GS
Gate-body Leakage Current (V
DS
=0)
=0)
V
= Max Rating
DS
= Max Rating, TC= 125 °C
V
DS
V
= ±20V ±100 nA
GS
A
10 µA
ON (1)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
GS(th)
R
DS(on)
Gate Threshold Voltage Static Drain-source On
V
DS=VGS,ID
VGS=10V,ID=7A
= 250µA
234V
0.16 0.18
Resistance
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
(1) Forward Transconductance VDS=15V,ID=7A 4 S
g
fs
V
C
iss
C
oss
C
rss
Input Capacitance Output Capacitance 70 pF Reverse Transfer
Capacitance
=25V,f=1MHz,VGS=0
DS
460 pF
30 pF
2/9
Page 3
STP14NF12/STP14NF12FP
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
t
d(on)
Q Q Q
t
r
g gs gd
Turn-on Delay Time Rise Time 25 ns Total Gate Charge
Gate-Source Charge Gate-Drain Charge
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(off)
t
f
Turn-off-Delay Time Fall Time
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
VSD(1)
t
rr
Q
rr
I
RRM
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
Source-drain Current 14 A
(2)
Source-drain Current (pulsed) 56 A Forward On Voltage Reverse Recovery Time
Reverse Recovery Charge Reverse Recovery Current
=50V,ID=7A
DD
= 4.7VGS=10V
G
(Resistive Load, see Figure 3) VDD=80V,ID=14A,
V
=10V
GS
VDD=50V,ID=7A,
=4.7Ω, VGS= 10V
R
G
(Resistive Load, see Figure 3)
ISD=14A,VGS=0
= 14 A, di/dt = 100A/µs,
I
SD
VDD=50V,Tj= 150°C (see test circuit, Figure 5)
16 ns
15.5
21 nC
3.7
4.7
32
8
1.5 V
92
230
5
nC nC
ns ns
ns
nC
A
Safe Operating Area For TO-220
Safe Operating Area For TO-220FP
3/9
Page 4
STP14NF12/STP14NF12FP
Thermal Impedance For TO-220
Output Characteristics
Thermal Impedance For TO-220F P
Transfer Characteristics
Transconductance
4/9
Static Drain-source O n Resistance
Page 5
STP14NF12/STP14NF12FP
Capacitance VariationsGate Charge vs Gate-so urce Voltage
Normalized Gate Threshold Voltage vs Temp.
Source-drain Diode Forward Characteristics
Normalized On Resistance vs Temperature
Normalized BVDSS vs Temperature
5/9
Page 6
STP14NF12/STP14NF12FP
Fig. 2: Unclamped In duc tive WaveformFig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Tes t Circuit For
Resistive Load
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
6/9
Page 7
TO-220 MECHANICAL DATA
STP14NF12/STP14NF12FP
DIM.
A 4.40 4.60 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 0.107 E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.066 F2 1.14 1.70 0.044 0.066
G 4.95 5.15 0.194 0.202 G1 2.40 2.70 0.094 0.106 H2 10 10.40 0.393 0.409 L2 16.40 0.645 L3 28.90 1.137 L4 13 14 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.20 6.60 0.244 0.259 L9 3.50 3.93 0.137 0.154
DIA 3.75 3.85 0.147 0.151
MIN. TYP MAX. MIN. TYP. MAX.
mm. inch
0.173
0.181
1
7/9
Page 8
STP14NF12/STP14NF12FP
TO-220FP MECHANICAL DATA
DIM.
A 4.4 4.6 0.173 0.181 B 2.5 2.7 0.098 0.106 D 2.5 2.75 0.098 0.108 E 0.45 0.7 0.017 0.027
F 0.75 1 0.030 0.039 F1 1.15 1.7 0.045 0.067 F2 1.15 1.7 0.045 0.067
G 4.95 5.2 0.195 0.204
G1 2.4 2.7 0.094 0.106
H 10 10.4 0.393 0.409 L2 16 0.630 L3 28.6 30.6 1.126 1.204 L4 9.8 10.6 .0385 0.417 L5 2.9 3.6 0.114 0.141 L6 15.9 16.4 0.626 0.645 L7 9 9.3 0.354 0.366
Ø 3 3.2 0.118 0.126
MIN. TYP M AX. MIN. TYP. MAX.
mm. inch
8/9
E
A
D
B
L3
L6
L7
F1
F
G1
H
G
F2
123
L2
L5
L4
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STP14NF12/STP14NF12FP
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility f or the consequences of use of su ch in formation nor for any in fringement of paten ts or o ther rights of third parties w hich may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously suppli ed. STMi croelect ronics pr oducts are not author ized for use as c ritical component s in li fe suppo rt devi ces or systems without express written approval of STMicroelectronics.
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