Datasheet STG3685 Datasheet (ST)

Page 1
查询STG3685供应商
LOW VOLTAGE 0. 5Ω MAX DUAL SPDT SWITCH,
SINGLE ENABLE WITH BREAK BEFORE MAKE FEATURE
■ HIGH SPEED:
t
= 0.3ns (TYP.) at VCC = 3.0V
PD
t
= 0.4ns (TYP.) at VCC = 2.3V
PD
■ ULTRA LOW POWER DISSIPATION:
I
= 0.2µA (MAX.) at TA = 85°C
CC
■ LOW "ON" RESISTANCE V
R
= 0.4Ω (MAX. TA = 25°C) at VCC = 4.2V
ON
R
= 0.5Ω (MAX. TA = 25°C) at VCC = 3.0V
ON
R
= 0.6Ω (MAX. TA = 25°C) at VCC = 2.3V
ON
■ WIDE OPERATING VOLTAGE RANGE:
V
(OPR) = 1.4V to 4.3V SINGLE SUPPLY
CC
■ 4.3V TOLERANT AND 1.8V COMPATIBLE
THRESHOLD ON DIGITAL CONTROL INPUT at V
= 2.3 to 4.3V
■ LA TCH-UP PERFORMANCE EXCEEDS
CC
300mA (JESD 17)
■ ESD PERFORM. (ANALOG CHAN. vs GND):
HBM > 4KV (MIL STD 883 method 3015)
DESCRIPTION
The STG3685 is an high-speed CMOS DUAL ANALOG S.P.D.T. (Single Pole Dual Throw) SWITCH or DUAL 2:1 Multiplexer/Demultiplexer Bus Switch fabricated in silicon gate C technology. It is designed to operate from 1.4V to
4.3V, making this device ideal for portable applications. It offers very low ON-Resistance (<0.5Ω) at V
=3.0V. The IN i nput is p rovided to co ntrol the
CC
switches. The switches nS1 are ON (they are
= 0V:
I
2
MOS
STG3685
PRELIMINARY DATA
Flip-Chip
Table 1: Order Codes
PACKAGE T & R
Flip-Chip9 STG3685BJR
connected to common Ports Dn) when the IN input is held high and OFF (high impedance state exists between the two ports) when IN is held low; the switches nS2 are ON (they are connected to common Po rts Dn) when the I N input is hel d low and OFF (high impedance state exists between the two ports) when IN is held high. Additional key features are fast switching speed, Break Before Make Delay Time and Ultra Low Power Consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient exces s voltage. It’s available in the commercial temperature range Flip-chip package with E poxy Protection.
Figure 1: Pin Con nection (Top Through View) And Schemat ic Ci rc ui t
Rev. 2
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
1/10July 2005
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STG3685
Figure 2: Input Equivalent Circuit Table 2: Pin Description
PIN N° SYMBOL
NAME AND
FUNCTION
B2 IN Control
A3, A1 C3, C1
2S1, 1S1 2S2, 1S2
Independent Chan­nels
B3, B1 D2, D1 Common Channels
C2 GND Ground (0V) A2 V
CC
Positive Supply Voltage
Table 3: Truth Table
IN SWITCH S1 SWITCH S2
H ON OFF(*)
L OFF(*) ON
(*) High Im pedance
Table 4: Absolute Maximum Ratings
Symbol Parameter Value Unit
V
V
V
V
I
IKC
I
I
OK
I
I
OP
or I
I
CC
P
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. (1) Derate above 70°C: by 18.5 mW/ °C .
CC
IC O
IK
O
stg
Supply Voltage DC Input Voltage -0.5 to VCC + 0.5
I
DC Control Input Voltage DC Output Voltage -0.5 to VCC + 0.5 DC Input Diode Current on control pin (V
IN
< 0V) DC Input Diode Current (VIN < 0V) DC Output Diode Current DC Output Current DC Output Current Peak (pulse at 1ms, 10% duty cycle) DC VCC or Ground Current
GND
Power Dissipation at Ta=70°C (1)
D
Storage Temperature Lead Temperature (10 sec)
L
-0.5 to 4.6 V V
-0.5 to 4.6 V V
− 50 mA ± 50 mA
± 20 mA ± 300 mA ± 500 mA ± 100 mA
TBD mW
-65 to 150 °C 260 °C
Table 5: Recommended Operating Conditions
Symbol Parameter Value Unit
V
V
V
V
T
dt/dv
1) Truth T abl e guarante ed: 1.2V to 4.3V.
Supply Voltage (note 1)
CC
Input Voltage 0 to V
I
Control Input Voltage
IC
Output Voltage 0 to V
O
Operating Temperature
op
Input Rise and Fall Time Control Input V
= 1.4V to 2.7V
CC
V
= 3.0V to 3.6V
CC
1.4 to 4.3 V
CC
0 to 4.3 V
CC
-55 to 125 °C 0 to 20 0 to 10
2/10
V
V
ns/V
Page 3
Table 6: DC Specifications
Test Conditions Value
Symbol Parameter
V
High Level
IH
Input Voltage
V
Low Level
IL
Input Voltage
R
Switch ON
ON
Resistance (See Fig. 12)
R
FLAT
ON Resistance FLATNESS (1)
I
OFF State
OFF
Leakage Current (nSn), (Dn)
Input
I
IN
Leakage Current
I
Quiescent
CCL
Supply Current
I
Quiescent
CCH
Supply Current
V
CC
(V)
1.65-1.95 0.65V
2.3-2.5
2.7-3.0
3.3 1.5 1.5 1.5
3.6
4.3
1.65-1.95 0.40 0.40 0.40
2.3-2.5
2.7-3.6
3.3 0.50 0.50 0.50
3.6
4.3
4.3
3.0 300 500 600
2.7 300 500 600
2.3 350 600 800
1.8 550 2000 4000
1.4 1200 2500 5000
4.3
3.0
2.7 0.07 0.15 0.15
2.3
1.65
4.3
0 - 4.3 VIN=0 to 4.3V ±0.1 ± 1 µA
1.65-4.3 VIN=VCC or
4.2 V
STG3685
= 25°C
T
A
Min. Typ. Max. Min. Max. Min. Max.
CC
1.4 1.4 1.4
1.4 1.4 1.4
1.6 1.6 1.6
1.6 1.6 1.6
0.50 0.50 0.50
0.50 0.50 0.50
0.50 0.50 0.50
0.50 0.50 0.50
250 400 500
V
=0V to V
S
CC
IS=100mA
=0 to V
V
S
CC
IS=100mA
VS=0.3 or 4V ±10 ± 100 nA
±0.05 ±0.2 ±1 µA
GND
=1.65V 415 500 µA
IN
=1.8V 360 400
V
IN
=2.6V 120 150
V
IN
-40 to 85°C -55 to 125°C
0.65V
CC
0.65V
CC
Unit
V
V
mΩ
Ω
Note 1: Flatness is defi ned as the dif fe rence between the maximum and minimum value of on-resistance as measur ed over the speci fied analog signal ranges.
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STG3685
Table 7: AC Electrical Characteristics (CL = 35pF, RL = 50Ω, tr = tf ≤ 5ns)
Test Condition Value
= 25°C
Symbol Parameter
t
PLH, tPHL
t
t
Propagation Delay 1.65-1.95 0.45
TURN-ON time 1.65-1.95 VS=0.8V
ON
TURN-OFF time 1.65-1.95 VS=0.8V
OFF
Break Before Make Time Delay
t
D
Q Charge injection 1.65-1.95
T
V
CC
(V)
A
Min. Typ. Max. Min. Max. Min. Max.
2.3-2.7 0.40
3.0-3.6 0.30
3.6-4.3 0.30 70
2.3-2.7
V
3.0-3.6 32 50 60
=1.5V
S
32 50 60
3.6-4.3 30 50 60 45
2.3-2.7
V
3.0-3.6 15 30 40
=1.5V
S
25 30 40
3.6-4.3 15 30 40
1.65-1.95
2.3-2.7 2 15
3.0-3.6 2 15
3.6-4.3 2 15
2.3-2.7 40
3.0-3.6 35
3.6-4.3 35
C
=35pF
L
R
L
V
S
C
= 100pF
L
R
= 1MΩ
L
V
GEN
R
GEN
= 50Ω
=1.5V
50
= 0V = 0Ω
-40 to 85°C -55 to 125°C
Unit
ns
ns
ns
ns
pC
Table 8: Analog Switch Characteristics (C
= 5pF, RL = 50Ω, TA = 25°C)
L
Test Condition Value
Symbol Parameter
OIRR Off Isolation (1) 1.65-4.3 V
V
(V)
CC
= 1V
S
Min. Typ. Max. Min. Max. Min. Max.
RMS
f= 100KHz
Xtalk Crosstalk 1.65-4.3 V
= 1V
S
RMS
f= 100KHz
THD Total Harmonic
Distortion
2.3-4.3 R
= 600Ω
L
V
= 2V
I
PP
f = 20Hz to 20kHz
BW -3dB Bandwidth 1.65-4.3 R C
C
Control Pin Input
IN
Capacitance Sn Port Capaci-
Sn
tance D Port Capaci-
C
tance when
D
3.3
3.3
= 50Ω
L
f = 1MHz 35
f = 1MHz 91
Switch is Enabled
Note 1: Off Isolation = 20Log10 (VD/VS), VD = output. VS = input at off switch.
= 25°C
T
A
-40 to 85°C -55 to 125°C
-64 dB
-32 dB
0.03 %
50 MHz 10
Unit
pF
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STG3685
Figure 3: On Resistance
Figure 4: Off Leakage
Figure 6: Bandwi dth
Figure 7: Channel To Channel Crosstalk
Figure 5: Off Isolation
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STG3685
Figure 8: Test Circuit
CL = 5/35pF or equivalent (includes jig and probe capacitance)
= 50Ω or equivalent
R
L
R
= Z
of pulse generator (typically 50Ω)
T
OUT
Figure 9: Break Before Make Time Delay
Figure 10: Charge Injection (V
GEN
= 0V, R
= 0Ω, RL = 1MΩ, CL = 100pF)
GEN
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Page 7
Figure 11: Tur n On, Turn Off Delay Time
TYPICAL CHARACTERISTICS
STG3685
Figure 12: Swit ch-On R
vs VIN
ON
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Page 8
STG3685
DIM.
A 1.591.641.6962.664.666.5
B 1.421.471.5255.957.959.8
C0.8031.5
D 0.295 0.32 0.345 11.6 12.6 13.6
E 0.5 19.7
F 0.350.400.4513.815.717.7
G 0.25 9.8
Flip-Chip9 MECHANICAL DATA
mm. mils
MIN. TYP MAX. MIN. TYP. MAX.
H 0.061 0.0635 0.066 2.4 2.5 2.6
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Table 9: Revision History
Date Revisio n Description of Change s
13-Jan-2005 1 First Release.
04-Jul-2005 2 The Q Values on Table 7 has been updated.
STG3685
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STG3685
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