The STG3685 is an high-speed CMOS DUAL
ANALOG S.P.D.T. (Single Pole Dual Throw)
SWITCH or DUAL 2:1 Multiplexer/Demultiplexer
Bus Switch fabricated in silicon gate C
technology. It is designed to operate from 1.4V to
4.3V, making this device ideal for portable
applications.
It offers very low ON-Resistance (<0.5Ω) at
V
=3.0V. The IN i nput is p rovided to co ntrol the
CC
switches. The switches nS1 are ON (they are
= 0V:
I
2
MOS
STG3685
PRELIMINARY DATA
Flip-Chip
Table 1: Order Codes
PACKAGET & R
Flip-Chip9STG3685BJR
connected to common Ports Dn) when the IN input
is held high and OFF (high impedance state exists
between the two ports) when IN is held low; the
switches nS2 are ON (they are connected to
common Po rts Dn) when the I N input is hel d low
and OFF (high impedance state exists between
the two ports) when IN is held high. Additional key
features are fast switching speed, Break Before
Make Delay Time and Ultra Low Power
Consumption. All inputs and outputs are equipped
with protection circuits against static discharge,
giving them ESD immunity and transient exces s
voltage. It’s available in the commercial
temperature range Flip-chip package with E poxy
Protection.
Figure 1: Pin Con nection (Top Through View) And Schemat ic Ci rc ui t
Rev. 2
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
(1) Derate above 70°C: by 18.5 mW/ °C .
CC
IC
O
IK
O
stg
Supply Voltage
DC Input Voltage-0.5 to VCC + 0.5
I
DC Control Input Voltage
DC Output Voltage-0.5 to VCC + 0.5
DC Input Diode Current on control pin (V
IN
< 0V)
DC Input Diode Current (VIN < 0V)
DC Output Diode Current
DC Output Current
DC Output Current Peak (pulse at 1ms, 10% duty cycle)
DC VCC or Ground Current
GND
Power Dissipation at Ta=70°C (1)
D
Storage Temperature
Lead Temperature (10 sec)
L
-0.5 to 4.6V
V
-0.5 to 4.6V
V
− 50mA
± 50mA
± 20mA
± 300mA
± 500mA
± 100mA
TBDmW
-65 to 150°C
260°C
Table 5: Recommended Operating Conditions
SymbolParameterValueUnit
V
V
V
V
T
dt/dv
1) Truth T abl e guarante ed: 1.2V to 4.3V.
Supply Voltage (note 1)
CC
Input Voltage0 to V
I
Control Input Voltage
IC
Output Voltage0 to V
O
Operating Temperature
op
Input Rise and Fall Time Control InputV
= 1.4V to 2.7V
CC
V
= 3.0V to 3.6V
CC
1.4 to 4.3V
CC
0 to 4.3V
CC
-55 to 125°C
0 to 20
0 to 10
2/10
V
V
ns/V
Page 3
Table 6: DC Specifications
Test ConditionsValue
SymbolParameter
V
High Level
IH
Input Voltage
V
Low Level
IL
Input Voltage
R
Switch ON
ON
Resistance
(See Fig. 12)
R
FLAT
ON
Resistance
FLATNESS
(1)
I
OFF State
OFF
Leakage
Current
(nSn), (Dn)
Input
I
IN
Leakage
Current
I
Quiescent
CCL
Supply
Current
I
Quiescent
CCH
Supply
Current
V
CC
(V)
1.65-1.950.65V
2.3-2.5
2.7-3.0
3.31.51.51.5
3.6
4.3
1.65-1.950.400.400.40
2.3-2.5
2.7-3.6
3.30.500.500.50
3.6
4.3
4.3
3.0300500600
2.7300500600
2.3350600800
1.855020004000
1.4120025005000
4.3
3.0
2.70.070.150.15
2.3
1.65
4.3
0 - 4.3VIN=0 to 4.3V±0.1± 1µA
1.65-4.3VIN=VCC or
4.2V
STG3685
= 25°C
T
A
Min.Typ.Max.Min.Max.Min.Max.
CC
1.41.41.4
1.41.41.4
1.61.61.6
1.61.61.6
0.500.500.50
0.500.500.50
0.500.500.50
0.500.500.50
250400500
V
=0V to V
S
CC
IS=100mA
=0 to V
V
S
CC
IS=100mA
VS=0.3 or 4V±10± 100nA
±0.05±0.2±1µA
GND
=1.65V415500µA
IN
=1.8V360400
V
IN
=2.6V120150
V
IN
-40 to 85°C-55 to 125°C
0.65V
CC
0.65V
CC
Unit
V
V
mΩ
Ω
Note 1: Flatness is defi ned as the dif fe rence between the maximum and minimum value of on-resistance as measur ed over the speci fied
analog signal ranges.
Note 1: Off Isolation = 20Log10 (VD/VS), VD = output. VS = input at off switch.
= 25°C
T
A
-40 to 85°C -55 to 125°C
-64dB
-32dB
0.03%
50MHz
10
Unit
pF
4/10
Page 5
STG3685
Figure 3: On Resistance
Figure 4: Off Leakage
Figure 6: Bandwi dth
Figure 7: Channel To Channel Crosstalk
Figure 5: Off Isolation
5/10
Page 6
STG3685
Figure 8: Test Circuit
CL = 5/35pF or equivalent (includes jig and probe capacitance)
= 50Ω or equivalent
R
L
R
= Z
of pulse generator (typically 50Ω)
T
OUT
Figure 9: Break Before Make Time Delay
Figure 10: Charge Injection (V
GEN
= 0V, R
= 0Ω, RL = 1MΩ, CL = 100pF)
GEN
6/10
Page 7
Figure 11: Tur n On, Turn Off Delay Time
TYPICAL CHARACTERISTICS
STG3685
Figure 12: Swit ch-On R
vs VIN
ON
7/10
Page 8
STG3685
DIM.
A 1.591.641.6962.664.666.5
B 1.421.471.5255.957.959.8
C0.8031.5
D0.2950.320.34511.612.613.6
E0.519.7
F 0.350.400.4513.815.717.7
G0.259.8
Flip-Chip9 MECHANICAL DATA
mm.mils
MIN.TYPMAX.MIN.TYP.MAX.
H0.0610.06350.0662.42.52.6
8/10
Page 9
Table 9: Revision History
DateRevisio nDescription of Change s
13-Jan-20051First Release.
04-Jul-20052The Q Values on Table 7 has been updated.
STG3685
9/10
Page 10
STG3685
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