The STG3682 is a high-speed CMOS low voltage
dual analog S.P.D.T. (Single Pole Dual Throw)
Switch or 2:1 Multiplexer /Demultiplexer Switch
fabricated in silicon gate C
designed to operate from 1.65V to 4.3V, making
this device ideal for portable applications.
The nSEL inputs are provided to control the
switch. The switch S1 is ON (they are connected
to common Ports Dn) when the nSEL input is held
high and OFF (high impedance state exists
between the two ports) when SEL is held low; the
switch S2 is ON (it is connected to common Port
D) when the nSEL input is held low and OFF (high
impedance state exists between the two ports)
when nSEL is held high.
2
MOS technology. It is
Additional key features are fast switching speed,
Break Before Make Delay Time and Ultra Low
Power Consumption. All inputs and outputs are
equipped with protection circuits against static
discharge, giving them ESD immunity and
transient excess voltage.
Note:Exposed pad must be soldered to a floating plane. Do NOT connect to power or ground.
3/19
Page 4
Device summarySTG3682
2 Device summary
Figure 2.Input equivalent circuit
D
SEL
Table 2. Truth table
SELSwitch S1Switch S2
HON
L
1. High Impedance
OFF
(1)
S2
OFF
ON
S1
(1)
4/19
Page 5
STG3682Maximum rating
3 Maximum rating
Stressing the device above the rating listed in the “Absolute Maximum Ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.
Table 3. Absolute maximum ratings
SymbolParameterValueUnit
V
V
I
I
I
I
CC
I
GND
T
1. Derate above 70ºC by 18.5mW/C
Supply voltage-0.5 to 5.5V
CC
V
DC input voltage
I
DC control input voltage-0.5 to 5.5V
IC
V
DC output voltage
O
DC input diode current on control pin (V
IKC
I
DC input diode current (V
IK
DC output diode current±20mA
OK
I
DC output current±128mA
O
DC output current peak (pulse at 1ms, 10% duty cycle)±300mA
OP
or
DC VCC or ground current
P
Power dissipation at TA = 70°C
D
Storage temperature-65 to 150°C
stg
T
Lead temperature (10 sec)300°C
L
SEL
<0V)
(1)
SEL
<0V)
-0.5 to V
-0.5 to V
CC
CC
-50mA
±50mA
±100mA
1120mW
+ 0.5
+ 0.5
V
V
3.1 Recommended operating conditions
Table 4. Recommended operating conditions
SymbolParameterValueUnit
V
CC
Supply voltage
V
Input voltage0 to V
I
V
V
T
dt/dv
1. Truth Table guaranteed: 1.2V to 4.3V
Control input voltage0 to 4.3V
IC
Output voltage0 to V
O
Operating temperature-40 to 85°C
op
Input rise and fall time control
input
(1)
V
= 1.65V to 2.7V
CC
V
= 3.0 to 4.3V
CC
5/19
1.65 to 4.3V
CC
CC
0 to 20
ns/V
0 to 10
V
V
Page 6
Electrical characteristicsSTG3682
4 Electrical characteristics
Table 5. DC specifications
Test conditionsValue
T
SymbolParameter
High level
V
IH
input voltage
Low level
V
IL
input voltage
Switch ON
R
PEAK
peak
resistance
ON
Switch On
resistance
R
ON
resistance
ON
match
∆R
between
channels
(1)
ON
FLAT
resistance
flatness
(2)
R
OFF state
OFF
leakage
current
I
(SN), (D)
Vcc (V)
1.65 -1.95
0.65V
2.3-2.51.21.2
2.7-3.01.31.3
3.3-3.61.41.4
4.31.61.6
1.65-1.950.25
2.3-2.50.25
2.7-3.00.25
3.3-3.60.30
4.30.40
1.8
2.76.38.0
3.05.87.5
= 0V to V
V
S
IS = 8mA
CC
3.75.06.5
4.34.66.0
= 3V IS = 8mA
3.0
3.0
V
S
= 0.8V IS = 8mA
V
S
1.8
2.7
3.00.3
3.7
@ RON Max
V
S
= 8mA
I
S
4.3
1.8
2.72.0
3.01.7
= 0V to V
V
S
IS = 8mA
CC
3.71.5
4.31.6
= 0.3 or 4V
4.3
V
S
= 25°C
A
-40 to 85°C
MinTypMaxMinMax
CC
0.65V
CC
12.016.0
4.05.2
5.06.5
6.6
±20±100nA
Unit
V
V
Ω
Ω
Ω
Ω
6/19
Page 7
STG3682Electrical characteristics
Table 5. DC specifications
Test conditionsValue
T
SymbolParameter
Vcc (V)
= 25°C
A
MinTypMaxMinMax
Input
I
IN
leakage
0 to 4.3
V
SEL
= 0 to 4.3V
±0.1±1µA
current
Quiescent
I
CC
supply
1.65 to 4.3
= VCC or GND
V
SEL
±0.1±1.0µA
current
V
1-2SEL,
V
V
V
V
I
CCLV
Quiescent
supply
current low
voltage
driving
4.3
V
1. Note 1: ∆Ron = max |mSN-nSN|, where m = 1..4 and n = 1..4, N = 1..2
2. Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges.
Table 7. Analog switch characteristics (CL = 5pF, RL = 50Ω, TA = 25°C)
Test ConditionsValue
T
SymbolParameter
Vcc (V)
= 25°C
A
MinTypMaxMinMax
OIRR
OFF Isolation
(1)
1.65 - 4.3
XtalkCrosstalk1.65 - 4.3
BW-3dB bandwidth3.0 - 4.3
D
Differential gain3.0 - 4.3 RL = 150Ω0.64%
G
D
Differential phase3.0 - 4.3 RL = 150Ω0.1deg
P
C
Control pin input
IN
capacitance
= 1V
V
S
Signal = 0 dBm
VS = 1V
Signal = 0 dBm
= 1V
V
S
Signal = 0 dBm
VS = 1V
Signal = 0 dBm
= 50Ω
R
L
Signal = 0dBm
V
= 0V
CC
RMS,
RMS,
RMS,
RMS,
f = 1MHz
f = 10MHz
f = 1MHz
f = 10MHz
-79
-60
-78
-61
800MHz
6.2
Sn Port
C
capacitance when
ON
3.3f = 1MHz22
switch is enabled
Sn Port
C
capacitance when
OFF
3.3f = 1MHz21
switch is disabled
1. Off Isolation = 20Log10 (VD/VS), VD = output. VS = input to off switch.
Table 8. USB related AC electrical characteristics
Test conditionsValue
SymbolParameter
t
SK(0)
t
SK(P)
Channel-to-channel skew3.0 to 3.6
Skew of opposite transition
of the same output
T
Total jitter3.0 to 3.6
J
V
(V)
CC
3.0 to 3.6
=10pF
C
L
CL=10pF
R
= 50Ω,
L
= 10pF,
C
L
= tF = 750ps
t
R
T
A
MinTypMaxMinMax
at 480Mbps
Unit
Unit
= 25°C
-40 to 85°C
-40 to 85°C
26ps
60ps
130ps
dB
dB
pF
9/19
Page 10
Test circuitsSTG3682
5 Test circuits
Figure 3.ON-ResistanceFigure 4.Bandwidth
Figure 5.OFF LeakageFigure 6.Channel to channel crosstalk
Figure 7.OFF Isolation
10/19
Page 11
STG3682Test circuits
Figure 8.Test circuit
Note: 1 CL = 5/35pF or equivalent: (includes jig capacitance)
= 50Ω or equivalent
2R
L
3R
T
= Z
of pulse generator (typically 50Ω)
OUT
11/19
Page 12
Test circuitsSTG3682
Figure 9.Break-before-make time delay
Figure 10. Switching time and charge injection
(V
= 0V, R
GEN
= 0Ω, RL = 1MΩ, CL = 100pF)
GEN
Figure 11. Turn ON, turn OFF delay time
12/19
Page 13
STG3682Package mechanical data
6 Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
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