The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established stripbased PowerMESH™ layout. In addition to pushing
on-resistance significantly down,specialcareis taken to ensure a very good dv/dt capability for the
most dem anding applications. Such series complements ST full range of high voltage MOSFETs i ncluding revolutionary MDm es h™ products.
Drain-source Voltage (VGS=0)
Drain-gate Voltage (RGS=20kΩ)
Gate- source Voltage± 30V
Drain Current (continuous) at TC=25°C
Drain Current (continuous) at TC= 100°C
5.65.6 (*)A
3.53.5 (*)A
Drain Current (pulsed)22.422.4 (*)A
Total Dissipation at TC=25°C
9025W
Derating Factor0.720.2W/°C
V
ESD(G-S)
Gate source ESD(HBM-C=100pF, R=1.5KΩ)3000V
dv/dt (1)Peak Diode Recovery voltage slope4.5V/ns
V
ISO
T
j
T
stg
() Pulse width limited by safe operating area
(1) I
≤ 5.6A, di/dt ≤ 200 A/µs, VDD≤ V
SD
(*) Limited only by maximum temperature allowed
Insulation Withstand Voltage (DC)-2500V
Operating Junction Temperature
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
max)
j
Single Pulse Avalanche Energy
(starting T
=25°C, ID=IAR,VDD=50V)
j
5.6A
180mJ
GATE-SOURCE ZENER DIODE
SymbolParameterTest ConditionsMin.Typ.Max.Unit
BV
GSO
Gate-SourceBreakdown
Igs=± 1mA (Open Drain)30V
Voltage
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes hav e specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this r es pect the Zener v olt age is appropriate to achieve an efficient and
cost-effective intervention to prote ct the device’s integrity. These integrated Z ener diodes thus avoid the
usage of external components.
2/12
Page 3
STP6NK50Z - STF6NK50Z - STD6NK50Z
ELECTRICAL CHARACTERISTICS (T
=25°C UNLESS O THERWISE SPECIFIED)
CASE
ON/OFF
SymbolParameterTest ConditionsMin.Typ.Max.Unit
V
(BR)DSS
Drain-source
ID=1mA,VGS= 0500V
Breakdown Voltage
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Zero Gate Voltage
Drain Current (V
GS
=0)
Gate-body Leakage
Current (V
DS
=0)
Gate Threshold Voltage
Static Drain-source On
V
=MaxRating
DS
=MaxRating,TC= 125 °C
V
DS
V
= ± 20V±10µA
GS
V
DS=VGS,ID
= 50µA
33.754.5V
1
50
VGS=10V,ID= 2.8 A0.931.2Ω
Resistance
DYNAMIC
SymbolParameterTest ConditionsMin.Typ.Max.Unit
g
(1)Forward TransconductanceVDS=8V,ID=2.8A4.3S
fs
C
oss eq.
C
C
C
t
d(on)
t
d(off)
Q
Q
Q
iss
oss
rss
t
r
t
gs
gd
f
g
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
(3)Equivalent Output
Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
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