Datasheet STD4NS25 Datasheet (SGS Thomson Microelectronics)

STD4NS25

N-CHANNEL 250V - 0.9Ω - 4A DPAK/IPAK

MESH OVERLAY™ MOSFET

TYPE V

DSS

STD4NS25 250 V < 1.1

■ TYPICAL R

■ EXTREMELY HIGH dv /d t C APABILITY

■ 100% AVALANCHE TESTED

■ ADD SUFFIX “T4” FOR ORDERING IN TAPE &

(on) = 0.9 Ω

DS

R

DS(on)

I

D

Ω

4 A

REEL

DESCRIPTION

Using the latest high voltage MESH OVERLAY™
process, STMicroelectronics has designed an ad­vanced family of power MOSFETs with outstanding
performance. The new patented STrip layout cou­pled with the Company’s proprietary edge termina­tion structure, makes it suitable in coverters for
lighting applications.

APPLICATIONS

■ HIGH CURRENT, HIGH SPEED SWITCHING

■ SWITH MODE POWER SUPPLI ES ( SMPS)

■ DC-DC CONVERTERS FOR TELECOM,

INDUSTRIAL, AND LIGHTING EQUIPMENT

3

1

DPAK

TO-252

INTERNAL SCHEMATIC DIAGRAM

IPAK

TO-251

3

2

1

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

V

DS

V

DGR

V

GS

I

D

I

D

I

DM

P

TOT

dv/dt (1) Peak Diode Recovery voltage slope 5 V/ns

T

stg

T

j

(•)Pu l se width limited by safe operating area

Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)

250 V
250 V

Gate- source Voltage ± 20 V

Drain Current (continuos) at TC = 25°C
Drain Current (continuos) at TC = 100°C

(●)

Drain Current (pulsed) 16 A
Total Dissipation at TC = 25°C

4A

2.5 A

50 W

Derating Factor 0.4 W/°C

Storage Temperature –65 to 150 °C
Max. Operating Junction Temperature 150 °C

(1) I

≤

4A, di/dt≤300 A/µs, V

SD

DD

≤

V

(BR)DSS

, Tj≤T

jMAX

1/9February 2001

STD4NS25

THERMA L D ATA

Rthj-case Thermal Resistance Junction-case Max 2.5 °C/W

Rthj-amb Thermal Resistance Junction-ambient Max 100 °C/W

Rthc-sink Thermal Resistance Case-sink Typ 1.5 °C/W

T

l

AVALANCHE CHARACTERISTICS

Symbol Parameter Max Value Unit

I

AR

E

AS

ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF

Symbol Parameter Test Conditions Min. Typ. Max. Unit

V

(BR)DSS

I

DSS

I

GSS

Maximum Lead Temperature For Soldering Purpose 275 °C

Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T

max)

j

Single Pulse Avalanche Energy
(starting T

Drain-source

= 25 °C, ID = IAR, VDD = 50 V)

j

ID = 250 µA, VGS = 0 250 V

4A

120 mJ

Breakdown Voltage

= Max Rating

Zero Gate Voltage
Drain Current (V

GS

Gate-body Leakage
Current (V

DS

= 0)

= 0)

V

DS

V

= Max Rating, TC = 125 °C

DS

V

= ±20V ±100 nA

GS

1µA

10 µA

ON

(1)

Symbol Parameter Test Conditions Min. Typ. Max. Unit

V

V

GS(th)

R

DS(on)

Gate Threshold Voltage
Static Drain-source On

= VGS, ID = 250µA

DS

VGS = 10V, ID = 2 A

234V

0.9 1.1

Resistance

I

D(on)

On State Drain Current VDS > I

D(on)

x R

DS(on)max,

4A

VGS=10V

DYNAMIC

Symbol Parameter Test Conditions Min. Typ. Max. Unit

(1) Forward Transconductance VDS > I

g

fs

C

iss

C

oss

C

rss

Input Capacitance
Output Capacitance 64 pF
Reverse Transfer

Capacitance

ID=2A

V

DS

D(on)

x R

DS(on)max,

= 25V, f = 1 MHz, VGS = 0

1 3.5 S

355 pF

29.5 pF

Ω

2/9

STD4NS25

ELECTRICAL CHARACTERISTICS (CONTINUED)

SWITCHING ON

Symbol Parameter Test Conditions Min. Typ. Max. Unit

V

t

d(on)

Q
Q
Q

t

r

g
gs
gd

Turn-on Delay Time
Rise Time 18 ns
Total Gate Charge

Gate-Source Charge 3.2 nC
Gate-Drain Charge 7.5 nC

SWITCHING OFF

Symbol Parameter Test Conditions Min. Typ. Max. Unit

t

d(Voff)

t

t

r(Voff)

t
t

f

f

c

Turn-off- Delay Time
Fall Time

Off-voltage Rise Time
Fall Time
Cross-over Time

SOURCE DRAIN DIODE

Symbol Parameter Test Conditions Min. Typ. Max. Unit

I

SD

I

SDM

VSD (1)

t

rr

Q

rr

I

RRM

Note: 1. Pulsed: Pu l se duration = 300 µs, duty cycle 1.5 %.

2. Pulse width li mited by safe operating ar ea.

Source-drain Current 4 A

(2)

Source-drain Current (pulsed) 16 A
Forward On Voltage
Reverse Recovery Time

Reverse Recovery Charge 0.5
Reverse Recovery Current 7.2 A

= 125 V, ID = 2 A

DD

RG= 4.7Ω VGS = 10 V
(see test circuit, Figure 3)

V

= 200V, ID = 4 A,

DD

VGS = 10V

VDD = 125V, ID = 2 A,
RG=4.7Ω, V

GS

= 10V

(see test circuit, Figure 3)
V

= 200V, ID = 4 A,

clamp

R

=4.7Ω, V

G

GS

= 10V

(see test circuit, Figure 5)

ISD = 4 A, VGS = 0
I

= 4 A, di/dt = 100A/µs

SD

VDD = 30V, Tj = 150°C
(see test circuit, Figure 5)

12 ns

19 27 nC

70

10.5

13
10

21.5

1.5 V

124 ns

ns
ns

ns
ns
ns

µ

C

Thermal Imp e danceSafe Operating Area

3/9

STD4NS25

Output Characteristics Transfer Characteristics

Transconductance

Gate Charge vs Gate-source Voltage

Static Drain-source On Resistance

Capacitance Variations

4/9

Source-drain Diode Forward Characteristics

STD4NS25

Normalized On Resistance vs Temperatur eNormalized Gate Thereshold Voltage vs Temp.

5/9

STD4NS25

Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit

Fig. 3: Switching Times Test Circuit For

Resistive Load

Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times

Fig. 4: Gate Charge test Circuit

6/9

TO-252 (DPAK) MECHANICAL DATA

STD4NS25

DIM.

A 2.20 2.40 0.087 0.094
A1 0.90 1.10 0.035 0.043
A2 0.03 0.23 0.001 0.009

B 0.64 0.90 0.025 0.035
B2 5.20 5.40 0.204 0.213

C 0.45 0.60 0.018 0.024
C2 0.48 0.60 0.019 0.024

D 6.00 6.20 0.236 0.244

E 6.40 6.60 0.252 0.260

G 4.40 4.60 0.173 0.181

H 9.35 10.10 0.368 0.398
L2 0.8 0.031
L4 0.60 1.00 0.024 0.039
V2 0

MIN. TYP. MAX. MIN. TYP. MAX.

o

mm inch

o

8

o

0

o

0

P032P_B

7/9

STD4NS25

TO-251 (IPAK) MECHANICAL DAT A

DIM.

MIN. TYP. MAX. MIN. TYP. MAX.

mm inch

A 2.2 2.4 0.086 0.094
A1 0.9 1.1 0.035 0.043
A3 0.7 1.3 0.027 0.051

B 0.64 0.9 0.025 0.031
B2 5.2 5.4 0.204 0.212
B3 0.85 0.033
B5 0.3 0.012
B6 0.95 0.037

C 0.45 0.6 0.017 0.023
C2 0.48 0.6 0.019 0.023

D 6 6.2 0.236 0.244

E 6.4 6.6 0.252 0.260

G 4.4 4.6 0.173 0.181

H 15.9 16.3 0.626 0.641

L 9 9.4 0.354 0.370

L1 0.8 1.2 0.031 0.047
L2 0.8 1 0.031 0.039

H

8/9

A

C2

L2

E

B2

= =

= =

D

B3

2

1 3

L1

A1

L

B6

C

A3

B

B5

G

= =

0068771-E

STD4NS25

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subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
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