technology that associates the Multiple Drain process with the Company’s PowerMESH™ horizontal
layout. The resulting product has an outstanding low
on-resistance, impressively high dv/dt and excellent
avalanche characteristics. The adoption of the
Company’s proprietary strip technique yields overall
dynamic performance that is significantly better than
that of similar completition’s products.
IPAK
TO-220
3
1
DPAK
INTERNAL SCHEMATIC DIAGRAM
2
1
APPLICATIONS
The MDmesh™ family is very suitable for increase
the power density of high voltage converters allowing system miniaturization and higher efficiencies.
ORDERING INFORMATION
SALES TYPEMARKINGPACKAGEPACKAGING
STP4NM60P4NM60TO-220TUBE
STD3NM60T4D3NM60DPAKTAPE & REEL
STD3NM60-1D3NM60IPAKTUBE
1/12September 2002
Page 2
STP4NM60 / STD3NM60 / STD3NM60-1
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
STP4NM60
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
P
TOT
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
600V
600V
Gate- source Voltage± 30V
Drain Current (continuous) at TC = 25°C
Drain Current (continuous) at TC = 100°C
(l)
Drain Current (pulsed)1612A
Total Dissipation at TC = 25°C
43A
2.521.9A
6942W
Derating Factor0.550.33W/°C
dv/dt (1)Peak Diode Recovery voltage slope15V/ns
T
j
T
stg
(l) Pulse wi dth limited by safe operating area
(1) I
≤3A, di/dt ≤400 µA, VDD ≤ V
SD
Operating Junction Temperature
Storage Temperature
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
max)
j
Single Pulse Avalanche Energy
(starting T
= 25 °C, ID = IAR, VDD = 50 V)
j
1.5A
200mJ
GATE-SOURCE ZENER DIODE
SymbolParameterTest ConditionsMin.Typ.Max.Unit
BV
GSO
Gate-Source Breakdown
Igs=± 1mA (Open Drain)30V
Voltage
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.
2/12
Page 3
STP4NM60 / STD3NM 60 / STD3NM60-1
ELECTRICAL CHARACTERISTICS (T
=25°C UNLESS OTHERWISE SPECIFIED)
CASE
ON/OFF
SymbolParameterTest ConditionsMin.Typ.Max.Unit
V
(BR)DSS
Drain-source
ID = 250 µA, VGS = 0600V
Breakdown Voltage
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Zero Gate Voltage
Drain Current (V
GS
= 0)
Gate-body Leakage
Current (V
DS
= 0)
Gate Threshold Voltage
Static Drain-source On
V
= Max Rating
DS
VDS = Max Rating, TC = 125 °C
V
= ± 20V±5µA
GS
V
= VGS, ID = 250µA
DS
345V
1
10
VGS = 10V, ID = 1.5 A1.31.5Ω
Resistance
DYNAMIC
SymbolParameterTest ConditionsMin.Typ.Max.Unit
g
(1)Forward TransconductanceVDS = 15 V, ID= 1.5 A 2.7S
fs
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
= 25V, f = 1 MHz, VGS = 0324
V
DS
132
7.4
SWITCHING ON
SymbolParameterTest ConditionsMin.Typ.Max.Unit
t
d(on)
Q
Q
Q
Turn-on Delay Time
t
r
g
gs
gd
Rise Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDD = 300 V, ID = 1.5 A
RG= 4.7Ω VGS = 10 V
(Resistive Load see, Figure 3)
= 480V, ID = 3 A,
V
DD
V
= 10V
GS
9
4
10
3
4.7
14
µA
µA
pF
pF
pF
ns
ns
nC
nC
nC
SWITCHING OFF
SymbolParameterTest ConditionsMin.Typ.Max.Unit
= 480 V, ID = 3 A,
t
r(Voff)
t
t
Off-voltage Rise Time
f
c
Fall Time
Cross-over Time
V
DD
RG=4.7Ω, V
GS
= 10V
(Inductive Load see, Figure 5)
16.5
10.5
15
SOURCE DRAIN DIODE
SymbolParameterTest ConditionsMin.Typ.Max.Unit
I
SD
I
SDM
VSD (1)
t
rr
Q
rr
I
RRM
t
rr
Q
rr
I
RRM
Note: 1. Pulsed: Pu l se duration = 300 µs, duty c ycle 1.5 %.
2. Pulse width li mited by safe operating area.
Source-drain Current
(2)
Source-drain Current (pulsed)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD = 3 A, VGS = 0
I
SD
V
DD
(see test circuit, Figure 5)
I
SD
VDD = 100 V, Tj = 150°C
(see test circuit, Figure 5)
= 3 A, di/dt = 100A/µs
= 100 V, Tj = 25°C
= 3 A, di/dt = 100A/µs
224
1
9
296
1.4
9.3
3
12
1.5V
ns
ns
ns
A
A
ns
µC
A
ns
µC
A
3/12
Page 4
STP4NM60 / STD3NM60 / STD3NM60-1
Safe Operating Area For TO-220
Thermal Impedance For TO-220
Thermal Impedance For DPAK / IPAKSafe Operating Area For DPAK / IPAK
Output Characteristics
4/12
Transfer Characteristics
Page 5
STP4NM60 / STD3NM 60 / STD3NM60-1
Static Drain-source On ResistanceTransconductanc e
Capacitance VariationsGate Charge vs Gate-source Voltage
Normalized On Resistance vs Temperatur eNormalized Gate Threshold Volta ge vs Temp.
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for t he
consequences of use of su ch in formation nor for any in fringement of patents or other rights of third parties w hich may result from
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mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously suppli ed. STMi croelect ronics pr oducts are not author ized for use as cr itical component s in li fe suppo rt devi ces or
systems without express written approval of STMicroelectronics.
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