Datasheet STD30NF03L Datasheet (SGS Thomson Microelectronics)

Page 1
STD30NF03L
N - CHANNEL 30V - 0.020 - 30A DPAK
STripFET POWER MOSFET
TYPE V
DSS
R
DS(o n)
I
D
ST D30N F 03L 30 V < 0.025 30 A
TYPICALR
LOW THRESHOLDDRIVE
ADDSUFFIX ”T4” FORORDERING INTAPE
DS(on)
= 0.020
DESCRIPTION
This PowerMOSFET is the latest developmentof STMicroelectronics unique ”Single Feature Size” strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility.
APPLICATIONS
HIGHCURRENT, HIGH SPEED SWITCHING
SOLENOIDAND RELAYDRIVERS
MOTORCONTROL, AUDIO AMPLIFIERS
DC-DC& DC-ACCONVERTERS
3
1
DPAK
TO-252
(Suffix ”T4”)
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Uni t
V
V
V
I
D
I
DM
P
E
AS
T
(••) Pulse width limitedby safe operating area (1) starting Tj ()Currentlimitedby the package
October 1999
Dra in- sour c e Vol ta ge (VGS=0) 30 V
DS
Drain- gate Voltage (RGS=20kΩ)30V
DGR
Gate-s ource Volt age ± 20 V
GS
() Dra in Current (conti nuous ) at Tc=25oC30A
Dra in Current (conti nuous) at Tc= 100oC19A
I
D
(
Dra in Current (pulsed) 120 A
••)
Tot al Dissi pat io n at Tc=25oC40W
tot
Der ati ng Fact or 0.27 W/
o
C
(1) Single Pulse Avalanche Energy 100 m/ J
St orage Tem pe ra t ure -65 to 175
stg
Max. Operat ing Junct ion Tempera t ure 175
T
j
=25oC,ID=15A, VDD= 15V
o
C
o
C
1/8
Page 2
STD30NF03L
THERMAL DATA
R
thj-pcb
R
thj-amb
R
thj-sink
T
Ther mal Resistanc e Junct ion-PC Boa rd Max Ther mal Resistanc e Junct ion-ambient Max Ther mal Resistanc e Case-sink Ty p Maximum Lead Te m perature F or S o lder ing Purpose
l
3.75 100
1.5
275
o
C/W
o
C/W
o
C/W
o
C
ELECTRICAL CHARACTERISTICS
=25oC unless otherwisespecified)
(T
case
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
ID=250µAVGS=0 30 V
Break dow n Voltage
I
DSS
I
GSS
Zero Gate Voltage Drain Current (V
GS
Gat e- bod y Leakage Current (V
DS
=0)
=0)
V
=MaxRating
DS
=MaxRating Tc= 125oC
V
DS
V
= ± 20 V ± 100 nA
GS
1
10
ON()
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
GS(th)
R
DS(on)
I
D(on)
Gate Threshold Volt age VDS=VGSID= 250 µ A11.72.5V Sta t ic Drain-sour ce On
Resistance
VGS=10V ID=15A
=4.5V ID=15A
V
GS
On State Drain Current VDS>I
D(on)xRDS(on )max
0.020
0.028
30 A
0.025
0.035ΩΩ
VGS=10V
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
g
(∗)Forward
fs
Tr ansc on duc tance
C
C
C
Input Capacitance
iss
Out put Capacitance
oss
Reverse Transfer
rss
Capacit a nc e
VDS>I
D(on)xRDS(on )maxID
=15A 13 S
VDS=25V f=1MHz VGS= 0 V 830
230
92
µ µA
pF pF pF
A
2/8
Page 3
STD30NF03L
ELECTRICAL CHARACTERISTICS
(continued)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
Tur n-on Delay Time Rise Time
t
r
VDD=15V ID=20A R
=4.7
G
VGS=4.5V
35
205
(Resis t iv e Load, see fig. 3)
Q Q Q
Tot al Gate Charge
g
Gat e- Source Char g e
gs
Gate-Drain Charge
gd
VDD=24V ID=30A VGS=5V 18
7 8
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(off)
Tur n-of f Delay Time
t
Fall T ime
f
VDD=15V ID=20A
=4.7 VGS=4.5V
R
G
90
240
(Resis t iv e Load, see fig. 3)
SOURCEDRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
V
I
SDM
SD
Q
I
RRM
SD
t
Source-drain Current
(•)
Source-drain Current
30
120
(pulsed)
(∗)ForwardOnVoltage ISD=30A VGS=0 1.5 V
Reverse Recovery
rr
Time Reverse Recovery
rr
ISD= 40 A di/dt = 100 A/µs
=15V Tj=150oC
V
DD
(see test circuit, fig. 5)
65
72 Charge Reverse Recovery
2
Current
ns ns
nC nC nC
ns ns
A A
ns
nC
A
(∗) Pulsed: Pulse duration= 300µs, dutycycle 1.5 % (•) Pulse width limited by safeoperating area
SafeOperating Area ThermalImpedance
3/8
Page 4
STD30NF03L
OutputCharacteristics
Transconductance
TransferCharacteristics
Static Drain-sourceOn Resistance
Gate Charge vs Gate-sourceVoltage
4/8
CapacitanceVariations
Page 5
STD30NF03L
NormalizedGate ThresholdVoltage vs Temperature
Source-drainDiode Forward Characteristics
NormalizedOn Resistancevs Temperature
5/8
Page 6
STD30NF03L
Fig. 1: UnclampedInductiveLoad Test Circuit
Fig. 3: SwitchingTimesTest CircuitsFor ResistiveLoad
Fig. 2:UnclampedInductive Waveform
Fig. 4: Gate Charge test Circuit
Fig. 5: TestCircuit ForInductiveLoad Switching And Diode Recovery Times
6/8
Page 7
TO-252 (DPAK) MECHANICALDATA
STD30NF03L
DIM.
mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A2 0.03 0.23 0.001 0.009
B 0.64 0.9 0.025 0.035 B2 5.2 5.4 0.204 0.212
C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023
D 6 6.2 0.236 0.244
E 6.4 6.6 0.252 0.260
G 4.4 4.6 0.173 0.181
H 9.35 10.1 0.368 0.397 L2 0.8 0.031 L4 0.6 1 0.023 0.039
H
A
E
C2
L2
B2
==
==
DETAIL”A”
D
2
13
L4
A1
C
A2
DETAIL”A”
B
G
==
0068772-B
7/8
Page 8
STD30NF03L
Information furnished is believed tobeaccurateand reliable. However, STMicroelectronics assumesno responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may resultfrom its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specificationmentioned in this publicationare subjecttochange without notice.Thispublication supersedesand replacesall information previouslysupplied.STMicroelectronics products are not authorizedfor useas critical components in lifesupport devices or systems without express written approval of STMicroelectronics.
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1999STMicroelectronics – Printed in Italy – All Rights Reserved
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