Datasheet STD20N06 Datasheet (SGS Thomson Microelectronics)

Page 1
STD20N06
N - CHANNEL ENHANCEMENT MODE
”ULTRA HIGH DENSITY” POWER MOS TRANSISTOR
PRELIMINARY DATA
TYPE V
DSS
R
DS(on)
I
D
STD 20N06 60 V < 0.03 20 A (*)
TYPICAL R
AVALANCHE RUGGED TECHNOLOGY
REPETITIVE AVALANCHE DATA AT 100
HIGH CURRENT CAPABILITY
o
175
HIGH dV/dt RUGGEDNESS
THROUGH-HOLE IPAK (TO-251) POWER
C OPERATING TEMPERATURE
DS(on)
= 0.026
o
C
PACKAGE IN TUBE (SUFFIX ”-1”)
SURFACE-MOUNTINGDPAK (TO-252)
POWER PACKAGE IN TAPE & REEL (SUFFIX ”T4”)
DESCRIPTION
This series of POWER MOSFETS represents the latest development in low voltage technology. The ultra high cell density process (UHD) produ­ced with fine geometries on advanced equipment gives the device extremely low R
DS(on)
as well as good switching performance and high avalanche energy capability.
APPLICATIONS
HIGH CURRENT, HIGH SPEED SWITCHING
POWER MOTOR CONTROL
DC-DC & DC-AC CONVERTERS
SYNCRONOUS RECTIFICATION
3
2
1
IPAK
TO-251
(Suffix ”-1”)
INTERNAL SCHEMATIC DIAGRAM
1
DPAK
TO-252
(Suffix ”T4”)
3
ABSOLUTE MAXIMUM RATINGS
Symb o l Paramet er Val u e Unit
V
V
V
I
DM
P
T
(*) Currentlimited by the package () Pulse width limited by safeoperating area (*)
March 1995
Drain - s ource Voltage (VGS=0) 60 V
DS
Drain- gate Voltage (RGS=20kΩ)60V
DGR
Gate-source Voltage ± 20 V
GS
Drain Current (continuous) at Tc=25oC20A
I
D
Drain Current (continuous) at Tc=100oC14A
I
D
(•) Drain Current (pulsed) 80 A
Total Di ssipation at Tc=25oC60W
tot
Derat ing Factor 0.4 W/ St or a ge Tem perature -65 to 175
stg
Max. Operating Junction Temperature 175
T
j
o o
o
C C C
1/10
Page 2
STD20N06
THERMAL DATA
R
thj-case
R
thj-amb
R
thj-amb
T
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Valu e Uni t
I
AR
E
E
I
AR
Thermal Res is tance Junction- c ase Max Thermal Res istance Junc tion-am bie nt Max Thermal Res is tance Case-sink Typ Maximum Lead Tem perature Fo r Soldering Pu r pose
l
Avalanc h e Cu rr ent , Repet itive or Not-R ep et itive (pulse width limited by Tjmax, δ <1%)
Single Pul se Avalanche Ener gy
AS
(starti ng T
=25oC, ID=IAR, L = 330 µH, VDD=25V)
j
(see waveforms, figure 2) Repetitive Avalanc he Energ y
AR
(pulse width limited by Tjmax, δ <1%) Avalanc h e Cu rr ent , Repet itive or Not-R ep et itive
(Tc= 100oC, pulse width limit ed by Tjmax, δ <1%)
2.5
100
1.5
300
20 A
80 mJ
20 mJ
14 A
o
C/W
o
C/W
o
C/W
o
C
ELECTRICAL CHARACTERISTICS (T
=25oC unless otherwise specified)
case
OFF
Symbol Parameter Test Condition s Min. Typ. Max. U nit
V
(BR)DSS
Drain - s ource
ID=250µAVGS=0 60 V
Break d own Volta ge
I
DSS
I
GSS
Zer o Gate Volt age Drain Current (VGS=0)
Gat e- body Leak age
VDS=MaxRating VDS= Max Rating x 0 .8 Tc=125oC
250
1000µAµA
VGS= ± 20 V ± 10 0 nA
Current (VDS=0)
ON ()
Symbol Parameter Test Condition s Min. Typ. Max. U nit
V
GS(th)
R
DS(on)
I
D(on)
Gate Threshold Voltage VDS=VGSID=250µA234V St at ic Drain-s our ce O n
Resistance On State Drain Current VDS>I
VGS=10V ID=10A VGS=10V ID=10A Tc= 100oC
D(on)xRDS(on)max
0.026 0.03
0.06
20 A
VGS=10V
DYNAMIC
Symbol Parameter Test Condition s Min. Typ. Max. U nit
()Forward
g
fs
Tr ansconductance
C C C
Input Capacitance
iss
Out put Capacitance
oss
Reverse Transfer
rss
Capacitance
VDS>I
D(on)xRDS(on)maxID
=10A 11 16 S
VDS=25V f=1MHz VGS= 0 2000
350
80
2800
450 120
Ω Ω
pF pF pF
2/10
Page 3
STD20N06
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol Parameter Test Condition s Min. Typ. Max. U nit
t
d(on)
(di/dt)
Q Q Q
Turn-on T im e
t
Rise Time
r
Turn-on C urrent S lope VDD=48V ID=20A
on
Total Gate Charge
g
Gat e- Source Charge
gs
Gate-Drain Charge
gd
SWITCHING OFF
Symbol Parameter Test Condition s Min. Typ. Max. U nit
t
r(Voff)
t
Off -voltage R ise Time
t
Fall Time
f
Cross-over Time
c
SOURCE DRAIN DIODE
VDD=30V ID=10A RG=50 VGS=10V
45
28065380
(see test circuit, figure 3)
240 A/µs RG=50 VGS=10V (see test circuit, figure 5)
VDD=40V ID=20A VGS=10V 60
10 20
VDD=48V ID=20A RG=50 Ω VGS=10V (see test circuit, figure 5)
55 125 200
80 nC
75 170 270
ns ns
nC nC
ns ns ns
Symbol Parameter Test Condition s Min. Typ. Max. U nit
I
I
SDM
SD
Source-drain Current
()
Source-drain Current
20
80
(pulsed)
V
(∗) Forward On Volt age ISD=20A VGS=0 1.5 V
SD
t
Reverse Recovery
rr
Time
Q
Reverse Recovery
rr
ISD= 20 A di/dt = 100 A/µs VDD=30V Tj=150oC (see test circuit, figure 5)
80
0.3
Charge
I
RRM
Reverse Recovery
7
Current
() Pulsed:Pulse duration = 300 µs, dutycycle 1.5 % () Pulse widthlimited by safeoperating area
Safe Operating Area Thermal Impedance
A A
ns
µC
A
3/10
Page 4
STD20N06
Derating Curve
Transfer Characteristics
Output Characteristics
Transconductance
Static Drain-source On Resistance
4/10
Gate Charge vs Gate-source Voltage
Page 5
Capacitance Variations Normalized Gate Threshold Voltage vs
Temperature
Normalized On Resistance vs Temperature Turn-on Current Slope
STD20N06
Cross-over TimeTurn-off Drain-source Voltage Slope
5/10
Page 6
STD20N06
Switching SafeOperating Area Accidental Overload Area
Source-drain Diode Forward Characteristics
Fig. 1: Unclamped Inductive Load Test Circuits Fig. 2: Unclamped Inductive Waveforms
6/10
Page 7
STD20N06
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
Fig. 4: Gate Charge Test Circuit
7/10
Page 8
STD20N06
TO-251 (IPAK) MECHANICAL DATA
DIM.
mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A3 0.7 1.3 0.027 0.051
B 0.64 0.9 0.025 0.031 B2 5.2 5.4 0.204 0.212 B3 0.85 0.033 B5 0.3 0.012 B6 0.95 0.037
C 0.45 0.6 0.017 0.023
C2 0.48 0.6 0.019 0.023
D 6 6.2 0.236 0.244
E 6.4 6.6 0.252 0.260
G 4.4 4.6 0.173 0.181 H 15.9 16.3 0.626 0.641
L 9 9.4 0.354 0.370 L1 0.8 1.2 0.031 0.047 L2 0.8 1 0.031 0.039
8/10
A
E
==
C2
L2
B2
==
H
C
A3
A1
B6
L
B
B5
G
==
D
B3
2
13
L1
0068771-E
Page 9
TO-252 (DPAK) MECHANICAL DATA
STD20N06
DIM.
mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A2 0.03 0.23 0.001 0.009
B 0.64 0.9 0.025 0.035 B2 5.2 5.4 0.204 0.212
C 0.45 0.6 0.017 0.023
C2 0.48 0.6 0.019 0.023
D 6 6.2 0.236 0.244
E 6.4 6.6 0.252 0.260
G 4.4 4.6 0.173 0.181
H 9.35 10.1 0.368 0.397 L2 0.8 0.031 L4 0.6 1 0.023 0.039
H
A
E
==
C2
L2
B2
==
DETAIL”A”
D
2
13
L4
A1
C
A2
DETAIL”A”
B
G
==
0068772-B
9/10
Page 10
STD20N06
Information furnished isbelieved to be accurateand reliable. However, SGS-THOMSONMicroelectronics assumes noresponsability for the consequences of use of suchinformation nor for any infringementof patents orother rights of third parties whichmay results from its use. No license isgrantedby implicationor otherwiseunder anypatentor patentrights ofSGS-THOMSON Microelectronics.Specificationsmentioned in this publicationare subjectto change without notice.This publication supersedes and replacesall information previouslysupplied. SGS-THOMSON Microelectronicsproducts arenotauthorizedfor useascriticalcomponents inlifesupportdevices orsystemswithout express written approvalof SGS-THOMSON Microelectonics.
1994 SGS-THOMSONMicroelectronics - All Rights Reserved
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10/10
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