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STB80NF55L-06
STP80NF55L-06
N-CHANNEL 55V - 0.005 Ω - 80A D²PAK/TO-220
STripFET™ II POWER MOSFET
TYPE
STB80NF55L-06
STP80NF55L-06
■ TYPICAL R
■ LOW THRESHOLD DRIVE
■ LOGIC LEVEL DEVICE
■ SURFACE-MOUNTING D
V
DSS
55 V
55 V
(on) = 0.005 Ω
DS
R
DS(on)
< 0.0065
< 0.0065
2
PAK (TO-263)
Ω
Ω
I
D
80 A
80 A
POWER PACKAG E IN TU BE (NO SU FFIX) OR
IN TAPE & REEL (SUFFIX “T4”)
DESCRIPTION
This Power MOSFET is the latest dev elo pment of
STMicroelectronis unique "Single Feature Size™"
strip-based process. The resulting transistor
shows extremely high packing density for low onresistance, rugged avalanche characteristics and
less critical alignment steps therefore a remarkable manufacturing reproducibility.
APPLICATIONS
■ HIGH CURRENT, HIGH SPEED SWITCHING
■ SOLENOID AND RELAY DRIVERS
■ MOTOR CONTROL, AUDIO AMPLIFIERS
■ DC-DC & DC-AC CONVERTERS
■ AUTOMOTIVE
3
1
2
D
PAK
TO-263
TO-220
(Suffix “T4”)
INTERNAL SCHEMATIC DIAGRAM
3
2
1
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
DS
V
DGR
V
GS
(#) Drain Current (continuous) at TC = 25°C
I
D
I
D
(
I
DM
P
tot
dv/dt
E
AS
T
stg
T
j
(#
Current li mited by the package
)
(•) Pulse width limited safe operating area
NEW DATASHEET ACCORDING TO PCN DSG/CT/2C13 MARKING: P80NF55L-06 @ B80NF55L-06 @
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
55 V
55 V
Gate- source Voltage ± 16 V
80 A
Drain Current (continuous) at TC = 100°C
•)
Drain Current (pulsed) 320 A
Total Dissipation at TC = 25°C
80 A
300 W
Derating Factor 2 W/°C
(1)
Peak Diode Recovery voltage slope 7 V/ns
(2)
Single Pulse Avalanche Energy 1.3 J
Storage Temperature
Operating Junction Temperature
≤80A, di/dt ≤400A/ µ s , VDD ≤ V
(1) I
SD
(2) Starting Tj = 25 oC, ID = 40A, VDD = 35V
-55 to 175 °C
(BR)DSS
, Tj ≤ T
JMAX
1/10January 2003
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STB80NF55L-06 STP80NF55L-06
THERMA L D ATA
Rthj-case
Rthj-amb
T
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Maximum Lead Temperature For Soldering Purpose
l
Max
Max
0.5
62.5
300
°C/W
°C/W
°C
ELECTRICAL CHARACTERISTICS (T
= 25 °C UNLESS OTHERWISE SPECIFIED)
CASE
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
= 250 µA, VGS = 0
V
(BR)DSS
Drain-source
I
D
55 V
Breakdown Voltage
= Max Rating
V
DS
V
= Max Rating TC = 125°C
DS
V
= ± 16 V
GS
1
10
±100 nA
ON
(*)
I
DSS
I
GSS
Zero Gate Voltage
Drain Current (V
GS
Gate-body Leakage
Current (V
DS
= 0)
= 0)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
V
GS(th)
R
DS(on)
Gate Threshold Voltage
Static Drain-source On
Resistance
= VGS I
DS
= 10 V ID = 40 A
V
GS
V
= 5 V ID = 40 A
GS
= 250 µA
D
1V
0.005
0.0055
0.0065
0.008
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
(*)
g
fs
C
iss
C
oss
C
rss
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
= 15 V ID= 40 A
DS
= 25V f = 1 MHz VGS = 0
V
DS
150 S
4850
1040
375
µA
µA
Ω
Ω
pF
pF
pF
2/10
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STB80NF55L-06 STP80NF55L-06
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
= 27 V ID = 40 A
t
d(on)
Turn-on Delay Time
t
r
Rise Time
V
DD
R
= 4.7 Ω VGS = 4.5 V
G
(Resistive Load, Figure 3)
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
= 44V ID= 80A VGS= 5V
V
DD
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
= 27 V ID = 40 A
t
d(off)
Turn-off Delay Time
t
f
Fall Time
V
DD
R
= 4.7Ω, V
G
GS
= 4.5 V
(Resistive Load, Figure 3)
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
V
SD
t
rr
Q
rr
I
RRM
(*)
Pulsed: P ul se duration = 300 µs, duty c yc l e 1.5 %.
(
Pulse widt h l i m i ted by safe operating area.
•)
Source-drain Current
(•)
Source-drain Current (pulsed)
(*)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
= 80 A VGS = 0
SD
= 80 A di/dt = 100A/µs
I
SD
V
= 25 V Tj = 150°C
DD
(see test circuit, Figure 5)
32
180
100
18
53
135
80
100
310
6.2
136 nC
80
320
1.5 V
ns
ns
nC
nC
ns
ns
A
A
ns
nC
A
Safe Operating Area Thermal Impedance
3/10
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STB80NF55L-06 STP80NF55L-06
Output Characteristics Transfer Characteristics
Transconductance Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage Capacitance Variations
4/10
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STB80NF55L-06 STP80NF55L-06
Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature
Source-drain Diode Forward Characteristics Normalized Breakdown Voltage vs Temperature.
. .
. .
5/10
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STB80NF55L-06 STP80NF55L-06
Fig. 1: Unclamped Inductive Load Test CircuitFig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive
Load
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
6/10
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STB80NF55L-06 STP80NF55L-06
D2PAK MECHANICAL DATA
DIM.
A 4.4 4.6 0.173 0.181
A1 2.49 2.69 0.098
A2 0.03 0.23 0.001 0.009
B 0.7 0.93 0.028 0.037
B2 1.14 1.7 0.045 0.067
C 0.45 0.6 0.018 0.024
C2 1.21 1.36 0.048 0.054
D 8.95 9.35 0.352 0.368
D1 8 0.315
E 10 10.4 0.394 0.409
E1 8.5 0.334
G 4.88 5.28 0.192 0.208
L 15 15.85 0.591 0.624
L2 1.27 1.4 0.050 0.055
L3 1.4 1.75 0.055 0.069
M 2.4 3.2 0.094 0.126
R 0.4 0.015
V2 0° 8° 0° 8°
MIN. TYP. MAX. MIN. TYP. TYP.
mm. inch.
0.106
7/10
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STB80NF55L-06 STP80NF55L-06
TO-220 MECHANICAL DATA
DIM.
A 4.4 4.6 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.40 2.70 0.094 0.106
H2 10 10.40 0.393 0.409
L2 16.40 0.645
L3 28.90 1.137
L4 13 14 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.20 6.60 0.244 0.260
L9 3.50 3.93 0.137 0.154
DIA 3.75 3.85 0.147 0.151
MIN. TYP. MAX. MIN. TYP. TYP.
mm. inch.
8/10
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STB80NF55L-06 STP80NF55L-06
D2PAK FOOTPRINT
TAPE AND REEL SHIPMENT (suffix ”T4”)*
TUBE SHIPMENT (no suffix)*
REEL MECHANICAL DATA
DIM.
A 330 12.992
B 1.5 0.059
C 12.8 13.2 0.504 0.520
D 20.2 0.795
G 24.4 26.4 0.960 1.039
N 100 3.937
T 30.4 1.197
mm inch
MIN. MAX. MIN. MAX.
TAPE MECHANICAL DATA
DIM.
A0 10.5 10.7 0.413 0.421
B0 15.7 15.9 0.618 0.626
D 1.5 1.6 0.059 0.063
D1 1.59 1.61 0.062 0.063
E 1.65 1.85 0.065 0.073
F 11.4 11.6 0.449 0.456
K0 4.8 5.0 0.189 0.197
P0 3.9 4.1 0.153 0.161
P1 11.9 12.1 0.468 0.476
P2 1.9 2.1 0075 0.082
R50 1.574
T0.25 0.35 .0.0098 0.0137
W 23.7 24.3 0.933 0.956
mm inch
MIN. MAX. MIN. MAX.
* on sales type
BASE QTY BULK QTY
1000 1000
9/10
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STB80NF55L-06 STP80NF55L-06
Information furnished is believed to be accurate an d rel i able. However, STMicroelectro ni cs assumes no responsibility for the consequen ces
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implic ation or otherwise under any patent or patent ri ghts of STM i croelectr onics. Sp ecifications mentioned in thi s publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics product s are not
authorized for use as cri tical comp onents in lif e support devi ces or systems without express written approv al of STMicroel ectronics.
The ST log o i s registered trademark of STMicroelectronics
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All other names are the property of their respective ow ners.
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