Page 1
N - CHANNEL ENHANCEMENT MODE
TYPE V
DSS
STB7NB40 400 V < 0.9 Ω 7.0 A
R
DS(on)
I
D
STB7NB40
PowerMESH MOSFET
PRELIMINARY DATA
■ TYPICALR
■ EXTREMELY HIGH dv/dt CAPABILITY
■ 100% AVALANCHETESTED
■ VERYLOW INTRINSIC CAPACITANCES
■ GATECHARGEMINIMIZED
■ FOR THROUGH-HOLE VERSIONCONTACT
DS(on)
=0.75 Ω
SALESOFFICE
DESCRIPTION
Using the latest high voltage technology, SGS-Thomson
has designed an advanced family of power Mosfets with
outstanding performances. The new patent pending strip
layout coupled with the Company’s proprietary edge
termination structure, gives the lowest RDS(on) per area,
exceptional avalanche and dv/dt capabilities and
unrivalled gate charge and switching characteristics.
APPLICATIONS
■ HIGH CURRENT, HIGHSPEEDSWITCHING
■ SWITCHMODEPOWER SUPPLIES(SMPS)
■ DC-ACCONVERTERS FOR WELDING
EQUIPMENTAND UNINTERRUPTIBLE
POWERSUPPLIES AND MOTORDRIVE
ABSOLUTE MAXIMUM RATINGS
3
1
D2PAK
TO-263
(Suffix ”T4”)
INTERNAL SCHEMATIC DIAGRAM
Symb o l Para meter Value Uni t
STB7NB40
V
V
V
I
DM
P
dv/dt(
T
(•) Pulse width limitedby safe operating area (1)ISD≤ 7A, di/dt ≤ 200 A/µs, VDD≤ V
Drain-source Volt age (VGS=0) 400 V
DS
Drain- gate Voltage (RGS=20kΩ)
DGR
Gat e- source Vo lt age ± 30 V
GS
I
Drain C ur rent (contin uous) at Tc=25oC7A
D
I
Drain C ur rent (contin uous) at Tc=100oC4.4A
D
400 V
(•) Drain C ur rent (pulsed) 28 A
Tot al Dis sipation at Tc=25oC100W
tot
Derating Factor 0.8 W/
1) Peak Di ode Recovery v o lt age sl ope 4.5 V/ns
Sto rage Temperature -65 to 150
stg
T
Max. O perating Junction Te mperatur e 150
j
,Tj≤T
(BR)DSS
JMAX
o
C
o
C
o
C
October 1997
This ispreliminary informationon a new product now in development or undergoing evaluation. Details are subject to changewithout notice.
Page 2
STB7NB40
THERMAL DATA
R
thj-case
R
thj-amb
R
thc-sin k
T
AVALANCHE CHARACTERISTICS
Symbol Para met e r Max Va lue Uni t
I
AR
E
Ther mal Resis tance J unction-case Max 1.25
Ther mal Resis tance J unction-ambient Max
Ther mal Resis tance Cas e - si nk T yp
Maximum Lead Te mperatu re For Soldering Purpose
l
Avalanche C urr e nt , R ep et it i v e o r Not- Re petitive
(pulse width limited by T
Single Pulse Avalanche Energy
AS
(starting T
=25oC, ID=IAR,VDD=50V)
j
max, δ <1%)
j
62.5
0.5
300
7A
300 mJ
o
C/W
o
C/W
o
C/W
o
C
ELECTRICAL CHARACTERISTICS (T
=25oC unlessotherwise specified)
case
OFF
Symbol Parameter Test Cond itions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
=250µAVGS=0
I
D
400 V
Breakdown V oltage
I
DSS
I
GSS
Zer o G at e Voltage
Drain Curre nt ( V
GS
Gat e-body Leaka ge
Current (V
DS
=0)
=0)
V
=MaxRating
DS
= Max Rating x 0.8 Tc= 125oC
V
DS
= ± 30 V
V
GS
1
50
± 100 nA
ON (∗)
Symbol Parameter Test Cond itions Min. Typ. Max. Unit
V
GS(th )
Gate Threshold
V
DS=VGSID
=250µA
345V
Voltage
R
DS(on)
Stati c D rain-source On
VGS=10V ID= 3.5 A 0.75 0.9 Ω
Resistance
I
D(on)
On Stat e Dra in Curr e nt VDS>I
D(on)xRDS(on)max
7A
VGS=10V
DYNAMIC
Symbol Parameter Test Cond itions Min. Typ. Max. Unit
g
(∗)Forward
fs
Tr ansconductance
C
C
C
Input Ca pac i t an c e
iss
Out put Capacitance
oss
Reverse T ransfer
rss
Capa cit an c e
VDS>I
D(on)xRDS(on)maxID
=3.5A 2.5 4.2 S
VDS=25V f=1MHz VGS= 0 705
132
17
720
175
25
µA
µA
pF
pF
pF
2/6
Page 3
STB7NB40
ELECTRICAL CHARACTERISTICS (continued)
SWITCHINGON
Symbol Parameter Test Cond itions Min. Typ. Max. Unit
t
d(on)
Turn-on Tim e
r
Rise T im e
t
VDD=200V ID=3.5A
=47 Ω VGS=10V
R
G
11.5
7.5
(see test circuit, figure 3)
Q
Q
Q
Total Gate Charge
g
Gat e-Source Charge
gs
Gate-Drain Charge
gd
VDD=320V ID=7A VGS=10V 21
7.3
8.5
SWITCHINGOFF
Symbol Parameter Test Cond itions Min. Typ. Max. Unit
t
r(Voff)
t
t
Of f - voltage Rise Tim e
Fall Time
f
Cross-over T ime
c
VDD=320V ID=7A
=4.7 Ω VGS=10V
R
G
(see test circuit, figure 5)
9.5
9
16.5
SOURCE DRAIN DIODE
Symbol Parameter Test Cond itions Min. Typ. Max. Unit
I
SD
I
SDM
V
SD
t
Q
I
RRM
(∗) Pulsed: Pulse duration =300 µs,duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Source-drain Cu rrent
(•)
Source-drain Cu rrent
(pulsed)
(∗) For ward On Vo lt age ISD=7A VGS=0 1.6 V
Reverse Recov er y
rr
Time
Reverse Recov er y
rr
= 7 A di/dt = 1 00 A/µ s
I
SD
=100V Tj=150oC
V
DD
(see test circuit, figure 5)
300
2
Charge
Reverse Recov er y
13.7
Current
16
11
30 nC
15
14
25
7
28
ns
ns
nC
nC
ns
ns
ns
A
A
ns
µC
A
3/6
Page 4
STB7NB40
Fig. 1: Unclamped InductiveLoad Test Circuit
Fig. 3: SwitchingTimesTest CircuitsFor
ResistiveLoad
Fig. 2: Unclamped Inductive Waveform
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode RecoveryTimes
4/6
Page 5
TO-263 (D2PAK) MECHANICAL DATA
STB7NB40
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.3 4.6 0.169 0.181
A1 2.49 2.69 0.098 0.106
B 0.7 0.93 0.027 0.036
B2 1.25 1.4 0.049 0.055
C 0.45 0.6 0.017 0.023
C2 1.21 1.36 0.047 0.053
D 8.95 9.35 0.352 0.368
E 10 10.28 0.393 0.404
G 4.88 5.28 0.192 0.208
L 15 15.85 0.590 0.624
L2 1.27 1.4 0.050 0.055
L3 1.4 1.75 0.055 0.068
mm inch
E
A
C2
L2
D
L
L3
B2
B
A1
C
G
P011P6/C
5/6
Page 6
STB7NB40
Informationfurnished is believedto be accurate and reliable. However, SGS-THOMSON Microelectronicsassumes no responsabilityfor the
consequencesof use of such information nor for any infringementof patents or other rights of third partieswhich may results fromits use.No
license is granted by implication or otherwise under anypatentor patentrightsofSGS-THOMSONMicroelectronics. Specificationsmentioned
in this publication are subjectto change without notice. This publicationsupersedesand replaces all information previously supplied.
SGS-THOMSON Microelectronicsproducts arenotauthorizedfor useascriticalcomponentsinlifesupportdevicesor systemswithoutexpress
written approvalof SGS-THOMSONMicroelectonics.
1997 SGS-THOMSON Microelectronics -Printed in Italy- All Rights Reserved
Australia- Brazil - Canada- China- France - Germany- Hong Kong - Italy- Japan- Korea- Malaysia - Malta - Morocco - The Netherlands -
Singapore - Spain- Sweden - Switzerland- Taiwan - Thailand - UnitedKingdom- U.S.A
SGS-THOMSON MicroelectronicsGROUP OF COMPANIES
...
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