This MOSFET series realized with STMicroelectronics
unique STripFET process has specifically been designed
to minimize input capacitance and gate charge. It is
therefore suitable as primary switch in advanced highefficiency, high-frequency isolate d DC-DC c onverters for
Telecom and Computer a pplications. It is also intended
for any applications with low gate drive requirements
.
APPLICATIONS
■ SOLENOID AND RELAY DRIVERS
■ DC MOTOR CONTROL
■ DC-DC CONVERTERS
■ AUTOMOTIVE ENVIRONMENT
3
1
2
D
PAK
TO-263
3
2
1
TO-220
INTERNAL SCHEMATIC DIAGRAM
2
PAK
I
TO-262
3
2
1
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
DS
V
DGR
V
GS
(
I
•)
D
I
D
(
I
••)
DM
P
tot
dv/dt
E
AS
T
stg
T
j
(
Current limited by package
•)
Pulse wi dth limited by safe operating ar ea.
(
••)
.
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
75V
75V
Gate- source Voltage± 15V
Drain Current (continuous) at TC = 25°C
Drain Current (continuous) at TC = 100°C
75A
70A
Drain Current (pulsed)300A
Total Dissipation at TC = 25°C
300W
Derating Factor2W/°C
(1)
Peak Diode Recovery voltage slope20V/ns
(2)
Single Pulse Avalanche Energy680mJ
Storage Temperature
Max. Operating Junction Temperature
≤ 75A, di/dt ≤ 500A/µs , VDD ≤ V
(1) I
SD
(2) Starting Tj = 25 oC, ID = 37.5A, VDD = 30V
-55 to 175°C
(BR)DSS
, Tj ≤ T
JMAX.
1/11April 2002
Page 2
STB75NF75L/-1 STP75NF75L
THERMA L D ATA
Rthj-case
Rthj-amb
T
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Maximum Lead Temperature For Soldering Purpose
l
Max
Max
Typ
0.5
62.5
300
°C/W
°C/W
°C
ELECTRICAL CHARACTERISTICS (T
= 25 °C unless otherwise specified)
case
OFF
SymbolParameterTest ConditionsMin.Typ.Max.Unit
I
V
(BR)DSS
Drain-source
= 250 µA VGS = 0
D
75V
Breakdown Voltage
V
= Max Rating
DS
V
= Max Rating TC = 125°C
DS
V
= ± 15 V
GS
1
10
±100nA
ON
(*)
I
DSS
I
GSS
Zero Gate Voltage
Drain Current (V
GS
Gate-body Leakage
Current (V
DS
= 0)
= 0)
SymbolParameterTest ConditionsMin.Typ.Max.Unit
V
V
GS(th)
R
DS(on)
Gate Threshold Voltage
Static Drain-source On
Resistance
= VGS I
DS
= 10 V ID = 37.5 A
V
GS
V
= 5 V ID = 37.5 A
GS
= 250 µA
D
12.5V
0.009
0.010
0.011
0.013
DYNAMIC
SymbolParameterTest ConditionsMin.Typ.Max.Unit
(*)
g
fs
Forward Transconductance
15 V ID= 37.5 A
V
DS =
120S
µA
µA
Ω
Ω
= 25V, f = 1 MHz, VGS = 0
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
DS
4300
660
205
pF
pF
pF
2/11
Page 3
STB75NF75L/-1 STP75NF75L
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
SymbolParameterTest ConditionsMin.Typ.Max.Unit
= 40 V ID = 37.5 A
t
d(on)
Turn-on Delay Time
t
r
Rise Time
V
DD
R
= 4.7 Ω VGS = 4.5 V
G
(Resistive Load, Figure 3)
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
= 60V ID = 75 A VGS= 5V
V
DD
SWITCHING OFF
SymbolParameterTest ConditionsMin.Typ.Max.Unit
= 40 V ID = 37.5 A
t
d(off)
Turn-off Delay Time
t
f
Fall Time
V
DD
R
= 4.7Ω, V
G
GS
= 4.5 V
(Resistive Load, Figure 3)
SOURCE DRAIN DIODE
SymbolParameterTest ConditionsMin.Typ.Max.Unit
I
SD
I
SDM
V
SD
t
rr
Q
rr
I
RRM
(*)
Pulsed: P ul se duration = 300 µs, duty cycle 1. 5 %.
(
•)Pulse width limited by safe operating ar ea.
Source-drain Current
(•)
Source-drain Current (pulsed)
(*)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
= 75 A VGS = 0
SD
= 75 Adi/dt = 100A/µs
I
SD
V
= 20 VTj = 150°C
DD
(see test circuit, Figure 5)
35
150
75
18
31
110
60
100
380
7.5
90nC
75
300
1.3V
ns
ns
nC
nC
ns
ns
A
A
ns
nC
A
Safe Operating AreaThermal Impedance
3/11
Page 4
STB75NF75L/-1 STP75NF75L
Output CharacteristicsTransfer Characteristics
TransconductanceStatic Drain-source On Resistance
Gate Charge vs Gate-source VoltageCapacitance Variations
4/11
Page 5
STB75NF75L/-1 STP75NF75L
Normalized Gate Threshold Voltage vs TemperatureNormalized on Resistance vs Temperature
Source-drain Diode Forward CharacteristicsNormalized Breakdown Voltage vs Temperature.
..
..
5/11
Page 6
STB75NF75L/-1 STP75NF75L
Fig. 1: Unclamped Inductive Load Test CircuitFig. 1: Unclamped Inductive Load Test CircuitFig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive
Load
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implic ation or otherwise under any patent or patent right s of STMicroelectronics. Specifications menti oned in this p ublication are subje ct
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as criti cal component s in l i fe support devi ces or systems without express written appr oval of STMicroe l ectronics.
The ST logo is registered trademark of STMicroelectronics
2002 STMi croelectronics - All Rights Reserved
All other na m es are the property of their respective owners.
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http:// www.st.com
11/11
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