Using the latesthigh voltage MESH OVERLAY
process, STMicroelectronics has designed an
advanced family ofpower MOSFETs with
outstanding performances. The new patent
pending strip layout coupled with the Company’s
proprietary edge termination structure, gives the
lowest RDS(on) per area, exceptional avalanche
and dv/dt capabilities and unrivalled gate charge
and switching characteristics.
Ther mal Resis t an ce Junc ti on-cas eMax
Ther mal Resis t an ce Junc ti on-ambien tMax
Thermal Resistance Case-sinkTyp
Maximum Lead Tem peratu re Fo r Sold er ing Pur p os e
l
Avalanche Cur rent, Repetit iv e or No t- Re petitiv e
(pulse width limited by T
Single Pulse Avalanche Energy
AS
(starting T
=25oC, ID=IAR,VDD=50V)
j
max)
j
1.25
62.5
0.5
300
5.8A
290mJ
o
C/W
oC/W
o
C/W
o
C
ELECTRICAL CHARACTERISTICS (T
=25oC unless otherwisespecified)
case
OFF
SymbolParameterTest ConditionsMin.Typ.Max.Unit
V
(BR)DSS
Drain-sourc e
=250µAVGS=0
I
D
500V
Break d own V o lt age
I
DSS
I
GSS
Zero Gate Voltage
Drain Cu rr ent (V
GS
Gat e- b ody Le aka ge
Current (V
DS
=0)
=0)
V
=MaxRating
DS
= Max RatingTc=125oC
V
DS
= ± 30 V
V
GS
1
50
± 100nA
ON(∗)
SymbolParameterTest ConditionsMin.Typ.Max.Unit
V
GS(th)
Gate Threshold
V
DS=VGSID
= 250 µA
345V
Voltage
R
DS(on)
Static Drain-source On
VGS=10V ID= 2.9 A1.351.5
Resistanc e
I
D(on)
On S t ate Drain Cu rr ent VDS>I
D(on)xRDS(on)max
5.8A
VGS=10V
DYNAMIC
SymbolParameterTest ConditionsMin.Typ.Max.Unit
g
(∗)Forward
fs
Tr ansconduc tance
C
C
C
Input Cap ac i t an c e
iss
Out put Capacita nce
oss
Reverse Transfer
rss
Capacitance
VDS>I
D(on)xRDS(on)maxID
=2.9A2.54S
VDS=25V f=1MHz VGS=0680
110
12
884
149
16
µA
µ
Ω
pF
pF
pF
A
2/9
Page 3
STB6NB50
ELECTRICAL CHARACTERISTICS
(continued)
SWITCHINGON
SymbolParameterTest ConditionsMin.Typ.Max.Unit
t
d(on)
Turn-on Time
r
Rise Time
t
VDD= 250 VID=2.9A
R
=4.7
G
Ω
VGS=10V
11.5
8
16
12
(see test circuit, figure 3)
Q
Q
Q
Total Gate Charge
g
Gat e- Source Cha rge
gs
Gate-Drain Charge
gd
VDD= 400 V ID=5.8AVGS=10V21
7.2
8
30nC
SWITCHINGOFF
SymbolParameterTest ConditionsMin.Typ.Max.Unit
t
r(Voff)
t
t
Off -voltage Rise Time
Fall Time
f
Cross-ov er Time
c
VDD= 400 VID=5.8A
=4.7 ΩVGS=10V
R
G
(see test circuit, figure 5)
7
5
15
12
10
23
SOURCEDRAINDIODE
SymbolParameterTest ConditionsMin.Typ.Max.Unit
I
SD
I
SDM
V
SD
t
Q
I
RRM
(∗) Pulsed: Pulse duration = 300 µs, dutycycle 1.5%
(•) Pulse width limited by safe operating area
Source-drain Curr ent
(•)
Source-drain Curr ent
5.8
23.2
(pulsed)
(∗)F or ward O n VoltageISD=5.8A VGS=01.6V
Reverse Recov er y
rr
Time
Reverse Recov er y
rr
=5.8A di/dt=100A/µs
I
SD
= 100 VTj=150oC
V
DD
(see test circuit, figure 5)
435
3.3
Charge
Reverse Recov er y
15
Current
ns
ns
nC
nC
ns
ns
ns
A
A
ns
µ
A
C
SafeOperating AreaThermalImpedance
3/9
Page 4
STB6NB50
OutputCharacteristics
Transconductance
TransferCharacteristics
Static Drain-sourceOn Resistance
Gate Charge vs Gate-sourceVoltage
4/9
CapacitanceVariations
Page 5
STB6NB50
Normalized Gate ThresholdVoltage vs
Temperature
Source-drainDiode Forward Characteristics
Normalized On Resistancevs Temperature
5/9
Page 6
STB6NB50
Fig. 1:
UnclampedInductive Load Test Circuit
Fig. 3: Switching Times Test CircuitsFor
ResistiveLoad
Information furnished is believed tobeaccurateand reliable.However, STMicroelectronics assumes no responsibilityforthe consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights ofSTMicroelectronics. Specificationmentioned in this publication are
subjecttochange without notice. This publicationsupersedesandreplaces all information previouslysupplied. STMicroelectronicsproducts
are not authorized for use as critical components in life support devices or systemswithout express written approval of STMicroelectronics.
The ST logo is a trademark of STMicroelectronics
1999 STMicroelectronics – Printed in Italy – All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco -
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.
9/9
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