The SuperMESH™ series is obtained thro ugh an
extreme optimization of ST’s well established
stripbased PowerMESH™ layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt capability
for the most demanding applications. Such series
complements ST full range of high voltage MOSFET s including revolutionary MDmesh™ products.
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
Gate- source Voltage± 30V
Drain Current (continuous) at TC = 25°C
Drain Current (continuous) at TC = 100°C
()
Drain Current (pulsed)17.617.6 (*)17.6A
Total Dissipation at TC = 25°C
4.44.4 (*)4.4A
2.72.7 (*)2.7A
702570W
STP5NK50ZFP
500V
500V
Derating Factor0.560.20.56W/°C
V
ESD(G-S)
Gate source ESD(HBM-C=100pF, R=1.5KΩ)3000V
dv/dt (1)Peak Diode Recovery voltage slope4.5V/ns
V
ISO
T
j
T
stg
() Pulse width limited by safe operat i ng area
≤4.4A, di/dt ≤200A/µs, VDD ≤ V
(1) I
SD
(*) Limited only by maximum temperature allowed
Insulation Withstand Voltage (DC)-2500-V
Operating Junction Temperature
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
max)
j
Single Pulse Avalanche Energy
(starting T
= 25 °C, ID = IAR, VDD = 50 V)
j
4.4A
130mJ
Table 6: Gate-Source Zener Diode
SymbolParameterTest ConditionsMin.Typ.Max.Unit
BV
GSO
Gate-Source Breakdown
Igs=± 1mA (Open Drain)30V
Voltage
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed t o enhance not only t he device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to p r otect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.
In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. T hese
packages have a Lead-free second level interconnect . The category of second level interconnect is
marked on the package and on the inner box label, i n compliance with JEDEC Standard JESD97. The
maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an
ST trademark. ECOPACK specifications are available at: www.st.com
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
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by implic ati o n or ot h er wis e und er an y pat ent or pa te nt r igh ts of STMi cr oe l ect ro ni cs . Sp ec if i cat i on s ment i o ned i n th is p ub li c ati on ar e s ubj ec t
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