Datasheet STB5600 Datasheet (SGS Thomson Microelectronics)



■ ONE CHIP SYSTEM TO INTERFACE

ACTIVEANTENNA TO ST20GP1
MICROCONTROLLER

■ COMPLETERECEIVERUSINGNOVEL

DUAL CONVERSION ARCHITECTURE WITH
SINGLEIF FILTER

■ MINIMUMEXTERNAL COMPONENTS

■ COMPATIBLEWITH GPS L1 SPS SIGNAL

■ INTERNALLY STABILISEDPOWERRAILS

■ CMOSOUTPUTLEVELS

■ FROM 3.3 TO 5.9V SUPPLY VOLTAGE

■ TQFP32PACKAGE

DESCRIPTION

The STB5600, using STMicroelectronics HSB2,
High Speed Bipolar technology, implements a
GlobalPositioningSystem RF front-end.

The chipprovidesdown conversionfrom the GPS
(L1) signalat 1575 MHz via an IF of 20MHz to an
output frequency of 4MHz suitable for ST20GP1
GPS processor.

It uses a single external reference oscillator to
generate both RF local oscillator signals and the
processorreference clock.

STB5600

GPS RF FRONT-END IC

TQFP32

MARKING:

STB5600

TRACEAB. CODE

ASSY CODE

PIN CONNECTION (top view)

August 1998

1/10

STB5600

FUNCTIONAL DESCRIPTION

The STB5600 GPS front-end is fed with the signal from an active antenna, via a ceramicRF filter. The
gain between the antenna element and the STB5600 is expected to be between 10dB and 35dB
overall,made up of the antenna LNAgain, the feeder loss, connectorloss,and the ceramicfilterloss.

In order to use an off-the-shelfceramic filter, conventionally50 Ohms single ended, a matchingcircuit is
used. (see appendixA.1), which provides a 300 Ohm differential drive to the STB5600. A similar circuit
can be used to feed the LO signalif using the recommendedlow-costoscillator circuit (appendix A.3).

Note that the STB5600 radio architecture and the oscillator described here are covered by various
patents held by SGS-Thomson and by others.The use of the circuits described in this data-sheetfor any
other purpose may infringe such patents.

- RF SECTION

The differential input signal is amplified by the RF-Amp and mixed with the oscillator signal amplified
from the LO+,LO- inputs to generate a balanced 20.46MHz IF signal. The LO buffer amplifier may be
fed differentialor single ended signals, at levelsbetween -60dBmand -20dBm .

- IF SECTION

The 20MHz differentialsignal from the mixer is fed throughan external LC filter to suppressundesirable
signals and mixer products. The multi-stage high-sensitivity limiting amplifier is connected to a D-type
latch clocked by an internallyderived 16MHz clock.. The effect of sampling the 20MHz signal at 16MHz
is to create a sub-samplingalias at 4MHz. Thisis fedto the outputlevel-converters.

- DIVIDER SECTION

The 80MHz oscillator signal may be provided single-ended or differentially to the high impedance
80MHz+, 80MHz- inputs. Any unused inputs should be connected to GNDLOGIC via a 1nF capacitor.
The 80MHz signal is amplified, then divided by 5 to create the 16.368MHz clock required by the
ST20GP1processor, alsoused to clock the outputlatch of the STB5600.

- OUTPUT SECTION

The output latch samples the 20.46MHz intermediate frequency at a 16.368MHz rate, performing the
dual function of second downconversion and latching. The downconversion occurs by sub-sampling
aliasing, such that the digital output representsa 4.096MHzcentrefrequency

The output buffers perform level translation from the internal ECL levels to CMOS compatible outputs
referred to external ground.

ABSOLUTE MAXIMUM RATINGS

Symb o l Parame t er Val u e Uni t

V

RF+, RF- RF Input 8 dBm

T

R

thj-amb

2/10

DC Supply Voltage 5.9 V

CC

Junct ion Temperature 150

T

j

Stora ge Temperature Range -40 to 125

stg

Therma l Resi s t ance Junction-ambient 80

o
o

o

C/W

C
C

PIN CONFIGURATION

STB5600

Apply5V at the CE, V

CCRF,VCCIF,VCCLOGIC

pins, apply 3 V at the V

CCDRIVE

Pin Symb o l Typ . DC Bi as Dexrip tion External ci rc u i t

1 IF 1+ 3.6 V Mixer Out put 1 see a pplic a ti on circ uit
2 IF1- 3.6 V Mixer Out put 2 see a pplic a ti on circ uit
3V

CCRF

5 V RF P ow er Supply 100 nF to V
4 RF+ 3.5 V RF I npu t AC Coup led
5 RF- 3.5 V RF Input AC Coupled
6V
7V

CCRF
EERF

5 V RF P ow er Supply 100 nF to VEERF

2 V RF V o lt age Refer en ce 100 nF to V CC RF
8 GNDRF 0 V RF Gr ound
9V

CCRF

5 V RF P ow er Supply 100 nF to VEERF

10 LO+ 3.5 V Local Oscillat or Input AC C oupled
11 LO- 3.5 V Local Os ci llat or I n put AC C oupled
12 V
13 V

CCRF

CCLOGIC

5 V RF P ow er Supply 100 nF to VEERF

5 V Logic P o wer Supply 100 nF to V EELOGI C

14 8 0 M Hz+ 4 V 80 MH z Clock I np ut AC C oupled
15 80 MHz- 4 V 80 MHz Clock Inp ut AC C oup led
16 V
17 V

CCLOGIC
EELO GI C

5 V Logic P o wer Supply 100 nF to V EELOGI C

2 V Logic Voltage Refere nc e 100 nF to V CCLOGIC

18 CLOCK + 0 .3 V or 3 V 16 M Hz Cl ock CM O S O u t put 7 p F to GND
19 Not Connected
20 GND

DRIVE

0 V CMOS Drive Gro und

21 DAT A 0.3 V or 3 V 4 M H z Dat a CMOS Out put 7 p F to GND
22 GND
23 V

CCDR I VE

DRIVE

0 V CMOS Drive Gro und

3 V CMOS Drive Po wer Supply

24 CE 3 V Chip E nable
25 GND 0 V Substrat e Gr ound
26 GND
27 GND
28 V
29 V

EEIF
CCIF

LOGIC

IF

0 V Logic Ground

0 V IF G round

2 V IF Voltage Reference 100 nF to VCCI F

5 V IF P ow er Supply 100 nF to V EE I F

30 IF2- 4 V Limit ing A mplifier I nput see a pplic a ti on circ uit
31 I F 2+ 4 V Limiting Am p lif ier I nput see a pplic a ti on circ uit
32 V

CCIF

5 V IF P ow er Supply 100 nF to V EE I F

EERF

DRIVE

DRIVE

3/10

STB5600

ELECTRICALSPECIFICATION (V

...5.9 V V

VCCDRIVE

=3 V; Ta=25oC unless otherwise specified)

=3.3 V ...5.9 V; V

VCCRF

= 3.3 V ...5.9 V; V

VCCIF

VCC LOGIC

=3.3 V

LNA MIXER

Symbol Parameter Note Min. Typ. Max. Unit

I

VCCRF

Z

Z

G

IIP1 Input Com pression

Supply C urr ent VVCCRF = 5 V 20 25 mA
Diff er e nt ial Input

in

Im pedance
Diff er e nt ial Output

out

Im pedance
Volt age Conversion

C

Gain

@ 1575 MHz AC Co upled at RF +
RF- inputs

@ 20 M H z AC Coupled at IF1+ I F 1 ­output s

RL>3KΩ,PIN= -80 dBm

=75µVp on 300 Ω )

(V

in

300

1

70

3

35 dB

(see application circ uit ) -60 d Bm

Point (1dB)

NF Noise fig ure 5 dB
f

RF

Input Signa l

1575 MHz

Fr equency (L1)

IF

Out put Si gnal

f

20 MHz

Fr equency

LO INPUT BUFFER

Symbol Parameter Note Min. Typ. Max. Unit

Z

Diff er e nt ial Input

in

Im pedance

@ 1555 MHz AC Co upled at LO +
LO- inputs

300

1

Input Signa l Level -60 -40 -20 d B m

Ω

pF

Ω

pF

Ω

pF

LIMITING AMPLIFIER

Symbol Parameter Note Min. Typ. Max. Unit

I

VCCIF

Z

Supply C urr ent VVCCI F = 5 V 2.5 3.5 mA
Diff er e nt ial Input

in

Im pedance

@ 20 M H z AC Coupled at IF2+ I F 2 ­inputs

15 KΩ

B Bandwidth 3d B 5 80 MHz

Sens Limit er sensitiv ity Input S igna l @ 20 MHz A C Coupled 100 µVp

V

INMAX

Maximum I nput Signal Input Signa l @ 20 M H z AC Coupled 0.5 Vp

CLOCK INPUT BUFFER

Symbol Parameter Note Min. Typ. Max. Unit

I

VCCLOGIC

Z

N Division Rat io 5

Supply C urr ent VVCC LOGIC = 5 V 5 7 mA
Diff er e nt ial Input

in

Im pedance
Input Signa l Level @ 80 MH z AC Coupled at 8O MHz +

@ 80 M H z AC Coupled at 8O MHz+
80 MHz- inputs

8
2

5100mVp

80 MHz- inputs

KΩ

pF

4/10

STB5600

ELECTRICALCHARACTERISTICS (Continued)

OUTPUTSECTION

Symbol Parameter Note Min. Typ. Max. Unit

I

VCCDRIVE

V

V

APPLICATION CIRCUIT

A typical application circuit is shown in figure 1. The RF input from the antenna downlead is fed via a
ceramic filter and matching circuit to the RF+,RF- pins. The external LNA in the antenna should have
between 10 and 35dB of amplifier gain, so the noise measured in a one MHz bandwidth should be

-114dBm forkTB in 1 MHz
+ 2dB LNA noise figure
+10/35 dB LNA gain (net)
Total -102/ 77dBm at connector.
Allowing 2dB for filter loss, -104/-79is available at the matchingcircuit.

Supply C urr ent V
High outp ut voltage Vp = V

OH

Low output voltage V n = GN D D RI V E Vn Vn+0. 4 V

OL

t

Rise Time C

r

t

Fall Time C

f

VCCDRIVE

LOAD
LOAD

=3V 8 mA

VCCDR I VE

=3V Vp-0.4 Vp V

=7pF 6 ns
=7pF 2 ns

Fig. 1 TypicalApplication Circuit

5/10

STB5600

A.1 MatchingNetwork

The matching circuit may be a 50 Ohm / 300 Ohmbalun transformer(figure2), but amore economical
solution is a tuned match as shown below. A single 10nH inductor is optimal in cost, but may not meet
the users tolerance requirements over spreads of silicon and pcb material, as it has only around 1pF
tuning capacitance( 2pF in serieswith 2pF inside the package).

Fig. 2 Matching Networkwith Balun

The first example (figure 3) increases the capacitance with a discrete capacitor, and uses a lower
inductance value. Both examplesassume that the ceramic filter is dc blocking, both input to output, and
output to ground.

Fig. 3 Matching Networkwith two elements

The second (figure 4) example allows optimum matching by rationing the capacitors appropriately to
achieve voltage gain commensurate with the impedance translation. While it has a higher component
count, it is the versionmost tolerant of componentvariations and board capacitance.

6/10

STB5600

Fig. 4 Matching Networkwith four elements

A.2 IF Filter

The recommended IF filter is shown in figure 5. The stop band of the filter is to reject the alias images
around 12MHz,and around 28MHz, whereit should have at least 15dBc rejection.

Note that the mixer output is low impedance, (70 Ohms),and the IF input is high impedance(15kOhms),
so considerablevoltage gain is achievedin the impedancematching filter.

The filter also sets the bandwidthof the receiver, using the load impedance with the L/C ratio to set the
filter Q. If desired, an external resistor may be added in parallel to reduce the Q. Note that the
bandwidth must be much wider than the 2MHz needed to pass the power of the GPS signal... it must
maintain linear phase across the 2MHz, even at the extremesof component tolerance.

Fig. 5 IF Filter

7/10

STB5600

A.3 ReferenceOscillator

The recommended dual output oscillator shown in figure 6 generates both the 81.84MHz signal that is
divided down for the CPU 16.368MHz clock, but also the low amplitude 1555MHz first local oscillator
signal .

Note that some 2 volts of the 82MHz signal is available, and the capacitive tap on the tank circuit is used
to reducethe amplitudeto preventexcessive radiation.

Note that the transistor must be a high frequency type, Ft of 8 GHz or greater, and that the collector
inductormust have a self resonant frequency of2.5GHz or higher.

Fig. 6 ReferenceOscillator

8/10

TQFP32 MECHANICAL DATA

STB5600

DIM.

mm inch

MIN. TYP. MAX. MIN. TYP. MAX.

A 1.60 0.063
A1 0.05 0.15 0.002 0.006
A2 1.35 1.40 1.45 0.053 0.055 0.057

B 0.30 0.37 0.45 0.012 0.015 0.018

C 0.09 0.20 0.004 0.008

D 9.00 0.354

D1 7.00 0.276
D3 5.60 0.220

e 0.80 0.031

E 9.00 0.354
E1 7.00 0.276
E3 5.60 0.220

L 0.45 0.60 0.75 0.018 0.024 0.030
L1 1.00 0.039

K0

o

(min.), 7o(max.)

D

D1

A

A2

A1

1724

25

B

32

1

e

16

E3D3E1

9

8

E

0.10mm
.004

Seating Plane

B

C

L1

L

K

TQFP32

0060661

9/10

STB5600

Information furnished is believed to be accurate andreliable. However, STMicroelectronics assumes no responsibility forthe consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorizedfor use as critical components in life support devices or systems without express written approval of STMicroelectronics.

The ST logo is a registered trademark of STMicroelectronics

 1998 STMicroelectronics –Printed in Italy – All RightsReserved

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