Page 1
STP40NF10
STB40NF10 - STB40NF10-1
N-CHANNEL 100V - 0.024Ω - 50A TO-220/D2PAK/I2PAK
LOW GATE CHARGE STripFET™ II POWER MOSFET
TYPE V
STP40NF10
STB40NF10
STB40NF10-1
■ TYPICAL R
■ EXCEPTIONA L dv/d t CAPABILITY
■ 100% AVALANCHE TESTED
■ APPLICATION ORIENTED
DS
DSS
100 V
100 V
100 V
(on) = 0.024Ω
R
DS(on)
< 0.028 Ω
< 0.028 Ω
< 0.028 Ω
I
D
50 A
50 A
50 A
CHARACTERIZATION
■ ADD SUFFIX “T4” FOR ORDERING IN TAPE &
REEL
DESCRIPTION
This Power MOSFET series realized with STM icroelectronics unique STripFET process has specifically been designed to minimize input capacitance and
gate charge. It is therefore suitable as primary
switch in advanced high-efficiency isolated D C-DC
converters for T el ecom and Computer application. It
is also intended for any application with low gate
charge drive requirements.
APPLICATIONS
■ HIGH-EFFICIENCY DC-DC CONVERTERS
■ UPS AND MOTOR CONTROL
3
2
1
1
D2PAK
TO-220
3
2
1
I2PAK
INTERNAL SCHEMATIC DIAGRAM
3
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
DS
V
DGR
V
GS
I
(*) Drain Current (continuous) at TC = 25°C
D
I
D
I
DM
P
TOT
dv/dt (1) Peak Diode Recovery voltage slope 20 V/ns
E
AS
T
stg
T
j
(●) Pulse width limited by safe operating area
(*) Limited by Package
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
100 V
100 V
Gate- source Voltage ± 20 V
50 A
Drain Current (continuous) at TC = 100°C
(l)
Drain Current (pulsed) 200 A
Total Dissipation at TC = 25°C
35 A
150 W
Derating Factor 1 W/°C
(2)
Single Pulse Avalanche Energy 150 mJ
Storage Temperature
Operating Junction Temperature
(1) ISD ≤40A, di/dt ≤600A/µs, VDD ≤ V
(2) Starting Tj = 25°C, ID = 40A, VDD = 50V
– 55 to 175 °C
(BR)DSS
, Tj ≤ T
JMAX.
1/11September 2002
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STP40NF10 - STB40NF10 - STB40NF10-1
THERMA L D ATA
Rthj-case Thermal Resistance Junction-case Max 1 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W
T
l
Maximum Lead Temperature For Soldering Purpose 300 °C
ELECTRICAL CHARACTERISTICS (T
= 25 °C UNLESS OTHERWISE SPECIFIED)
CASE
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
ID = 250 µA, VGS = 0 100 V
Breakdown Voltage
V
= Max Rating
DS
V
= Max Rating, TC = 125 °C
DS
V
= ± 20V ±100 nA
GS
1µA
10 µA
ON
I
I
GSS
(1)
DSS
Zero Gate Voltage
Drain Current (V
GS
Gate-body Leakage
Current (V
DS
= 0)
= 0)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
V
GS(th)
R
DS(on)
Gate Threshold Voltage
Static Drain-source On
= VGS, ID = 250µA
DS
VGS = 10V, ID = 20 A
2 2.8 4 V
0.024 0.028 Ω
Resistance
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
(1) Forward Transconductance VDS = 25V, ID= 20 A 20 S
g
fs
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance 265 pF
Reverse Transfer
Capacitance
V
= 25V, f = 1 MHz, VGS = 0
DS
1780 pF
112 pF
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STP40NF10 - STB40NF10 - STB40NF10-1
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
t
d(on)
Q
Q
Q
t
r
g
gs
gd
Turn-on Delay Time
Rise Time 63 ns
Total Gate Charge VDD = 80V, ID =40A,VGS = 10V 60
Gate-Source Charge 10 nC
Gate-Drain Charge 23 nC
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(off)
t
f
Turn-off-Delay Time
Fall Time
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
VSD (1)
t
rr
Q
rr
I
RRM
Note: 1. Pulsed: Pu l se duration = 300 µs, duty c ycle 1.5 %.
2. Pulse width li mited by safe operating area.
Source-drain Current 40 A
(2)
Source-drain Current (pulsed) 160 A
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
= 50 V, ID = 20 A
DD
R
= 4.7Ω VGS = 10V
G
(see test circuit, Figure 3)
VDD = 50 V, ID = 20 A,
RG=4.7Ω, V
GS
= 10V
(see test circuit, Figure 3)
ISD = 40 A, VGS = 0
= 40 A, di/dt = 100A/µs,
I
SD
VDD = 25V, Tj = 150°C
(see test circuit, Figure 5)
28 ns
80
84
28
1.3 V
114
456
8
nC
ns
ns
ns
nC
A
Thermal Impedance Safe Operating Area
3/11
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STP40NF10 - STB40NF10 - STB40NF10-1
Output Characteristics
Transfer Characteristics
Static Drain-source On ResistanceTransconductanc e
Gate Charge vs Gate-source Voltage
4/11
Capacitance Variations
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STP40NF10 - STB40NF10 - STB40NF10-1
Normalized Gate Threshold Volta ge vs
Temperature
Source-drain Diode Forward Characteristics
Normalized On Resistance vs Temperature
Normalized Drain-Source Breakdown vs
Temperature
5/11
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STP40NF10 - STB40NF10 - STB40NF10-1
Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuit For
Resistive Load
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
6/11
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STP40NF10 - STB40NF10 - STB40NF10-1
TO-220 MECHANICAL DATA
DIM.
A 4.40 4.60
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.066
F2 1.14 1.70 0.044 0.066
G 4.95 5.15 0.194 0.202
G1 2.40 2.70 0.094 0.106
H2 10 10.40 0.393 0.409
L2 16.40 0.645
L3 28.90 1.137
L4 13 14 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.20 6.60 0.244 0.259
L9 3.50 3.93 0.137 0.154
DIA 3.75 3.85 0.147 0.151
MIN. TYP MAX. MIN. TYP. MAX.
mm. inch
0.173
0.181
1
7/11
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STP40NF10 - STB40NF10 - STB40NF10-1
2
D
PAK MECHANICAL DATA
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 4.4 4.6 0.173 0.181
A1 2.49 2.69 0.098 0.106
A2 0.03 0.23 0.001 0.009
B 0.7 0.93 0.027 0.036
B2 1.14 1.7 0.044 0.067
C 0.45 0.6 0.017 0.023
C2 1.23 1.36 0.048 0.053
D 8.95 9.35 0.352 0.368
D1 8 0.315
E 10 10.4 0.393
E1 8.5 0.334
G 4.88 5.28 0.192 0.208
L 15 15.85 0.590 0.625
L2 1.27 1.4 0.050 0.055
L3 1.4 1.75 0.055 0.068
mm. inch
M 2.4 3.2 0.094 0.126
R 0.4 0.015
V2 0º8º
3
8/11
1
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STP40NF10 - STB40NF10 - STB40NF10-1
TO-262 (I2PAK) MECHANICAL DATA
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.4 4.6 0.173 0.181
A1 2.49 2.69 0.098 0.10 6
B 0.7 0.93 0.027 0.036
B2 1.14 1.7 0.044 0.067
C 0.45 0.6 0.017 0.023
C2 1.23 1.36 0.048 0.053
D 8.95 9.35 0.352 0.368
e 2.4 2.7 0.094 0.106
E 10 10.4 0.393 0.409
L 13.1 13.6 0.515 0.531
L1 3.48 3.78 0.137 0.149
L2 1.27 1.4 0.050 0.055
mm inch
C
A
A1
C2
B2
B
e
E
L1
L2
D
L
P011P5/E
9/11
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STP40NF10 - STB40NF10 - STB40NF10-1
D2PAK FOOTPRINT
TAPE AND REEL SHIPMENT (suffix ”T4”)*
TUBE SHIPMENT (no suffix)*
REEL MECHANICAL DATA
DIM.
A 330 12.992
B 1.5 0.059
C 12.8 13.2 0.504 0.520
D 20.2 0795
G 24.4 26.4 0.960 1.039
N 100 3 .937
T 30.4 1.197
mm inch
MIN. MAX. MIN. MAX.
TAPE MECHANICAL DATA
DIM.
A0 10.5 10.7 0.413 0.421
B0 15.7 15.9 0.618 0.626
D 1.5 1.6 0.059 0.063
D1 1.59 1.61 0.062 0.063
E 1.65 1.85 0.065 0.073
F 11.4 11.6 0.449 0.456
K0 4.8 5.0 0.189 0.197
P0 3.9 4.1 0.153 0.161
P1 11.9 12.1 0.468 0.476
P2 1.9 2.1 0.075 0.082
R 50 1.574
T 0.25 0.35 0.0098 0.0137
W 23.7 24.3 0.933 0.956
* on sales type
10/11
mm inch
MIN. MAX. MIN. MAX.
BASE QTY BULK QTY
1000 1000
Page 11
STP40NF10 - STB40NF10 - STB40NF10-1
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of su ch in formation nor for any in fringement of paten ts or o ther rights of third parties w hich may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously suppli ed. STMi croelect ronics pr oducts are not author ized for use as c ritical component s in li fe suppo rt devi ces or
systems without express written approval of STMicroelectronics.
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© The ST logo is a registered trademark of STMicroelectronics
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11/11
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