Datasheet STB36NF02L Datasheet (SGS Thomson Microelectronics)

STB36NF02L

N-CHANNEL 20V - 0.016

Ω

- 36A D2PAK

LOW GATE CHARGE STripFET POWER MOSFET

PRELIMINARY DATA

■ TYPICALR

DS(on)

= 0.016 Ω

■ TYPICALQ

g

= 19 nC @ 10V

■ OPTIMAL R

DS(on)xQg

TRADE-OFF

■ CONDUCTION LOSSESREDUCED

■ SWITCHINGLOSSESREDUCED

DESCRIPTION

This applicationspecific Power Mosfet is the third
generation of STMicroelectronics unique ”Single
Feature Size” strip-based process. The resul­ting transistor shows the best trade-off between
on-resistance and gate charge. When used as
high and low side in buck regulators, it gives the
best performancein termsof both conductionand
switching losses. This is extremely important for
motherboardswhere fast switching and high effi­ciencyare of paramount importance.

APPLICATIONS

■ SPECIFICALLYDESIGNEDAND

OPTIMISEDFOR HIGH EFFICIENCY CPU
CORE DC/DC CONVERTERS



INTERNAL SCHEMATIC DIAGRAM

October 1999

1

3

D2PAK

TO-263

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

V

DS

Dra in- sour c e Volt age ( VGS=0) 20 V

V

DGR

Dra in- gate V ol t age ( RGS=20kΩ)20V

V

GS

Gat e-source Voltage

±

20 V

I

D

Dra in C u rr ent (c ontinuous) at Tc=25oC36A

I

D

Dra in C u rr ent (c ontinuous) at Tc=100oC25A

I

DM

(•) Dra in Current ( p uls ed ) 144 A

P

tot

Tot al Dis s ipation at Tc=25oC75W
Der ati ng Fac t or 0.5 W/

o

C

T

stg

St orage Tempe rat ure -65 t o 175

o

C

T

j

Max. O perating Junc t ion T emperat ure 175

o

C

(•) Pulse width limited by safeoperating area

TYPE V

DSS

R

DS(on)

I

D

ST B36NF02L 20 V < 0.021 Ω 36 A

ADD SUFFIX ”T4” FOR ORDERING IN TAPE & REEL

1/6

THERMAL DATA

R

thj-case

R

thj-amb

T

l

Ther mal Resistanc e Junct ion-case Max
Ther mal Resistanc e Junct ion-ambient Max
Maximum Lead Tem pe ra tur e For Solder ing Purpose

2

62.5
300

o

C/W

o

C/W

o

C

ELECTRICAL CHARACTERISTICS

(T

case

=25oC unless otherwisespecified)

OFF

Symbol Parameter Test Conditions Min. Typ. Max. Unit

V

(BR)DSS

Drain-source
Break dow n V o lt age

ID=250µAVGS=0 20 V

I

DSS

Zero Gate Voltage
Drain Cur re nt ( V

GS

=0)

V

DS

=MaxRating

V

DS

=MaxRating Tc=125oC

1

10

µA
µ

A

I

GSS

Gat e- bod y L eakage
Current (V

DS

=0)

V

GS

= ± 20 V ± 100 nA

ON(∗)

Symbol Parameter Test Conditions Min. Typ. Max. Unit

V

GS(th)

Gate Threshold Volt age VDS=VGSID= 250 µA12.5V

R

DS(on)

Sta t ic Drain -s ource On
Resistance

VGS=10V ID=18A
V

GS

=4.5V ID=18A

0.016

0.023

0.021

0.03

Ω
Ω

I

D(on)

On State Drain Current VDS>I

D(on)xRDS(on )max

VGS=10V

36 A

DYNAMIC

Symbol Parameter Test Conditions Min. Typ. Max. Unit

g

fs

(∗)Forward

Tr ansc on duc tance

VDS>I

D(on)xRDS(on )maxID

=18 A 20 S

C

iss

C

oss

C

rss

Input Capac i t ance
Out put Capacitance
Reverse Tr ansfer
Capacit a nc e

VDS=25V f=1MHz VGS= 0 750

270

60

pF
pF
pF

STB36NF02L

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ELECTRICAL CHARACTERISTICS

(continued)

SWITCHING ON

Symbol Parameter Test Conditions Min. Typ. Max. Unit

t

d(on)

t

r

Tur n-on Delay Time
Rise Ti me

VDD=15V ID=40A
R

G

=4.7

Ω

VGS=4.5V

(Resis t iv e Loa d, s ee fig. 3)

20

270

ns
ns

Q

g

Q

gs

Q

gd

Tot al Gat e Charge
Gat e- Source Charge
Gate-Drain Charge

VDD=16V ID=36A VGS=10V 19

3
5

21 nC

nC
nC

SWITCHING OFF

Symbol Parameter Test Conditions Min. Typ. Max. Unit

t

d(off)

t

f

Tur n-of f Delay Time
Fall T ime

VDD=15V ID=40A
R

G

=4.7 Ω VGS=4.5V

(Resis t iv e Loa d, s ee fig. 3)

35
60

ns
ns

SOURCEDRAINDIODE

Symbol Parameter Test Conditions Min. Typ. Max. Unit

I

SD

I

SDM

(•)

Source-drain Current
Source-drain Current
(pulsed)

36

144

A
A

V

SD

(∗)ForwardOnVoltage ISD=36 A VGS=0 1.5 V

t

rr

Q

rr

I

RRM

Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current

ISD= 36 A di/dt = 100 A /µ s
V

DD

=15V Tj=150oC

(see test circuit, fig. 5)

50
80

2

ns

nC

A

(∗) Pulsed: Pulse duration = 300µs, duty cycle 1.5 %
(•) Pulse width limited by safe operatingarea

STB36NF02L

3/6

Fig. 1:

UnclampedInductiveLoad TestCircuit

Fig. 3: SwitchingTimes Test Circuits For
ResistiveLoad

Fig. 2:

UnclampedInductiveWaveform

Fig. 4: Gate Chargetest Circuit

Fig. 5:

Test CircuitFor InductiveLoad Switching

And Diode Recovery Times

STB36NF02L

4/6

DIM.

mm inch

MIN. TYP. MAX. MIN. TYP. MAX.

A 4.4 4.6 0.173 0.181

A1 2.49 2.69 0.098 0.106

B 0.7 0.93 0.027 0.036

B2 1.14 1.7 0.044 0.067

C 0.45 0.6 0.017 0.023

C2 1.21 1.36 0.047 0.053

D 8.95 9.35 0.352 0.368
E 10 10.4 0.393 0.409
G 4.88 5.28 0.192 0.208

L 15 15.85 0.590 0.624
L2 1.27 1.4 0.050 0.055
L3 1.4 1.75 0.055 0.068

L2

L3

L

B2

B

G

E

A

C2

D

C

A1

DETAIL”A”

DETAIL”A”

A2

P011P6/E

TO-263 (D2PAK) MECHANICAL DATA

STB36NF02L

5/6

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STB36NF02L

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