This MOSFET series realized with STMicroelectronics
unique STripFET process has specifically been designed
to minimize input capacitance and gate charge. It is
therefore suitable as primary switch in advanced highefficiency, high-frequency isolate d DC-DC c onverters for
Telecom and Computer a pplications. It is also intended
for any applications with low gate drive requirements.
APPLICATIONS
■ HIGH-EFFICIENCY DC-DC CONVERTERS
■ UPS AND MOTOR CONTROL
3
1
D2PAK
TO-263
(Suffix “T4”)
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
DS
V
DGR
V
GS
I
D
I
D
(
I
DM
P
tot
dv/dt
E
AS
T
stg
T
j
•) Pulse width limited by safe operating area.(1) I
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
150V
150V
Gate- source Voltage± 20V
Drain Current (continuos) at TC = 25°C
Drain Current (continuos) at TC = 100°C
•)
Drain Current (pulsed)120A
Total Dissipation at TC = 25°C
30A
21A
110W
Derating Factor0.73W/°C
(1)
Peak Diode Recovery voltage slope2V/ns
(2)
Single Pulse Avalanche Energy250mJ
Storage Temperature
Max. Operating Junction Temperature
≤ 30A, di/dt ≤ 100A/µs, VDD ≤ V
SD
(2) Starting Tj = 25 oC, ID = 15A, VDD = 25V
-55 to 175°C
(BR)DSS
, Tj ≤ T
JMAX.
1/9October 2001
Page 2
STB30NS15
THERMA L D ATA
Rthj-case
Rthj-amb
T
l
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Maximum Lead Temperature For Soldering Purpose
Max
Max
1.36
62.5
300
°C/W
°C/W
°C
ELECTRICAL CHARACTERISTICS (T
= 25 °C unless otherwise specified)
case
OFF
SymbolParameterTest ConditionsMin.Typ.Max.Unit
= 250 µA, VGS = 0
V
(BR)DSS
Drain-source
I
D
150V
Breakdown Voltage
= Max Rating
V
DS
= Max Rating TC = 125°C
V
DS
= ± 20V
V
GS
1
10
±100nA
ON
(*)
I
DSS
I
GSS
Zero Gate Voltage
Drain Current (V
GS
Gate-body Leakage
Current (V
DS
= 0)
= 0)
SymbolParameterTest ConditionsMin.Typ.Max.Unit
V
GS(th)
R
DS(on)
Gate Threshold Voltage
Static Drain-source On
= V
DS
GS
= 10 VID = 15 A
V
GS
ID = 250 µA
234V
0.0750.1
V
Resistance
DYNAMIC
SymbolParameterTest ConditionsMin.Typ.Max.Unit
(*)
g
fs
C
iss
C
oss
C
rss
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
= 20 VID = 15 A
DS
= 25V f = 1 MHz VGS = 0
V
DS
8S
990
175
110
µA
µA
Ω
pF
pF
pF
2/9
Page 3
STB30NS15
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
SymbolParameterTest ConditionsMin.Typ.Max.Unit
t
d(on)
t
r
Q
g
Q
gs
Q
gd
(*)
Turn-on Time
Rise Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
= 75 VID =15 A
V
DD
= 4.7
R
Ω
G
VGS = 10 V
(Resistive Load, Figure 3)
=120V ID=30A VGS=10V
V
DD
12
28
64
8
27
ns
ns
nC
nC
nC
SWITCHING OFF
(*)
SymbolParameterTest ConditionsMin.Typ.Max.Unit
= 75 VID = 15 A
t
d(off)
t
Turn-off Delay Time
f
Fall Time
V
DD
= 4.7Ω, V
R
G
GS
= 10 V
50
12
(Resistive Load, Figure 3)
t
r(Voff)
t
f
t
c
Off-voltage Rise Time
Fall Time
Cross-over Time
SOURCE DRAIN DIODE
(*)
V
= 120 VID = 30 A
clamp
= 4.7Ω, V
R
G
GS
(Inductive Load, Figure 5)
= 10 V
50
17
11
SymbolParameterTest ConditionsMin.Typ.Max.Unit
I
SD
I
SDM
V
SD
t
rr
Q
rr
I
RRM
(*)
Pulsed: P ul se duration = 300 µs, duty cycle 1.5 %.
(
•)Pulse width limited by T
Safe Operating Area
Source-drain Current
(•)
Source-drain Current (pulsed)
(*)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
jmax
I
= 30 A VGS = 0
SD
= 30 Adi/dt = 100A/µs
I
SD
= 50 VTj = 150°C
V
DD
(see test circuit, Figure 5)
Thermal Impedance
30
120
1.3V
190
1.25
13
ns
ns
ns
ns
ns
ns
µ
A
A
C
A
3/9
Page 4
STB30NS15
Output CharacteristicsTransfer Characteristics
TransconductanceStatic Drain-source On Resistance
Gate Charge vs Gate-source VoltageCapacitance Variations
4/9
Page 5
STB30NS15
Normalized Gate Threshold Voltage vs TemperatureNormalized on Resistance vs Temperature
Source-drain Diode Forward CharacteristicsNormalized Breakdown Voltage vs Temperature.
..
.
.
5/9
Page 6
STB30NS15
Fig. 1: Unclamped Inductive Load Test CircuitFig. 1: Unclamped Inductive Load Test CircuitFig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive
Load
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Information furnished is believed to be accurate an d rel i able. Howev er, STMicroel ectronics assumes no resp onsibility for the consequence s
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implic ation or otherwise under any patent or patent rights of STMi croelectr onics. Sp ecifications mentioned in thi s publicati on are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as cri tical comp onents in life support dev i ces or systems wi thout exp ress written approval of STM i croelect ronics.
The ST log o i s registered trademark of STMicroelectronics
2001 STMi croelectr onics - All Rights Rese rved
All other names are the property of their respective owners.
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9/9
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