Page 1
STB30NE06L
N - CHANNEL 60V - 0.35
TYPE V
ST B30NE06L 60 V < 0 .05 Ω 30 A
■ TYPICALR
■ 100%AVALANCHETESTED
■ LOW GATE CHARGE 100
■ APPLICATIONORIENTED
DS(on)
DSS
= 0.035 Ω
CHARACTERIZATION
■ FORTHROUGH-HOLE VERSION CONTACT
SALESOFFICE
DESCRIPTION
This Power Mosfet is the latest development of
STMicroelectronisunique ”Single Feature Size”
strip-based process. The resulting transistor
shows extremely high packing density for low
on-resistance, rugged avalance characteristics
and less critical alignment steps therefore a
remarkablemanufacturingreproducibility.
APPLICATIONS
■ DC MOTOR CONTROL
■ DC-DC& DC-AC CONVERTERS
■ SYNCHRONOUSRECTIFICATION
R
DS(on)
o
C
I
D
Ω
- 30A - D2PAK
STripFET POWER MOSFET
PRELIMINARY DATA
3
1
D2PAK
TO-263
(suffix ”T4”)
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
V
V
I
DM
P
T
(•) Pulse width limited by safe operating area
March 1999
Dra in- sour c e Volt age (VGS=0) 60 V
DS
Dra in- gat e Voltage (RGS=20kΩ)60V
DGR
Gat e-source Volt age
GS
I
Dra in Cu rr ent (contin uous ) a t Tc=25oC30A
D
I
Dra in Cu rr ent (contin uous ) a t Tc=100oC21A
D
(•) Dra in Cu rr ent (pulsed) 120 A
Tot al Dissipat ion at Tc=25oC80W
tot
Der ati ng Fact or 0.53 W/
St orage Temperat ure -65 to 175
stg
T
Max. Operating Junct ion Temperat ure 175
j
20 V
±
o
C
o
C
o
C
1/6
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STB30NE06L
THERMAL DATA
R
thj-case
Rthj-a m b
R
thc-sink
T
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
I
AR
E
Ther mal Resistanc e Junct ion-case Max
Ther mal Resistanc e Junct ion-ambient Max
Ther mal Resistanc e Case-sink Ty p
Maximum Lead T e m pe ra t ure For Soldering P urpose
l
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
Single Pul se Avalanc he Ener gy
AS
(starting T
=25oC, ID=IAR,VDD=50V)
j
max)
j
1.875
62.5
0.5
300
20 A
100 mJ
o
C/W
oC/W
o
C/W
o
C
ELECTRICAL CHARACTERISTICS
=25oC unless otherwisespecified)
(T
case
OFF
Symbol Parameter Test Con ditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
ID=250µAVGS=0 60 V
Break dow n Vo lt age
I
DSS
I
GSS
Zero Gate Voltage
Drain Curre nt (V
GS
Gat e- bod y Leakag e
Current (V
DS
=0)
=0)
V
=MaxRating
DS
=MaxRating Tc= 125oC
V
DS
V
=± 20 V
GS
1
10
100 nA
±
ON(∗)
Symbol Parameter Test Con ditions Min. Typ. Max. Unit
V
GS(th)
R
DS(on)
I
D(on)
Gate Threshold Voltage VDS=VGSID= 250 µA 1 1.75 2.5 V
Sta t ic Drain-s our c e On
Resistance
VGS=5V ID=15A
=10V ID=15A
V
GS
On State Drain Current VDS>I
D(on)xRDS(on)max
0.045
0.035
30 A
0.06
0.05
VGS=10V
DYNAMIC
Symbol Parameter Test Con ditions Min. Typ. Max. Unit
g
(∗)Forward
fs
Tr ansc on duc tance
C
C
C
Input Capaci t ance
iss
Out put Capac itance
oss
Reverse Transfer
rss
Capacit a nc e
VDS>I
D(on)xRDS(on)maxID
=15 A 10 18 S
VDS=25V f=1MHz VGS= 0 1350
195
58
µ
µA
Ω
Ω
pF
pF
pF
A
2/6
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STB30NE06L
ELECTRICAL CHARACTERISTICS
(continued)
SWITCHINGON
Symbol Parameter Test Con ditions Min. Typ. Max. Unit
t
d(on)
t
Tur n-on Delay T ime
Rise Time
r
VDD=30V ID=15A
R
=4.7
G
Ω
VGS=4.5V
25
105
(Resis t iv e Load, see fig. 3)
Q
Q
Q
Tot al Gate Charge
g
Gat e- Source Charge
gs
Gate-Drain Charge
gd
VDD=48V ID=30A VGS=5V 20
8
10
28 nC
SWITCHINGOFF
Symbol Parameter Test Con ditions Min. Typ. Max. Unit
t
d(off)
Tur n-of f Dela y Tim e
t
Fall T ime
f
VDD=30V ID=15A
=4.7 Ω VGS=4.5V
R
G
50
20
(Resis t iv e Load, see fig. 3)
t
r(Voff)
t
t
Off-voltage Ris e Time
Fall T ime
f
Cross-over Tim e
c
VDD=48V ID=30A
=4.7 Ω VGS=4.5V
R
G
(Indu ct iv e Load, see fig. 5)
15
40
60
SOURCEDRAINDIODE
Symbol Parameter Test Con ditions Min. Typ. Max. Unit
I
SDM
V
I
SD
Q
I
RRM
SD
t
Source-drain Current
(•)
Source-drain Current
30
120
(pulsed)
(∗)ForwardOnVoltage ISD=30A VGS=0 1.5 V
Reverse Recovery
rr
Time
Reverse Recovery
rr
ISD= 30 A di/dt = 100 A /µs
=30V Tj=150oC
V
DD
(see test circuit, fig. 5)
80
0.18
Charge
Reverse Recovery
4.5
Current
ns
ns
nC
nC
ns
ns
ns
ns
ns
A
A
ns
µC
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operatingarea
3/6
Page 4
STB30NE06L
Fig. 1:
UnclampedInductiveLoad TestCircuit
Fig. 3: SwitchingTimes Test Circuits For
ResistiveLoad
Fig. 2:
UnclampedInductive Waveform
Fig. 4: Gate Chargetest Circuit
Fig. 5:
Test CircuitFor InductiveLoad Switching
And Diode Recovery Times
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Page 5
TO-263 (D2PAK) MECHANICAL DATA
STB30NE06L
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.4 4.6 0.173 0.181
A1 2.49 2.69 0.098 0.106
B 0.7 0.93 0.027 0.036
B2 1.14 1.7 0.044 0.067
C 0.45 0.6 0.017 0.023
C2 1.21 1.36 0.047 0.053
D 8.95 9.35 0.352 0.368
E 10 10.4 0.393 0.409
G 4.88 5.28 0.192 0.208
L 15 15.85 0.590 0.624
L2 1.27 1.4 0.050 0.055
L3 1.4 1.75 0.055 0.068
mm inch
D
A
C2
DETAIL”A”
C
A2
DETAIL”A”
A1
B2
E
L2
L
L3
B
G
P011P6/E
5/6
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STB30NE06L
Information furnishedis believedto be accurateand reliable.However, STMicroelectronics assumes no responsibilityfor the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights ofSTMicroelectronics. Specificationmentioned in this publication are
subjectto change without notice.Thispublicationsupersedes and replacesall informationpreviouslysupplied. STMicroelectronicsproducts
are not authorized for use as critical components in life support devicesor systemswithout express written approvalof STMicroelectronics.
The STlogo is a trademark of STMicroelectronics
1999 STMicroelectronics – Printed in Italy – All Rights Reserved
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6/6
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