Datasheet STB160NF3LL Datasheet (SGS Thomson Microelectronics)

Page 1
STB160NF3LL
N-CHANNEL 30V - 0.0026 - 160A D2PAK
PRELIMINARY DATA
TYPE
V
DSS
ST160NF3LL 30 V <0.003
TYPICAL R
LOW THRESHOLD DRIVE
ULTRA LOW ON-RESISTANCE
LOGIC LEVEL DEVICE
100% AVALANCHE TESTED
SURFACE-MOUNTING D
(on) = 0.0026
DS
R
DS(on)
2
PAK (TO-263)
I
D
160 A
POWER PACKAG E IN TU BE (NO SU FFIX) OR
IN TAPE & REEL (SUFFIX “T4”)
DESCRIPTION
This Power MOSFET is the latest dev elo pment of STMicroelectronis unique "Single Feature Size™" strip-based process. The resulting transistor shows extremely high packing density for low on­resistance, rugged avalanche characteristics and less critical alignment steps therefore a remark­able manufacturing reproducibility.
APPLICATIONS
HIGH CURRENT, HIGH SWITCHING SPEED
MOTOR CONTROL, AUDIO AMPLIFIERS
DC-DC & DC-AC CONVERTERS
SOLENOID AND RELAY DRIVERS
3
1
D2PAK
TO-263
(Suffix “T4”)
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
DS
V
DGR
V
GS
I
(
D
I
D
(
I
DM
P
tot
E
AS
T
stg
T
j
(
Pulse width limited by safe operating area.
•)
(*) Curren t Lim i ted by Pack age
May 2002
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ)
30 V 30 V
Gate- source Voltage ± 15 V
Drain Current (continuous) at T
)
Drain Current (continuous) at TC = 100°C
•)
Drain Current (pulsed) 640 A Total Dissipation at TC = 25°C
= 25°C
C
160 A 160 A
300 W
Derating Factor 2 W/°C
(1)
Single Pulse Avalanche Energy 1.2 J Storage Temperature Max. Operating Junction Temperature
(1) Starting Tj = 25 oC, ID = 80A, VDD = 20V
-55 to 175 °C
1/7
Page 2
STB160NF3LL
THERMA L D ATA
Rthj-case
Rthj-amb
T
l
Thermal Resistance Junction-case Thermal Resistance Junction-ambient Maximum Lead Temperature For Soldering Purpose
Max Max
0.5
62.5 300
°C/W °C/W
°C
ELECTRICAL CHARACTERISTICS (T
= 25 °C unless otherwise specified)
case
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
= 250 µA VGS = 0
V
(BR)DSS
Drain-source
I
D
30 V
Breakdown Voltage
= Max Rating
V
DS
= Max Rating TC = 125°C
V
DS
= ± 15 V
V
GS
1
10
±100 nA
ON
(*)
I
DSS
I
GSS
Zero Gate Voltage Drain Current (V
GS
Gate-body Leakage Current (V
DS
= 0)
= 0)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
V
GS(th)
R
DS(on)
Gate Threshold Voltage Static Drain-source On
Resistance
= V
DS
GS
= 10 V ID = 80 A
V
GS
= 4.5 V ID = 80 A
V
GS
ID = 250 µA
1V
0.0026
0.0032
0.0030
0.0043
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
(*)
g
fs
C
iss
C
oss
C
rss
Forward Transconductance Input Capacitance
Output Capacitance Reverse Transfer Capacitance
V
= 15 V ID =80 A
DS
= 25V f = 1 MHz VGS = 0
V
DS
60 S
6200 1720
300
µA µA
Ω Ω
pF pF pF
2/7
Page 3
STB160NF3LL
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
t
r
Q
g
Q
gs
Q
gd
(*)
Turn-on Time Rise Time
Total Gate Charge Gate-Source Charge Gate-Drain Charge
= 15 V ID = 80 A
V
DD
= 4.7
R
G
VGS = 4.5 V
(Resistive Load, Figure 3)
=24V ID=160A VGS=5V
V
DD
50
350
95 25 45
125 nC
ns ns
nC nC
SWITCHING OFF
(*)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(off)
t
f
Turn-off Delay Time Fall Time
SOURCE DRAIN DIODE
(*)
V
DD
= 4.7Ω, V
R
G
GS
(Resistive Load, Figure 3)
= 4.5 V
150 120
= 15 V ID = 80 A
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
V
SD
t
rr
Q
rr
I
RRM
(*)
Pulsed: P ul se duration = 300 µs, duty cycle 1.5 %.
(
•)
Pulse width limited by T
Source-drain Current
(
•)
Source-drain Current (pulsed)
(*)
Forward On Voltage Reverse Recovery Time
Reverse Recovery Charge Reverse Recovery Current
jmax
I
= 160 A VGS = 0
SD
I
= 160 A di/dt = 100A/µs
SD
= 15 V Tj = 150°C
V
DD
(see test circuit, Figure 5)
160 640
1.3 V
90
200
5
ns ns
A A
ns
nC
A
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Page 4
STB160NF3LL
Fig. 1: Unclamped Inductive Load Test CircuitFig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive
Load
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
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Page 5
D2PAK MECHANICAL DATA
STB160NF3LL
DIM.
A 4.4 4.6 0.173 0.181 A1 2.49 2.69 0.098 A2 0.03 0.23 0.001 0.009
B 0.7 0.93 0.028 0.037 B2 1.14 1.7 0.045 0.067
C 0.45 0.6 0.018 0.024 C2 1.21 1.36 0.048 0.054
D 8.95 9.35 0.352 0.368 D1 8 0.315
E 10 10.4 0.394 0.409
E1 8.5 0.334
G 4.88 5.28 0.192 0.208
L 15 15.85 0.591 0.624 L2 1.27 1.4 0.050 0.055 L3 1.4 1.75 0.055 0.069
M 2.4 3.2 0.094 0.126 R 0.4 0.015
V2
MIN. TYP. MAX. MIN. TYP. TYP.
mm. inch.
0.106
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Page 6
STB160NF3LL
D2PAK FOOTPRINT
TAPE AND REEL SHIPMENT (suffix ”T4”)*
TUBE SHIPMENT (no suffix)*
REEL MECHANICAL DATA
DIM.
A 330 12.992 B 1.5 0.059 C 12.8 13.2 0.504 0.520 D 20.2 0.795 G 24.4 26.4 0.960 1.039 N 100 3.937
T 30.4 1.197
mm inch
MIN. MAX. MIN. MAX.
TAPE MECHANICAL DATA
DIM.
A0 10.5 10.7 0.413 0.421 B0 15.7 15.9 0.618 0.626
D 1.5 1.6 0.059 0.063
D1 1.59 1.61 0.062 0.063
E 1.65 1.85 0.065 0.073
F 11.4 11.6 0.449 0.456 K0 4.8 5.0 0.189 0.197 P0 3.9 4.1 0.153 0.161 P1 11.9 12.1 0.468 0.476 P2 1.9 2.1 0075 0.082
R50 1.574
T0.25 0.35 .0.0098 0.0137
W 23.7 24.3 0.933 0.956
mm inch
MIN. MAX. MIN. MAX.
* on sales type
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BASE QTY BULK QTY
1000 1000
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STB160NF3LL
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implic ation or otherwise under any patent or p atent rights of STMi croelectr oni cs. Spec i fications mentioned i n this publicatio n are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as cri tical comp onents in life support dev i ces or systems wi t hout expres s written approval of STMi croelectr o nics.
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