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M2M MCU with 32-bit ARM Cortex™ M3 CPU
DFN8
259a.ai
Wafer
Features
Hardware features
■ ARM Cortex™-M3 32-bit RISC core
■ 8 Kbytes of user RAM
■ 256 Kbytes of user Flash memory with OTP
area:
– 10-year data retention at 105°C, or 15
years at 85°C
– 500,000 Erase/Write cycles per page
– 50 million Erase/Write cycles per 64 Kbyte
sector
– Page granularity of 128 Bytes
– Block granularity: 1 Kbyte
– 128 Bytes of OTP for user
– Page Erase time 4 ms
– Block Erase 1 Kbyte in 20 ms
– Programming performance up to 10µs/byte
– Flash Erase / Write Protection software
programmable on 64 Kbyte sectors
■ Asynchronous Receiver Transmitter
supporting ISO 7816-3 T=0 and T=1 protocols
■ Two 16-bit timers with interrupt capability
■ 1.8V, 3V and 5V supply voltage ranges
■ External clock frequency from 1 up to 7.5 MHz
■ High performance provided by:
– CPU clock frequency up to 15 MHz
– External clock multiplier (2x, 3x, and 4x)
■ Current consumption compatible with GSM
and ETSI specifications
■ Power-saving Standby state
■ Contact assignment compatible ISO 7816-2
■ ESD protection greater than 4 kV (HBM)
■ 8-pin DFN (6 x 5 mm) ECOPACK® package
ST32F256-M
and 256 Kbyte high-density Flash memory
Data brief
Security features
■ Monitoring of environmental parameters
■ Protection against faults
■ ISO 3309 CRC calculation block
■ True random number generator
■ Unique serial number on each die
■ Hardware data encryption standard (DES)
accelerator
Software features
■ Flash loader
■ Flash drivers
Development environment
■ Software development and firmware
generation are supported by a comprehensive
set of development tools dedicated to software
design and validation:
– C compiler
– Simulator
–Emulator
Description
The ST32F256-M is designed for machine-tomachine (M2M) applications. Its Cortex™-M3 32bit RISC core operating at a 15-MHz frequency
provides great performance and excellent code
compacity.
July 2010 Doc ID 16598 Rev 3 1/4
For further information contact your local STMicroelectronics sales office.
www.st.com
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Functional description ST32F256-M
Ai12577
Internal Bus
I/O
IART
GND
Cortex™
M3
CPU
Core
2 x
16-bit
Timers
CRC
Module
CLK
Clock
Gene-
rator
Module
Vcc
Tr u e
Random
Number
Gene-
rator
RAM
ST ROM
Security
Adminis-
trator
RESET
Flash
memory
DES
Accelerator
ST ROM
Firewall
1 Functional description
1.1 Hardware description
The ST32F256-M is a serial access microcontroller designed for machine-to-machine
(M2M) applications that incorporates the most recent generation of ARM processors for
embedded systems. Its Cortex™-M3 32-bit RISC core operating at a 15-MHz frequency
brings great performance and excellent code compacity to the application thanks to the
Thumb®-2 instruction set.
The high-speed embedded Flash 256 Kbyte memory introduces more flexibility to the
system.
The ST32F256-M also offers a serial communication interface fully compatible with the ISO
7816-3 standard (T=0, T=1) for smartcard applications.
Two general purpose 16-bit timers are available.
A hardware Data Encryption Standard (DES) accelerator can be used to the user to
optimize the application performance. A software library is provided for Advanced
Encryption Standard (AES) implementation.
The ST32F256-M operates in the –40 to +105°C temperature range and 1.8 V, 3 V and 5 V
supply voltage ranges. A comprehensive range of power-saving modes enables the design
of efficient low-power applications.
Figure 1. ST32F256-M block diagram
2/4 Doc ID 16598 Rev 3
Page 3
ST32F256-M Revision history
1.2 Package features
Package qualification for M2M applications:
● Moisture Sensitivity Level test according to IPC/JEDEC J-STD-20: MSL1 with 260 °C
peak temperature.
● Temperature Humidity Bias test according to JEDEC JESD22-A101: 85 °C, 85% RH,
1000 hours.
● Autoclave test according to JEDEC JESD22-A102: 121°C, 100% RH, 205 kPa,
96 hours.
● Vibration test according to JEDEC JESD22-B103 service condition 1: 20 / 2000 Hz,
20 g peak acceleration.
● Mechanical Shock test according to JEDEC JESD22-B104 service condition B: 1500 g
acceleration for 0.5 ms pulse duration.
● Temperature cycling test according to JEDEC JESD22-A104: –65 / +150 °C,
500 cycles.
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
1.3 Software development tools description
Dedicated Cortex™-M3 software development tools are provided by ARM and Keil. This
includes the Instruction Set Simulator (ISS) and C compiler. The documentation is available
on the ARM and Keil web sites.
Moreover, STMicroelectronics provides:
● A time-accurate hardare emulator controlled by the Keil debugger and the ST
development environment.
● A complete product simulator based on Keil’s ISS simulator for the Cortex™-M3 CPU.
● A ROMed Flash Loader with very high-speed software downloading capabilities.
2 Revision history
Table 1. Document revision history
Date Revision Changes
02-Nov-2009 1 Initial release.
23-Feb-2010 2 Updated Page Erase and Block Erase times.
07-Jul-2010 3 Updated Features on page 1.
Doc ID 16598 Rev 3 3/4
Page 4
ST32F256-M
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4/4 Doc ID 16598 Rev 3
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