Datasheet SSP1N60B, SSS1N60B Datasheet (Fairchild Semiconductor)

SSP1N60B/SSS1N60B

600V N-Channel MOSFET

SSP1N60B/SSS1N60B

November 2001

General Description

These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well

Features

• 1.0A, 600V, R

• Low gate charge ( typical 5.9 nC)

• Low Crss ( typical 3.6 pF)

• Fast switching

• 100% avalanche tested

• Improved dv/dt capability

= 12Ω @VGS = 10 V

DS(on)

suited for high efficiency switch mode power supplies.

D

G

SD

TO-220

SSP Series

GSD

TO-220F

SSS Series

S

Absolute Maximum Ratings T

= 25°C unless otherwise noted

C

Symbol Parameter SSP1N60B SSS1N60B Units

V

DSS

I

D

I

DM

V

GSS

E

AS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt P

D

Drain-Source Voltage 600 V Drain Current

- Continuous (T

Drain Current - Pulsed

= 25°C)

C

= 100°C)

C

(Note 1)

1.0 1.0 * A

0.6 0.6 * A

3.0 3.0 * A Gate-Source Voltage ± 30 V Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy

Power Dissipation (TC = 25°C)

(Note 2) (Note 1) (Note 1) (Note 3)

50 mJ

1.0 A

3.4 mJ

5.5 V/ns

34 17 W

- Derate above 25°C 0.27 0.13 W/°C

T

, T

J

STG

T

L

* Drain current limited by maximum junction temperature.

Operating and Storage Temperature Range -55 to +150 °C Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds

300 °C

Thermal Characteristics

Symbol Parameter SSP1N60B SSS1N60B U nits

R

θJC

R

θCS

R

θJA

Thermal Resistance, Junction-to-Case Max. 3.67 7.48 °C/W Thermal Resistance, Case-to-Sink Typ. 0.5 -- °C/W Thermal Resistance, Junction-to-Ambient Max. 62.5 62.5 °C/W

Rev. A, November 2001

SSP1N60B/SSS1N60B

Electrical Characteristics T

= 25°C unless otherwise noted

C

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BV

DSS

∆BV

DSS

/ ∆T I

DSS

I

GSSF

I

GSSR

Drain-Source Breakdown Voltage Breakdown Voltage Temperature

Coefficient

J

Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward

Gate-Body Leakage Current, Reverse

= 0 V, ID = 250 µA

V

GS

I

= 250 µA, Referenced to 25°C

D

V

= 600 V, VGS = 0 V

DS

V

= 480 V, TC = 125°C

DS

V

= 30 V, VDS = 0 V

GS

= -30 V, VDS = 0 V

V

GS

600 -- -- V

-- 0.65 -- V/°C

-- -- 10 µA

-- -- 100 µA

-- -- 100 nA

-- -- -100 nA

On Characteristics

V R

g

FS

GS(th)

DS(on)

Gate Threshold Voltage Static Drain-Source

On-Resistance Forward Transconductance

V

= VGS, ID = 250 µA

DS

= 10 V, ID = 0.5 A

V

GS

= 40 V, ID = 0.5 A

V

DS

(Note 4)

2.0 -- 4.0 V

-- 9.7 12 Ω

-- 0.97 -- S

Dynamic Characteristics

C

iss

C

oss

C

rss

Input Capacitance Output Capacitance -- 18 25 pF Reverse Transfer Capacitance -- 3.6 4.7 pF

= 25 V, VGS = 0 V,

V

DS

f = 1.0 MHz

-- 165 215 pF

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q Q Q

g gs gd

Turn-On Delay Time Turn-On Rise Time -- 45 100 ns Turn-Off Delay Time -- 25 60 ns Turn-Off Fall Time -- 35 80 ns Total Gate Charge Gate-Source Charge -- 1.0 -- nC Gate-Drain Charge -- 2.7 -- nC

= 300 V, ID = 1.0 A,

V

DD

= 25 Ω

R

G

V

= 480 V, ID = 1.0 A,

DS

V

GS

= 10 V

(Note 4, 5)

-- 14 40 ns

-- 5.9 7.7 nC

Drain-Source Diode Characteristics and Maximum Ratings

I

S

I

SM

V

SD

t

rr

Q

rr

Notes:

1. Repetitive Rating : Pulse width limited by maximum junction temperature

2. L = 92mH, IAS = 1.0A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C

3. ISD ≤ 1.0A, di/dt ≤ 300A/µs, VDD ≤ BV

4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%

5. Essentially independent of operating temperature

Maximum Continuous Drain-Source Diode Forward Current -- -- 1.0 A Maximum Pulsed Drain-Source Diode Forward Current -- -- 3.0 A

= 0 V, IS = 1.0 A

Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge -- 0.47 -- µC

Starting TJ = 25°C

DSS,

V

GS

= 0 V, IS = 1.0 A,

V

GS

/ dt = 100 A/µs

dI

F

-- -- 1.4 V

-- 180 -- ns

(Note 4)

Rev. A, November 2001

Typical Characteristics

0

10

-1

10

V Top : 1 5 .0 V

10.0 V

8.0 V

7.0 V

6.5 V

6.0 V

5.5 V Botto m : 5.0 V

GS

SSP1N60B/SSS1N60B

0

10

150oC

, Drain Current [A]

D

I

-2

10

-1

10

0

10

"

Note s :

1. 25 0#s Pulse Test

2. T

= 25

C

1

10

VDS, Drain-Source Voltage [V]

60

50

40

],

$

[

30

DS(ON)

R

20

Drain-Source On-Resistance

10

0

0.0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7

VGS = 20V

VGS = 10V

"

Note : T

ID, Drain Current [A]

Figure 3. On-Resistance Variation vs

Drain Current and Gate Voltage

, Drain Current [A]

25oC

D

I

!

-1

10

246810

-55oC

"

Note s :

= 40V

1. V

DS

2. 25 0#s Pulse Test

VGS, Gate-Source Voltage [V]

Figure 2. Transfer CharacteristicsFigure 1. On-Region Char act er i stic s

0

10

!

150

, Reverse Drain Current [A]

DR

!

= 25

J

I

-1

10

0.2 0.4 0.6 0.8 1.0 1.2 1.4

!

25

"

Note s :

= 0V

1. V

GS

2. 25 0#s Pulse Test

VSD, Source-Drain voltage [V]

Figure 4. Body Diode Forward Voltage

Variation with Source Current

and Temperature

300

200

100

Capacitance [pF]

0

-1

10

VDS, Drain-Source Voltage [V]

C

= Cgs + Cgd (Cds = shorted)

iss

C

= Cds + C

oss

gd

C

= C

rss

gd

C

iss

C

oss

C

rss

0

10

1

"

Note s :

= 0 V

1. V

GS

2. f = 1 MHz

12

10

8

6

4

, Gate-Source Voltage [V]

GS

2

V

0

01234567

VDS = 300V

VDS = 480V

QG, Tota l G a te C h a rg e [n C ]

VDS = 120V

"

Note : I

Figure 5. Capacitance Characteristics Figure 6. Gate Charge C haracteristics

= 1.0 A

D

Typical Characteristics (Continued)

SSP1N60B/SSS1N60B

1.2

1.1

1.0

, (Normalized)

DSS

BV

0.9

Drain-Source Breakdown Voltage

0.8

-100 -50 0 50 100 150 200

"

1. V

2. I

Note s :

D

= 0 V

GS

= 250 #A

TJ, Junction Temperature [oC]

Figure 7. Breakdown Voltage Variation

vs Temperature

1

10

0

10

-1

10

, Drain Current [A]

D

I

-2

10

0

10

Operation in This Area is Limited by R

DS(on)

10 ms

DC

"

Note s :

1. T

= 25 oC

C

2. T

= 150 oC

J

3. Single Pulse

1

10

2

10

VDS, Drain-Source Voltage [V]

1 ms

100 µs

3.0

2.5

2.0

1.5

, (Normalized)

1.0

DS(ON)

R

Drain-Source On-Resistance

0.5

0.0

-100 -50 0 50 100 150 200

"

Note s :

1. V

= 10 V

GS

= 0.5 A

2. I

D

TJ, Junction Temperature [oC]

Figure 8. On-Resistance Variation

vs Temperature

1

10

0

10

-1

10

, Drain Current [A]

D

I

-2

3

10

0

10

Operation in This Area is Limited by R

DS(on)

10 ms

100 ms

DC

"

Note s :

1. T

= 25 oC

C

2. T

= 150 oC

J

3. Single Pulse

1

10

2

10

VDS, Drain-Source Voltage [V]

1 ms

100 µs

3

10

Figure 9-1. Maximum Safe O per at in g Are a

for SSP1N60B

1.0

0.8

0.6

Figure 9-2. Maximum Safe Op er at in g Are a

for SSS1N60B

0.4

, Dra in Cu rre n t [A ]

D

I

0.2

0.0 25 50 75 100 125 150

TC, Case Temperature [!]

Figure 10. Maximum Drain C urrent

vs Case Temperature

Typical Characteristics (Continued)

SSP1N60B/SSS1N60B

D=0.5

0

10

0.2

0.1

"

Notes :

1. Z

(t) = 3.67 !/W M a x.

%

JC

2. D u ty Fa c to r, D = t

3. TJM - TC = PDM * Z

1/t2

(t)

%

JC

0.05

0.02

-1

10

0.01

(t), The rmal Re s p o ns e

JC

%

Z

-2

10

-5

10

sin g le p u ls e

-4

10

-3

10

t

, Square Wave Pulse Duration [sec]

1

-2

10

P

DM

t

1

t

2

-1

10

0

10

Figure 11-1. Transient Thermal Response Curve for SS P1N60B

1

10

D=0.5

0.2

0

10

0.1

0.05

0.02

0.01

-1

10

(t), The rm al Res p o n s e

JC

%

Z

sin g le p u ls e

"

Notes :

(t) = 7.48 !/W M a x.

1. Z

%

JC

2. D u ty Fa c to r, D = t

3. TJM - TC = PDM * Z

P

DM

1/t2

(t)

%

JC

t

1

t

2

1

10

-2

10

-5

10

-4

10

-3

10

-2

10

-1

10

0

10

t1, Square Wave Pulse Duration [sec]

Figure 11-2. Transient Thermal Response Curve for SS S1N60B

1

10

12V

200nF

3mA

50K&

V

Gate Charge Test Circuit & Waveform

V

GS

300nF

Same Type

as DUT

DUT

V

DS

GS

10V

Resistive Switching Test Circuit & Waveforms

SSP1N60B/SSS1N60B

Q

g

Q

gs

Q

gd

Charge

10V

R

L

DUT

L

V

DD

V

DS

V

GS

R

G

V

DS

90%

10%

V

GS

t

d(on)tr

t

on

t

d(off)

t

f

t

off

Unclamped Inductive Switching Test Circuit & Waveforms

BV

DSS

BV

DSS-VDD

DSS

Time

V

(t)

V

(t)

DS

L

LL

V

DS

BV

DSS

V

DSS

I

AS

DD

I

IDI

D

R

G

DUT

t

p

V

DD

1

----

E

=LI

E

=LI

AS

2

--------------------

AS

ID (t)

t

p

Peak Diode Recovery dv /d t Test Circuit & Waveforms

+

DUT

I

SD

Driver

R

G

V

GS

+

V

DS

_

L

LL

Same Type

as DUT

• dv/dt controlled by R

•ISDcontroll ed by pulse period

G

SSP1N60B/SSS1N60B

V

DD

V

GS

( Driver )

I

SD

( DUT )

V

DS

( DUT )

Gate Pulse Width

--------------------------

D =

Gate Pulse Period

IFM, Body Diode Forward Current

I

RM

Body Diode Reverse Current

Body Diode Recovery dv/dt

V

SD

Body Diode

Forward Voltage Drop

di/dt

10V

V

DD

Package Dimensions

SSP1N60B/SSS1N60B

TO-220

(1.70)

9.20 ±0.2013.08 ±0.20

1.30 ±0.10

(1.46)

(1.00)

1.27 ±0.10

9.90 ±0.20 (8.70)

ø3.60 ±0.10

(3.70)(3.00)

(45°)

1.52 ±0.10

2.80 ±0.1015.90 ±0.20

18.95MAX.

4.50 ±0.20

+0.10

1.30

–0.05

2.54TYP

±0.20]

[2.54

10.00 ±0.20

0.80 ±0.10

2.54TYP

±0.20]

[2.54

10.08 ±0.30

0.50

+0.10 –0.05

2.40 ±0.20

Dimensions in Millimeters

Package Dimensions

(Continued)

10.16 ±0.20

TO-220F

ø3.18 ±0.10

2.54

SSP1N60B/SSS1N60B

±0.20

3.30 ±0.10

15.80 ±0.20

9.75 ±0.30

MAX1.47

0.80 ±0.10

(7.00)

(30°)

6.68 ±0.20

(1.00x45°)

(0.70)

0.20

15.87 ±

0.35 ±0.10

2.54TYP

[2.54

±0.20]

#1

9.40 ±0.20

2.54TYP

[2.54

±0.20]

4.70 ±0.20

0.50

+0.10 –0.05

2.76 ±0.20

Dimensions in Millimeters

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™

2

CMOS™

E EnSigna™ FACT™ FACT Quiet Series™

STAR*POWER is used under license

®

FAST FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™

OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench

®

QFET™ QS™ QT Optoelectronics™ Quiet Series™ SLIENT SWITCHER

SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TruTranslation™ TinyLogic™ UHC™

®

UltraFET

VCX™

®

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

PRODUCT STATUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or In

Design

Preliminary First Production T his dat asheet contains preliminary data, and

No Identification Needed Full Production This datasheet contains final specifications. Fairchild

Obsolete Not In Production This datasheet contains specifications on a product

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

Semiconductor reserves the right to make changes at any time without notice in order to improve design.

that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

Rev. H4

Datasheet SSP1N60B, SSS1N60B Datasheet (Fairchild Semiconductor)

Specifications and Main Features

Frequently Asked Questions

User Manual