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Elektronische Bauelemente
RoHS Compliant Product
A suffix of “-C” specifies halogen free
P-Ch Enhancement Mode Power MOSFET
DESCRIPTION
These miniature surface mount MOSFETs utilize a high cell density trench
process to provide Low R
and to ensure minimal power loss and heat
DS(on)
dissipation. Typical applications are DC-DC converters and power management
in portable and battery-powered products such as computers, printers, PCMCIA
cards, cellular and cordless telephones.
FEATURES
Low R
Low thermal impedance copper leadframe ITO-220 saves board
space.
Fast switching speed.
High performance trench technology.
provides higher efficiency and extends battery life.
DS(on)
SSRF50P04-16
50A, -40V, R
DS(ON)
16mΩ
ITO-220
B N
AM
J
CH
K
LL
D
E
G
F
PRODUCT SUMMARY
Dimensions in millimeters
SSRF50P04-16
I
V
(V) R
DS
-40
(on) (m
DS
16@V
= -10V 50
GS
28@VGS= -4.5V 38
D
(A)
REF.
Millimeter
Min. Max. Min. Max.
A 15.00 15.60 H 3.00 3.80
B 9.50 10.50 J 0.90 1.50
C 13.00 Min K 0.50 0.90
D 4.30 4.70 L 2.34 2.74
E 2.50 3.10 M 2.50 2.90
F 2.40 2.80 N
G 0.30 0.70
REF.
Drain
Gate
ABSOLUTE MAXIMUM RATINGS
(TA = 25°C unless otherwise specified)
Source
PARAMETER SYMBOL RATINGS UNIT
Drain-Source Voltage VDS -40 V
Gate-Source Voltage VGS ±20 V
Continuous Drain Current
Pulsed Drain Current
1
I
2
IDM ±100 A
@T
=25℃ 50 A
D
C
Millimete
3.1
3.4
Continuous Source Current (Diode Conduction) 1 I
Total Power Dissipation 1 P
Operating Junction and Storage Temperature Range TJ, T
-30 A
S
=25℃ 60 W
D @TC
-55 ~ 175 °C
STG
THERMAL RESISTANCE RATINGS
Maximum Thermal Resistance Junction-Ambient 1 R
Maximum Thermal Resistance Junction-Case R
50 °C / W
θJA
3.0 °C / W
θJC
Notes：
1 Package Limited.
2 Pulse width limited by maximum junction temperature.
http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually.
30-Nov-2010 Rev.A Page 1 of 2
Page 2
Elektronische Bauelemente
ELECTRICAL CHARACTERISTICS (T
P-Ch Enhancement Mode Power MOSFET
= 25°C unless otherwise specified)
A
SSRF50P04-16
50A, -40V, R
DS(ON)
16mΩ
PARAMETER
SYMBO
MIN. TYP. MAX. UNIT TEST CONDITIONS
Static
Gate-Threshold Voltage V
Gate-Body Leakage I
Zero Gate Voltage Drain Current I
On-State Drain Current 1 I
Drain-Source On-Resistance 1 R
Forward Transconductance 1 g
Diode Forward Voltage V
GS(th)
- - ±100 nA VDS = 0V, VGS= ±25V
GSS
DSS
D(on)
DS(ON)
fs
SD
Total Gate Charge Qg - 25 -
Gate-Source Charge Qgs - 5.2 -
Gate-Drain Charge Qgd - 17 -
-1 - - V VDS= V
- - -1
- - -5 VDS= -24V,VGS= 0V,TJ=55°C
-41 - - A VDS = -5V, VGS= -10V
- - 16
mΩ
- - 28 VGS= -4.5V, ID= -1 A
- 31 - S VDS= -15V, ID= -1 A
- -0.7 - V IS= -41 A, VGS= 0 V
Dynamic
2
GS, ID
VDS= -24V, VGS= 0V
μA
= -10V, ID= -1 A
V
GS
V
= -15 V
nC
DS
VGS = -4.5 V
I
= -1 A
D
= -250 μA
Turn-on Delay Time T
- 15 -
d(on)
Rise Time Tr - 44 -
Turn-off Delay Time T
- 46 -
d(off)
Fall Time Tf - 89 -
Notes
1 Pulse test：Pulse width ≦ 300 μs, duty cycle ≦ 2％.
2 Guaranteed by design, not subject to production testing.
nS
V
= -15 V
DD
ID= -41 A
= 10 V
V
GEN
R
= 15
L
RG= 6
http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually.
30-Nov-2010 Rev.A Page 2 of 2
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