1.5 W Output
Differential (BTL2) Output
Single-Supply Operation: 2.7 V to 5.5 V
Functions Down to 1.75 V
Wide Bandwidth: 4 MHz
Highly Stable, Phase Margin: >80 Degrees
Low Distortion: 0.2% THD @ 1 W Output
Excellent Power Supply Rejection
APPLICATIONS
Portable Computers
Personal Wireless Communicators
Hands-Free Telephones
Speakerphones
Intercoms
Musical Toys and Speaking Games
GENERAL DESCRIPTION
The SSM2211 is a high-performance audio amplifier that delivers
1 W RMS of low distortion audio power into a bridge-connected
8 Ω speaker load, (or 1.5 W RMS into 4 Ω load). It operates
over a wide temperature range and is specified for single-supply
voltages between 2.7 V and 5.5 V. When operating from batteries,
it will continue to operate down to 1.75 V. This makes the
SSM2211 the best choice for unregulated applications such as toys
and games. Featuring a 4 MHz bandwidth and distortion below
0.2 % THD @ 1 W, superior performance is delivered at higher
power or lower speaker load impedance than competitive units.
The low differential dc output voltage results in negligible losses
in the speaker winding, and makes high value dc blocking capacitors unnecessary. Battery life is extended by using the
Shutdown mode, which reduces quiescent current drain to
typically 100 nA.
1
Audio Power Amplifier
SSM2211
FUNCTIONAL BLOCK DIAGRAM
The SSM2211 is designed to operate over the –20°C to +85°C
temperature range. The SSM2211 is available in SO-8 and
LFCSP (Lead Frame Chip Scale Package) surface mount packages. The SO-8 features the patented Thermal Coastline lead
frame (see Figure 12). The advanced mechanical packaging of the
SSM2211 ensures lower chip temperature and enhanced performance relative to standard packaging options. DIP samples
are available; you should request a special quotation on production quantities. An evaluation board is available upon request of
your local Analog Device sales office.
Applications include personal portable computers, hands-free
telephones and transceivers, talking toys, intercom systems and
other low voltage audio systems requiring 1 W output power.
*
*Protected by U.S. Patent No. 5,519,576
NOTES
1
1.5 W @ 4 Ω, 25°C ambient, <1% THD, 5 V supply, 4 layer PCB.
2
Bridge Tied Load
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
Total Harmonic DistortionTHD + NP = 0.5 W into 8 Ω, f = 1 kHz0.15%
Total Harmonic DistortionTHD + NP = 1.0 W into 8 Ω, f = 1 kHz0.2%
Voltage Noise Densitye
Storage Temperature Range . . . . . . . . . . . . 65°C to +150°C
Operating Temperature Range . . . . . . . . . . . 20°C to +85°C
Junction Temperature Range . . . . . . . . . . . . 65°C to +165°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300°C
NOTES
1
Absolute maximum ratings apply at 25°C, unless otherwise noted.
2
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; the functional operation of
the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
For the SOIC package, θJA is measured with the device soldered to a 4-layer
printed circuit board.
2
For the LFCSP package, θJA is measured with exposed lead frame soldered to
the printed circuit board.
3
Special order only.
2
3
1
JA
JC
Units
50°C/W
10343°C/W
PIN CONFIGURATIONS
8-Lead SOIC
(SO-8)
+IN
–IN
1
2
TOP VIEW
(Not to Scale)
3
4
SHUTDOWN
BYPASS
8-Lead LFCSP
(CP-8)
+IN
–IN
1
2
TOP VIEW
(Not to Scale)
3
4
SHUTDOWN
BYPASS
8-Lead Plastic DIP
(N-8)
+IN
–IN
1
2
TOP VIEW
(Not to Scale)
3
4
SHUTDOWN
BYPASS
8
B
V
OUT
7
–V
6
+V
5
V
A
OUT
8
B
V
OUT
7
–V
6
+V
5
V
A
OUT
8
V
B
OUT
7
–V
6
+V
5
V
A
OUT
ORDERING GUIDE
TemperaturePackagePackage
ModelRangeDescriptionOptionsBrand
SSM2211CP-Reel –20°C to +85°C8-Lead LFCSP CP-8B5A
SSM2211S–20°C to +85°C8-Lead SOICSO-8
SSM2211S-Reel–20°C to +85°C8-Lead SOICSO-8
SSM2211S-Reel7 –20°C to +85°C8-Lead SOICSO-8
SSM2211P–20°C to +85°C8-Lead PDIPN-8
*Special order only.
*
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the SSM2211 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
REV. A
–3–
Page 4
SSM2211–Typical Performance Characteristics
10
TA = 25C
= 5V
V
DD
= 2 (BTL)
A
VD
= 8
R
L
= 500mW
P
L
1
CB = 0.1F
CB = 1F
THD + N – %
0.1
0.01
2010020k
C
= 0
B
FREQUENCY – Hz
1k10k
TPC 1. THD+N vs. Frequency
10
TA = 25C
= 5V
V
DD
= 2 (BTL)
A
VD
= 8
R
L
= 1W
P
L
1
CB = 0.1F
THD + N – %
0.1
CB = 1F
0.01
2010020k
CB = 0
1k10k
FREQUENCY – Hz
TPC 4. THD+N vs. Frequency
10
CB = 0
= 5V
DD
= 10 (BTL)
VD
= 8
L
= 500mW
L
CB = 0.1F
1k10k
FREQUENCY – Hz
1
CB = 1F
THD + N – %
0.1
TA = 25C
V
A
R
P
0.01
2010020k
TPC 2. THD+N vs. Frequency
10
1
CB = 1F
THD + N – %
0.1
TA = 25C
V
DD
A
VD
= 8
R
L
= 1W
P
L
0.01
2010020k
CB = 0.1F
= 5V
= 10 (BTL)
FREQUENCY – Hz
CB = 0
1k10k
TPC 5.THD+N vs. Frequency
10
CB = 0.1F
1
CB = 1F
THD + N – %
0.1
TA = 25C
= 5V
V
DD
= 20 (BTL)
A
VD
= 8
R
L
= 500mW
P
L
0.01
2010020k
FREQUENCY – Hz
1k10k
TPC 3. THD+N vs. Frequency
10
CB = 0.1F
1
CB = 1F
THD + N – %
0.1
TA = 25C
= 5V
V
DD
= 20 (BTL)
A
VD
= 8
R
L
= 1W
P
L
0.01
2010020k
FREQUENCY – Hz
1k10k
TPC 6. THD+N vs. Frequency
10
TA = 25C
= 5V
V
DD
= 2 (BTL)
A
VD
= 8
R
L
FREQUENCY = 20Hz
1
= 0.1F
C
B
THD + N – %
0.1
0.01
20n0.12
TPC 7. THD+N vs. P
P
OUTPUT
– W
OUTPUT
10
TA = 25C
= 5V
V
DD
= 2 (BTL)
A
VD
= 8
R
L
FREQUENCY = 1kHz
= 0.1F
C
1
B
THD + N – %
0.1
1
0.01
20n0.12
TPC 8. THD+N vs. P
P
OUTPUT
– W
OUTPUT
1
10
TA = 25C
= 5V
V
DD
= 2 (BTL)
A
VD
= 8
R
L
FREQUENCY = 20kHz
1
= 0.1F
C
B
THD + N –%
0.1
0.01
20n0.12
TPC 9. THD+N vs. P
P
OUTPUT
– W
OUTPUT
1
–4–
REV. A
Page 5
SSM2211
10
TA = 25C
= 3.3V
V
DD
= 2 (BTL)
A
VD
= 8
R
L
= 350mW
P
L
1
C
= 0.1F
THD + N – %
0.1
CB = 1F
0.01
2010020k
B
FREQUENCY – Hz
CB = 0
1k10k
TPC 10. THD+N vs. Frequency
10
TA = 25C
= 3.3V
V
DD
= 2 (BTL)
A
VD
= 8
R
L
FREQUENCY = 20Hz
1
= 0.1F
C
B
THD + N – %
0.1
10
1
THD + N – %
0.1
0.01
2010020k
CB = 0.1F
CB = 1F
FREQUENCY – Hz
CB = 0
TA = 25C
= 3.3V
V
DD
= 10 (BTL)
A
VD
= 8
R
L
= 350mW
P
L
1k10k
TPC 11. THD+N vs. Frequency
10
TA = 25C
= 3.3V
V
DD
= 2 (BTL)
A
VD
= 8
R
L
FREQUENCY = 1kHz
= 0.1F
C
1
B
THD + N – %
0.1
10
CB = 1F
= 3.3V
= 20 (BTL)
= 8
= 350mW
CB = 0.1F
1k10k
FREQUENCY – Hz
1
THD + N – %
0.1
TA = 25C
V
DD
A
VD
R
L
P
L
0.01
2010020k
TPC 12. THD+N vs. Frequency
10
TA = 25C
= 3.3V
V
DD
= 2 (BTL)
A
VD
= 8
R
L
FREQUENCY = 20kHz
1
= 0.1F
C
B
THD + N – %
0.1
0.01
20n0.12
TPC 13. THD+N vs. P
10
TA = 25C
= 2.7V
V
DD
= 2 (BTL)
A
VD
= 8
R
L
= 250mW
P
L
1
THD + N – %
0.1
CB = 1F
0.01
2010020k
P
OUTPUT
CB = 0.1F
FREQUENCY – Hz
– W
OUTPUT
CB = 0
1k10k
TPC 16. THD+N vs. Frequency
0.01
1
20n0.12
P
OUTPUT
– W
TPC 14. THD+N vs. P
10
CB = 0
1
THD + N – %
0.1
0.01
2010020k
CB = 0.1F
CB = 1F
1k10k
FREQUENCY – Hz
OUTPUT
TA = 25C
= 2.7V
V
DD
= 10 (BTL)
A
VD
= 8
R
L
= 250mW
P
L
1
TPC 17. THD+N vs. Frequency
0.01
20n0.12
P
OUTPUT
– W
TPC 15. THD+N vs. Frequency
10
CB = 0.1F
1
CB = 1F
THD + N – %
0.1
TA = 25C
= 2.7V
V
DD
= 20 (BTL)
A
VD
= 8
R
L
= 250mW
P
L
0.01
2010020k
FREQUENCY – Hz
1k10k
TPC 18. THD+N vs. Frequency
1
REV. A
–5–
Page 6
SSM2211–Typical Performance Characteristics
10
TA = 25C
= 2.7V
V
DD
= 2 (BTL)
A
VD
= 8
R
L
FREQUENCY = 20Hz
1
THD + N – %
0.1
0.01
20n0.12
TPC 19. THD+N vs. P
10
TA = 25C
= 5V
V
DD
= 10 SINGLE ENDED
A
VD
= 0.1F
C
B
= 1000F
C
C
1
THD + N – %
0.1
RL = 32
= 60mW
P
O
0.01
2010020k
P
– W
OUTPUT
RL = 8
= 250mW
P
O
FREQUENCY – Hz
1k10k
OUTPUT
TPC 22. THD+N vs. Frequency
10
TA = 25C
= 2.7V
V
DD
= 2 (BTL)
A
VD
R
= 8
L
FREQUENCY = 1kHz
1
THD + N – %
0.1
1
0.01
20n0.12
TPC 20. THD+N vs. P
10
TA = 25C
V
DD
A
VD
= 0.1F
C
B
= 1000F
C
C
1
THD + N – %
0.1
RL = 32
P
O
0.01
2010020k
P
OUTPUT
= 3.3V
= 10 SINGLE ENDED
RL = 8
= 85mW
P
O
= 20mW
FREQUENCY – Hz
– W
OUTPUT
1k10k
1
TPC 23. THD+N vs. Frequency
10
TA = 25C
= 2.7V
V
DD
= 2 (BTL)
A
VD
= 8
R
L
FREQUENCY = 20kHz
1
THD + N – %
0.1
0.01
20n0.12
TPC 21. THD+N vs. P
10
TA = 25C
= 2.7V
V
DD
= 10 SINGLE ENDED
A
VD
= 0.1F
C
B
= 1000F
C
C
1
THD + N – %
0.1
RL = 32
= 15mW
P
O
0.01
2010020k
P
– W
OUTPUT
RL = 8
= 65mW
P
O
FREQUENCY – Hz
1k10k
OUTPUT
TPC 24. THD+N vs. Frequency
1
10
TA = 25C
= 2 (BTL)
A
VD
= 8
R
L
FREQUENCY = 20Hz
CB = 0.1F
1
THD + N – %
0.1
0.01
20n0.12
TPC 25. THD+N vs. P
VDD = 2.7V
VDD = 3.3V
P
OUTPUT
– W
VDD = 5V
OUTPUT
10
TA = 25C
= 2 (BTL)
A
VD
= 8
R
L
FREQUENCY = 1kHz
CB = 0.1F
1
THD + N – %
0.1
1
0.01
20n0.12
TPC 26. THD+N vs. P
VDD = 2.7V
VDD = 3.3V
P
OUTPUT
– W
VDD = 5V
1
OUTPUT
10
TA = 25C
= 2 (BTL)
A
VD
= 8
R
L
FREQUENCY = 20kHz
= 0.1F
C
B
1
THD + N – %
0.1
0.01
20n0.12
P
TPC 27. THD+N vs. P
VDD = 2.7V
OUTPUT
VDD = 3.3V
– W
OUTPUT
VDD = 5V
1
–6–
REV. A
Page 7
SSM2211
1.5
SOIC JA = 98C/W
1
0.5
POWER DISSIPATION – W
0
–200100
20406080
TEMPERATURE – C
T
= 150C
J,MAX
FREE AIR
NO HEAT SINK
TPC 28. Maximum Power Dissipation
vs. Ambient Temperature
1.6
1.4
1.2
1.0
0.8
0.6
OUTPUT POWER – W
0.4
0.2
0
484812 16 20 24 28 32 36 40 44
TPC 31. P
2.7V
LOAD RESISTANCE –
vs. Load
OUTPUT
5V
3.3V
Resistance
10,000
8,000
6,000
4,000
SUPPLY CURRENT – A
2,000
0
1234
05
SHUTDOWN VOLTAGE AT PIN 1 – V
TPC 29. Supply Current vs.
Shutdown Voltage
80
60
40
20
0
GAIN – dB
–20
–40
–60
–80
1001k100M
10k 100k1M10M
FREQUENCY – Hz
TPC 32. Gain, Phase vs.
Frequency (Single Amplifier)
VDD = 5V
14
TA = 25C
12
= OPEN
R
L
10
8
6
4
SUPPLY CURRENT – mA
2
0
016
2345
SUPPLY VOLTAGE – V
TPC 30. Supply Current vs.
Supply Voltage
PHASE SHIFT – Degrees
25
VDD = 2.7V
SAMPLE SIZE = 300
20
15
10
FREQUENCY
5
0
–20 –1525
–10 –5 010 15 205
OUTPUT OFFSET VOLTAGE – mV
180
135
90
45
0
–45
–90
–135
–180
TPC 33. Output Offset Voltage
Distribution
20
VDD = 3.3V
SAMPLE SIZE = 300
16
12
8
FREQUENCY
4
0
–30–2030
–1001020
OUTPUT OFFSET VOLTAGE – mV
TPC 34. Output Offset Voltage
Distribution
20
20
VDD = 3.3V
VDD = 5.0V
SAMPLE SIZE = 300
SAMPLE SIZE = 300
16
16
12
12
8
8
FREQUENCY
4
4
0
0
–30–2030
–30–2030
–1001020
–1001020
OUTPUT OFFSET VOLTAGE – mV
OUTPUT OFFSET VOLTAGE – mV
TPC 35. Output Offset Voltage
Distribution
600
500
400
300
FREQUENCY
200
100
0
6789101112131415
SUPPLY CURRENT – mA
VDD = 5.0V
SAMPLE SIZE = 1,700
TPC 36. Supply Current Distribution
REV. A
–7–
Page 8
SSM2211
–50
TA = 25C
= 5V 100mV
V
DD
= 15 mF
C
B
= 2
A
VD
–55
–60
PSRR – dB
–65
–70
2010030k1k10k
FREQUENCY – Hz
TPC 37. PSRR vs. Frequency
PRODUCT OVERVIEW
The SSM2211 is a low distortion speaker amplifier that can run
from a 1.7 V to 5.5 V supply. It consists of a rail-to-rail input
and a differential output that can be driven within 400 mV of
either supply rail while supplying a sustained output current of
350 mA. The SSM2211 is unity-gain stable, requiring no external compensation capacitors, and can be configured for gains of
up to 40 dB. Figure 1 shows the simplified schematic.
20k
V
DD
6
20k
V
IN
0.1F
4
A1
3
50k
2
50k
SSM2211
5
50k
71
50k
A2
BIAS
CONTROL
SHUTDOWN
8
V
O1
V
O2
Figure 1. Simplified Schematic
Pin 4 and Pin 3 are the inverting and noninverting terminals to A1.
An offset voltage is provided at Pin 2, which should be connected
to Pin 3 for use in single supply applications. The output of A1
appears at Pin 5. A second op amp, A2, is configured with a fixed
gain of A
= –1 and produces an inverted replica of Pin 5 at Pin 8.
V
The SSM2211 outputs at Pins 5 and 8 produce a bridged configu-
ration output to which a speaker can be connected. This bridge
configuration offers the advantage of a more efficient power transfer from the input to the speaker. Because both outputs are symmetric, the dc bias at Pins 5 and 8 are exactly equal, resulting in
zero dc differential voltage across the outputs. This eliminates the
need for a coupling capacitor at the output.
Thermal Performance—SOIC
The SSM2211 can achieve 1 W continuous output into 8 Ω in
SOIC, even at ambient temperatures up to 85°C. This is due to a
proprietary SOIC package from Analog Devices that makes use of
an internal structure called a Thermal Coastline. The Thermal
Coastline provides a more efficient heat dissipation from the die
than in standard SOIC packages. This increase in heat dissipation
allows the device to operate in higher ambient temperatures or at
higher continuous output currents without overheating the die.
For a standard SOIC package, typical junction to ambient
temperature thermal resistance (
Coastline SOIC package,
JA
) is 158°C/W. In a Thermal
JA
is 98°C/W. Simply put, a die in a
Thermal Coastline package will not get as hot as a die in a standard SOIC package at the same current output.
Because of the large amounts of power dissipated in a speaker
amplifier, competitor’s parts operating from a 5 V supply can
only drive 1 W into 8 Ω in ambient temperatures less than
44°C, or 111°F. With the Thermal Coastline SOIC package, the
SSM2211 can drive an 8 Ω speaker with 1 W from a 5 V supply
with ambient temperatures as high as 85°C (185°F), without a
heat sink or forced air flow.
Thermal Performance—LFCSP
The addition of the LFCSP to the Analog Devices’ package
portfolio offers the SSM2211 user even greater choice when
considering thermal performance criteria. For the 8-lead 3 mm
3 mm LFCSP the
is 50°C/W. This is a significant perfor-
JA
mance improvement over most other packaging options and even
betters the thermal performance of the SOIC with Thermal
Coastline lead frame.
–8–
REV. A
Page 9
SSM2211
TYPICAL APPLICATION
R
F
5V
C
S
AUDIO
INPUT
C
C
R
I
4
–
SSM2211
3
+
2
C
B
6
5
8
1
7
–
+
SPEAKER
8V
Figure 2. Typical Configuration
Figure 2 shows how the SSM2211 would be connected in a
typical application. The SSM2211 can be configured for gain
much like a standard op amp. The gain from the audio input to
the speaker is:
R
=×2
F
R
I
(1)
A
V
The 2 factor comes from the fact that Pin 8 is opposite polarity from Pin 5, providing twice the voltage swing to the speaker
from the bridged output configuration.
is a supply bypass capacitor to provide power supply filter-
C
S
ing. Pin 2 is connected to Pin 3 to provide an offset voltage for
single supply use, with C
providing a low AC impedance to
B
ground to help power supply rejection. Because Pin 4 is a virtual
AC ground, the input impedance is equal to R
. CC is the input
I
coupling capacitor which also creates a high-pass filter with a
corner frequency of:
=
2
1
π
RC
×
IC
(2)
f
HP
Because the SSM2211 has an excellent phase margin, a feedback capacitor in parallel with R
to band-limit the amplifier is
F
not required, as it is in some competitor’s products.
Bridged Output vs. Single Ended Output Configurations
The power delivered to a load with a sinusoidal signal can be expressed in terms of the signal’s peak voltage and the resistance
of the load:
P
L
2
V
PK
=
R
2
L
(3)
By driving a load from a bridged output configuration, the voltage swing across the load doubles. An advantage in using a
bridged output configuration becomes apparent from Equation
3 as doubling the peak voltage results in four times the power
delivered to the load. In a typical application operating from a
5 V supply, the maximum power that can be delivered by the
SSM2211 to an 8 Ω speaker in a single ended configuration is
250 mW. By driving this speaker with a bridged output, 1 W of
power can be delivered. This translates to a 12 dB increase in
sound pressure level from the speaker.
Driving a speaker differentially from a bridged output offers another advantage in that it eliminates the need for an output coupling capacitor to the load. In a single supply application, the
quiescent voltage at the output is half of the supply voltage. If a
speaker were connected in a single ended configuration, a coupling capacitor would be needed to prevent dc current from
flowing through the speaker. This capacitor would also need to
be large enough to prevent low frequency roll-off. The corner
frequency is given by:
f
dB
−=3
Where R
1
2
π
RC
LC
is the speaker resistance and CC is the coupling
L
(4)
capacitance
For an 8 Ω speaker and a corner frequency of 20 Hz, a 1000 µF
capacitor would be needed, which is quite physically large
and costly. By connecting a speaker in a bridged output configuration, the quiescent differential voltage across the speaker becomes
nearly zero, eliminating the need for the coupling capacitor.
Speaker Efficiency and Loudness
The effective loudness of 1 W of power delivered into an 8 Ω
speaker is a function of the efficiency of the speaker. The efficiency of a speaker is typically rated as the sound pressure level
(SPL) at 1 meter in front of the speaker with 1 W of power
applied to the speaker. Most speakers are between 85 dB and
95 dB SPL at 1 meter at 1 W. Table I shows a comparison of
the relative loudness of different sounds.
Table I. Typical Sound Pressure Levels
Source of SounddB SPL
Threshold of Pain120
Heavy Street Traffic95
Cabin of Jet Aircraft80
Average Conversation65
Average Home at Night50
Quiet Recording Studio30
Threshold of Hearing0
It can easily be seen that 1 W of power into a speaker can produce quite a bit of acoustic energy.
Power Dissipation
Another important advantage in using a bridged output configuration is the fact that bridged output amplifiers are more efficient than single ended amplifiers in delivering power to a load.
Efficiency is defined as the ratio of power from the power supply
to the power delivered to the load:
η
P
L
=
P
SY
An amplifier with a higher efficiency has less internal power dissipation, which results in a lower die-to-case junction tempera-
REV. A
–9–
Page 10
SSM2211
ture, as compared to an amplifier that is less efficient. This is
important when considering the amplifier device’s maximum
power dissipation rating versus ambient temperature. An internal power dissipation versus output power equation can be derived to fully understand this.
The internal power dissipation of the amplifier is the internal
voltage drop multiplied by the average value of the supply current. An easier way to find internal power dissipation is to take
the difference between the power delivered by the supply voltage
source and the power delivered into the load. The waveform of
the supply current for a bridged output amplifier is shown in
Figure 3.
V
OUT
V
PEAK
TIME
T
I
SY
I
DD, PEAK
I
DD, AVG
T
TIME
Figure 3. Bridged Amplifier Output Voltage and Supply
Current vs. Time
By integrating the supply current over a period T, then dividing
the result by T, I
can be found. Expressed in terms of
DD,AVG
peak output voltage and load resistance:
V
=2
I
DD AVG
,
therefore power delivered by the supply, neglecting the bias cur-
π
PEAK
R
L
(5)
rent for the device is:
VV
2
P
DD PEAK
=
SY
R
π
L
(6)
Now, the power dissipated by the amplifier internally is simply
the difference between Equation 6 and Equation 3. The equation for internal power dissipated, P
, expressed in terms of
DISS
power delivered to the load and load resistance is:
V
×
DISS
=
22
P
DD
PP
−
R
π
LL
L
(7)
The graph of this equation is shown in Figure 4.
1.5
VDD = 5V
RL = 4
1.0
0.5
POWER DISSIPATION – W
RL = 16
0
01.5
0.51.0
OUTPUT POWER – W
RL = 8
Figure 4. Power Dissipation vs. Output Power
with V
DD
=5V
Because the efficiency of a bridged output amplifier (Equation 3
divided by Equation 6) increases with the square root of P
, the
L
power dissipated internally by the device stays relatively flat, and
will actually decrease with higher output power. The maximum
power dissipation of the device can be found by differentiating
Equation 7 with respect to load power, and setting the derivative
equal to zero. This yields:
−
DD
1
2
P
−=
10
L
(8)
∂
P
DISS
∂π
P
L
×
V
2
=
R
L
And this occurs when:
2
V
=2
P
DISS MAX
,
DD
2
R
π
L
(9)
Using Equation 9 and the power derating curve in TPC 28, the
maximum ambient temperature can be easily found. This insures that the SSM2211 will not exceed its maximum junction
temperature of 150°C.
The power dissipation for a single ended output application
where the load is capacitively coupled is given by:
DISS
=
22
∂
P
DD
PP
−
π
R
LL
L
(10)
V
×
The graph of Equation 10 is shown in Figure 5.
–10–
REV. A
Page 11
SSM2211
0.35
0.30
0.25
0.20
0.15
0.10
POWER DISSIPATION – W
0.05
0
00.40.1
VDD = 5V
RL = 16
0.20.3
OUTPUT POWER – W
RL = 4
RL = 8
Figure 5. Power Dissipation vs. Single Ended Output
Power with (V
DD
= 5 V)
The maximum power dissipation for a single ended output is:
2
V
P
DISS MAX
,
DD
=
2
R
2
π
L
(11)
Output Voltage Headroom
The outputs of both amplifiers in the SSM2211 can come to
within 400 mV of either supply rail while driving an 8 Ω load.
As compared to other competitors’ equivalent products, the
SSM2211 has a higher output voltage headroom. This means
that the SSM2211 can deliver an equivalent maximum output
power while running from a lower supply voltage. By running at
a lower supply voltage, the internal power dissipation of the device is reduced, as can be seen from Equation 9. This extended
output headroom, along with the Thermal Coastline package,
allows the SSM2211 to operate in higher ambient temperatures
than other competitors’ devices.
The SSM2211 is also capable of providing amplification even at
supply voltages as low as 1.7 V. The maximum power available
at the output is a function of the supply voltage. Therefore, as
the supply voltage decreases, so does the maximum power output from the device. Figure 6 shows the maximum output power
versus supply voltage at various bridged-tied load resistances.
The maximum output power is defined as the point at which the
output has 1% THD.
1.6
1.4
1.2
1.0
0.8
@ 1% THD – W
OUT
0.6
MAX P
0.4
0.2
0
1.55.02.0
2.53.03.54.04.5
SUPPLY VOLTAGE – V
Figure 6. Maximum Output Power vs. V
RL = 4
R
= 8
L
RL = 16
SY
To find the minimum supply voltage needed to achieve a specified maximum undistorted output power, simply use Figure 6.
For example, an application requires only 500 mW to be output
for an 8 Ω speaker. With the speaker connected in a bridged output configuration, the minimum supply voltage required is 3.3 V.
Shutdown Feature
The SSM2211 can be put into a low power consumption shutdown mode by connecting Pin 1 to 5 V. In shutdown mode, the
SSM2211 has an extremely low supply current of less than 10 nA.
This makes the SSM2211 ideal for battery powered applications.
Pin 1 should be connected to ground for normal operation.
Connecting Pin 1 to V
will mute the outputs and put the
DD
SSM2211 into shutdown mode. A pull-up or pull-down resistor is
not required. Pin 1 should always be connected to a fixed potential, either V
or ground, and never be left floating. Leaving
DD
Pin 1 unconnected could produce unpredictable results.
Automatic Shutdown Sensing Circuit
Figure 7 shows a circuit that can be used to automatically take
the SSM2211 in and out of shutdown mode. This circuit can be
set to turn the SSM2211 on when an input signal of a certain
amplitude is detected. The circuit will also put the SSM2211
into its low-power shutdown mode once an input signal is not
sensed within a certain amount of time. This can be useful in a
variety of portable radio applications where power conservation
is critical.
R8
V
DD
R5
C2
V
IN
R6
DD
V
R1R3
NOTE
ADDITIONAL PINS OMITTED FOR CLARITY
–
OP181
+
R2
A2
R7
V
DD
R4
D1
C1
4
SSM2211
18
5
A1
Figure 7. Automatic Shutdown Circuit
The input signal to the SSM2211 is also connected to the
non-inverting terminal of A2. R1, R2, and R3 set the threshold
voltage of when the SSM2211 will be taken out of shutdown mode.
D1 half-wave rectifies the output of A2, discharging C1 to ground
when an input signal greater than the set threshold voltage is
detected. R4 controls the charge time of C1, which sets the time
until the SSM2211 is put back into shutdown mode after the
input signal is no longer detected.
R5 and R6 are used to establish a voltage reference point equal
to half of the supply voltage. R7 and R8 set the gain of the
SSM2211. D1 should be a 1N914 or equivalent diode and A2
should be a rail-to-rail output amplifier, such as an OP181 or
equivalent. This will ensure that C1 will discharge sufficiently to
bring the SSM2211 out of shutdown mode.
REV. A
–11–
Page 12
SSM2211
To find the appropriate component values, first the gain of A2
must be determined by:
V
A
VMIN
,
Where, V
V
is the threshold voltage.
THS
A
should be set to a minimum of 2 for the circuit to work prop-
V
SY
=
V
THS
is the single supply voltage and
SY
(12)
erly. Next choose R1 and set R2 to:
RR
211
=−
2
A
V
(13)
Find R3 as:
R
3
12
+
RR
12
−
A
1=
()
V
(14)
×
RR
C1 can be arbitrarily set but should be small enough to not cause
A2 to become capacitively overloaded. R4 and C1 will control the
shutdown rate. To prevent intermittent shutdown with low
frequency input signals, the minimum time constant should be:
RC
41
×≥
Where, f
Shutdown Circuit Design Example
10
f
LOW
is the lowest input frequency expected.
LOW
(15)
In this example a portable radio application requires the
SSM2211 to be turned on when an input signal greater than
50 mV is detected. The device should return to shutdown mode
within 500 ms after the input signal is no longer detected. The
lowest frequency of interest is 200 Hz, and a 5 V supply is
being used.
The minimum gain of the shutdown circuit from Equation 12 is
A
= 100. R1 is set to 100 kΩ, and using Equation 13 and
V
Equation 14, R2 = 98 kΩ and R3 = 4.9 MΩ. C1 is set to
0.01 µF, and based on Equation 15, R4 is set to 10 MΩ. To
minimize power supply current, R5 and R6 are set to 10 MΩ.
The above procedure will provide an adequate starting point for
the shutdown circuit. Some component values may need to be
adjusted empirically to optimize performance.
Turn On Popping Noise
During power-up or release from shutdown mode, the midrail
bypass capacitor, C
, determines the rate at which the
B
SSM2211 starts up. By adjusting the charging time constant of
, the start-up pop noise can be pushed into the sub-audible
C
B
range, greatly reducing startup popping noise. On power-up, the
midrail bypass capacitor is charged through an effective resistance of 25 kΩ. To minimize start-up popping, the charging
time constant for C
constant for the input coupling capacitor, C
CkCR
×Ω>25
BCI
For an application where R1 = 10 kΩ and C
midrail bypass capacitor, C
should be greater than the charging time
B
.
C
(16)
= 0.22 µF, the
, should be at least 0.1 µF to mini-
B
C
mize start-up popping noise.
SSM2211 Amplifier Design Example
Given:
Maximum Output Power1 W
Input Impedance20 kΩ
Load Impedance8 Ω
Input Level1 V rms
Bandwidth20 Hz – 20 kHz ± 0.25 dB
The configuration shown in Figure 2 will be used. The first
thing to determine is the minimum supply rail necessary to obtain the specified maximum output power. From Figure 6, for
1 W of output power into an 8 Ω load, the supply voltage must
be at least 4.6 V. A supply rail of 5 V can be easily obtained
from a voltage reference. The extra supply voltage will also allow the SSM2211 to reproduce peaks in excess of 1 W without
clipping the signal. With V
= 5 V and RL=8Ω, Equation 9
DD
shows that the maximum power dissipation for the SSM2211 is
633 mW. From the power derating curve in TPC 28, the ambient temperature must be less than 85°C.
The required gain of the amplifier can be determined from
Equation 17:
PR
A
LL
==
V
V
,
IN rms
From Equation 1,
.28
RRA
FV
=
12
, or
RR
=×141.
F
. Since the
(17)
desired input impedance is 20 kΩ, R1=20kΩ and R2 = 28 kΩ.
The final design step is to select the input capacitor. Because
adding an input capacitor, C
, high pass filter, the corner frequency
C
needs to be far enough away for the design to meet the bandwidth
criteria. For a 1st order filter to achieve a passband response
within 0.25 dB, the corner frequency should be at least 4.14 times
away from the passband frequency. So, (4.14 f
) < 20 Hz.
HP
Using Equation 2, the minimum size of input capacitor can be found:
C
>
C
220
π
> 1.65 µF. Using a 2.2 µF is a practical choice for CC.
So C
C
1
20
414
.
Hz
()
k
Ω
(18)
The gain-bandwidth product for each internal amplifier in the
SSM2211 is 4 MHz. Because 4 MHz is much greater than
4.14 20 kHz, the design will meet the upper frequency bandwidth criteria. The SSM2211 could also be configured for higher
differential gains without running into bandwidth limitations.
Equation 16 shows an appropriate value for C
to reduce start-
B
up popping noise:
()
C
>
B
Selecting C
2220
.
µ
25
to be 2.2 µF for a practical value of capacitor will
B
Ω
Fk
()
k
Ω
=µ
176
.
F
(19)
minimize start-up popping noise.
–12–
REV. A
Page 13
SSM2211
To summarize the final design:
V
DD
5V
R120 kΩ
R
F
C
C
C
B
Max. T
A
28 kΩ
2.2 µF
2.2 µF
85°C
Single Ended Applications
There are applications where driving a speaker differentially is
not practical. An example would be a pair of stereo speakers
where the minus terminal of both speakers is connected to
ground. Figure 8 shows how this can be accomplished.
10k
5V
AUDIO
INPUT
10k
0.47F
0.1F
4
–
SSM2211
3
+
2
6
5
8
1
7
470F
+
–
250mW
SPEAKER
(8)
Figure 8. A Single Ended Output Application
It is not necessary to connect a dummy load to the unused output
to help stabilize the output. The 470 µF coupling capacitor cre-
ates a high pass frequency cutoff as given in Equation 4 of 42 Hz,
which is acceptable for most computer speaker applications.
The overall gain for a single ended output configuration is
A
= RF/R1, which for this example is equal to 1.
V
Driving Two Speakers Single Endedly
It is possible to drive two speakers single endedly with both outputs of the SSM2211.
20k
5V
470F
–
AUDIO
INPUT
1F
20k
0.1F
4
–
SSM2211
3
+
2
6
5
8
1
7
470F
+
+
–
LEFT
SPEAKER
(8)
RIGHT
SPEAKER
(8)
Figure 9. SSM2211 Used as a Dual Speaker Amplifier
Each speaker is driven by a single ended output. The trade-off is
that only 250 mW sustained power can be put into each
speaker. Also, a coupling capacitor must be connected in series
with each of the speakers to prevent large DC currents from
flowing through the 8 Ω speakers. These coupling capacitors
will produce a high pass filter with a corner frequency given by
Equation 4. For a speaker load of 8 Ω and a coupling capacitor
of 470 µF, this results in a –3 dB frequency of 42 Hz.
Because the power of a single ended output is one quarter that of a
bridged output, both speakers together would still be half as loud
(–6 dB SPL) as a single speaker driven with a bridged output.
The polarity of the speakers is important, as each output is 180°
out of phase with the other. By connecting the minus terminal
of Speaker 1 to Pin 5, and the plus terminal of Speaker 2 to
Pin 8, proper speaker phase can be established.
The maximum power dissipation of the device can be found by
doubling Equation 11, assuming both loads are equal. If the
loads are different, use Equation 11 to find the power dissipation caused by each load, then take the sum to find the total
power dissipated by the SSM2211.
Evaluation Board
An evaluation board for the SSM2211 is available. Contact your
local sales representative or call 1-800-ANALOGD for more information.
1
2
SSM2211
3
4
20k
0.1F
V+
+
C
C
2
10F
6
8
5
7
R
F
C
1
1
0.1F
V
R
L
1W 8
02
V
01
J1
J2
AUDIO
INPUT
VOLUME
20k POT.
SHUTDOWN
ON
CW
C
1F
R1
51k
+
R
IN
IN
20k
Figure 10. Evaluation Board Schematic
The voltage gain of the SSM2211 is given by Equation 20 below:
R
A
=×2
V
F
R
IN
(20)
If desired, the input signal may be attenuated by turning the
10 kΩ potentiometer in the CW direction. C
isolates the input
IN
common mode voltage (V+/2) present at Pin 2 and 3. With
V+=5V, there is 2.5 V common-mode voltage present at both
output terminals V
and VO2 as well.
O1
CAUTION: The ground lead of the oscilloscope probe, or any
other instrument used to measure the output signal, must not be
connected to either output, as this would short out one of the
amplifier’s outputs and possibly damage the device.
A safe method of displaying the differential output signal using a
grounded scope is shown in Figure 11. Simply connect the Channel A probe to V
V
post, invert Channel B and add the two channels together.
O1
terminal post, connect the Channel B probe to
O2
Most multichannel oscilloscopes have this feature built in. If you
must connect the ground lead of the test instrument to either output signal pins, a power line isolation transformer must be used to
isolate the instrument ground from power supply ground.
REV. A
–13–
Page 14
SSM2211
Recall that
V = 2.8 V
VPR=×
rms, or 8 V p-p. If the available input signal is 1.4 V
rms or more, use the board as is, with R
gain is needed, increase the value of R
, so for PO= 1 W and RL=8Ω,
=20kΩ. If more
F=RI
to obtain the desired gain.
F
When you have determined the closed-loop gain required by
your source level, and can develop 1 W across the 8 Ω load resistor with the normal input signal level, replace the resistor
with your speaker. Your speaker may be connected across the
V
and VO2 posts for bridged mode operation only after the
O1
8 Ω load resistor is removed. For no phase inversion, V
O2
should be connected to the (+) terminal of the speaker.
V
SSM2211
5
2.5V
COMMON
MODE
8
8
1W
O2
GND
V
O1
PROBES
CH A
CH B
CH B
INV. ON
OSCILLOSCOPE
DISPLAY
A+B
Figure 11. Using an Oscilloscope to Display the Bridged
Output Voltage
To use the SSM2211 in a single ended output configuration,
replace J1 and J2 jumpers with electrolytic capacitors of a suitable value, with the NEGATIVE terminals to the output terminals V
and VO2. The single ended loads may then be returned
O1
to ground. Note that the maximum output power is reduced to
250 mW, one quarter of the rated maximum, due to the maximum swing in the non-bridged mode being one-half, and power
being proportional to the square of the voltage. For frequency
response down 3 dB at 100 Hz, a 200 µF capacitor is required
with 8 Ω speakers.
The SSM2211 evaluation board also comes with a SHUTDOWN switch which allows the user to switch between ON
(normal operation) and the power conserving shutdown mode.
Printed Circuit Board Layout Consideration—SOIC
All surface mount packages rely on the traces of the PC board
to conduct heat away from the package.
In standard packages, the dominant component of the heat resistance path is the plastic between the die attach pad and the
individual leads. In typical thermally enhanced packages, one or
more of the leads are fused to the die attach pad, significantly
decreasing this component. To make the improvement meaningful, however, a significant copper area on the PCB must be
attached to these fused pins.
The patented Thermal Coastline lead frame design used in the
SSM2211 (Figure 12) uniformly minimizes the value of the
dominant portion of the thermal resistance. It ensures that heat
is conducted away by all pins of the package. This yields a very
low, 98°C/W, thermal resistance for an SO-8 package, without
any special board layer requirements, relying on the normal
traces connected to the leads. The thermal resistance can be decreased by approximately an additional 10% by attaching a few
square cm of copper area to the ground pins. It is recommended
that the solder mask and/or silk screen on the PCB traces adjacent to the SSM2211 pins be deleted, thus reducing further the
junction to ambient thermal resistance of the package.
COPPER
LEAD-FRAME
1
2
COPPER PADDLE
3
4
8
7
6
5
Figure 12. Thermal Coastline
Printed Circuit Board Layout Consideration—LFCSP
The LFCSP is a plastic encapsulated package with a copper
leadframe substrate. This is a leadless package with solder lands
on the bottom surface of the package instead of conventional
formed perimeter leads. A key feature that allows the user to
reach the quoted
performance is the exposed die attach
JA
paddle (DAP) on the bottom surface of the package. When
soldered to the PCB, the DAP can provide efficient conduction
of heat from the die to the PCB. For the user to achieve optimum
package performance, consideration should be given to the PCB
pad design for both the solder lands and the DAP. For further
information the user is directed to the Amkor Technology document: “Application Notes for Surface Mount Assembly of
Amkor’s MicroLeadFrame (MLF) Packages.” This can be
downloaded from the Amkor Technology website,
www.amkor.com, as a product application note.