1.5 W output
Differential (BTL2) output
Single-supply operation: 2.7 V to 5.5 V
Functions down to 1.75 V
Wide bandwidth: 4 MHz
Highly stable, phase margin: >80 degrees
Low distortion: 0.2% THD @ 1 W output
Excellent power-supply rejection
APPLICATIONS
Portable computers
Personal wireless communicators
Hands-free telephones
Speaker phones
Intercoms
Musical toys and talking games
GENERAL DESCRIPTION
The SSM22113 is a high performance audio amplifier that
delivers 1 W rms of low distortion audio power into a bridgeconnected 8 Ω speaker load (or 1.5 W rms into 4 Ω load). It
operates over a wide temperature range and is specified for
single-supply voltages between 2.7 V and 5.5 V. When operating from batteries, it continues to operate down to 1.75 V.
This makes the SSM2211 the best choice for unregulated
applications, such as toys and games. Featuring a 4 MHz
bandwidth and distortion below 0.2% THD @ 1 W, superior
performance is delivered at higher power or lower speaker
load impedance than competitive units.
The low differential dc output voltage results in negligible
losses in the speaker winding, and makes high value dc
blocking capacitors unnecessary. Battery life is extended by
using shutdown mode, which typically reduces quiescent
current drain to 100 nA.
1
Audio Power Amplifier
SSM2211
FUNCTIONAL BLOCK DIAGRAM
IN–
IN+
BYPASS
SHUTDOWN
BIAS
SSM2211
V– (GND)
Figure 1.
The SSM2211 is designed to operate over the −20°C to +85°C
temperature range. The SSM2211 is available in SOIC-8 and
LFCSP (lead frame chip scale) surface mount packages. The
advanced mechanical packaging of the SSM2211CP ensures
lower chip temperature and enhanced performance relative to
standard packaging options.
Applications include personal portable computers, hands-free
telephones and transceivers, talking toys, intercom systems, and
other low voltage audio systems requiring 1 W output power.
1
1.5 W @ 4 Ω 25°C ambient, < 1% THD, 5 V supply, 4-layer PCB.
2
Bridge-tied load.
3
Protected by U.S. Patent No. 5,519,576.
V
A
OUT
V
B
OUT
00358-001
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
Differential Output Offset Voltage V
Output Impedance Z
SHUTDOWN CONTROL
Input Voltage High VIH ISY = < 100 mA 3.0 V
Input Voltage Low VIL ISY = normal 1.3 V
POWER SUPPLY
Power-Supply Rejection Ratio PSRR VS = 4.75 V to 5.25 V 66 dB
Supply Current ISY VO1 = VO2 = 2.5 V 9.5 mA
Supply Current, Shutdown Mode ISD Pin 1 = VDD; see Figure 32 100 nA
DYNAMIC PERFORMANCE
Gain Bandwidth GBP 4 MHz
Phase Margin Ø0 86 Degrees
AUDIO PERFORMANCE
Total Harmonic Distortion THD + N
Total Harmonic Distortion THD + N
GENERAL CHARACTERISTICS
Differential Output Offset Voltage V
Output Impedance Z
AVD = 2 5 50 mV
OOS
0.1
OUT
Ω
SHUTDOWN INPUT
Input Voltage High VIH ISY = < 100 µA 1.7 V
Input Voltage Low VIL 1 V
POWER SUPPLY
Supply Current ISY VO1 = VO2 = 1.65 V 5.2 mA
Supply Current, Shutdown Mode ISD Pin 1 = VDD; see Figure 32 100 nA
AUDIO PERFORMANCE
Total Harmonic Distortion THD + N
Differential Output Offset Voltage V
Output Impedance Z
AVD = 2 5 50 mV
OOS
0.1
OUT
Ω
SHUTDOWN CONTROL
Input Voltage High VIH ISY = < 100 mA 1.5 V
Input Voltage Low VIL ISY = normal 0.8 V
POWER SUPPLY
Supply Current ISY VO1 = VO2 = 1.35 V 4.2 mA
Supply Current, Shutdown Mode ISD Pin 1 = VDD; see Figure 32 100 nA
AUDIO PERFORMANCE
Total Harmonic Distortion THD + N
P = 0.25 W into 8 Ω, f = 1 kHz
0.1 %
Rev. C | Page 3 of 20
Page 4
SSM2211
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings apply at 25°C, unless otherwise
noted.
Table 4.
Parameter Value
Supply Voltage 6 V
Input Voltage V
Common-Mode Input Voltage V
DD
DD
ESD Susceptibility 2000 V
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −20°C to +85°C
Junction Temperature Range −65°C to +165°C
Lead Temperature Range (Soldering, 60 sec) 300°C
Table 5.
Package Type
8-Lead LFCSP (CP)
8-Lead SOIC (S)
2
θ
JA
1
50 °C/W
121 °C/W
Units
1
For the LFCSP, θJA is measured with exposed lead frame soldered to the
printed circuit board.
2
For the SOIC, θJA is measured with the device soldered to a 4-layer printed
circuit board.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; the functional operation of the device at these or
any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may
affect device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. C | Page 4 of 20
Page 5
SSM2211
PIN CONFIGURATIONS
SHUTDOWN
BYPASS
IN+
IN–
1
2
TOP VIEW
(Not to Scale)
3
4
Figure 2. 8-Lead SOIC (SO-8)
IN+
IN–
1
2
TOP VIEW
(Not to Scale)
3
4
B
A
00358-002
SHUTDOWN
BYPASS
8
V
OUT
7
V–
V+
6
V
5
OUT
Figure 3. 8-Lead LFCSP (CP-8)
8
V
B
OUT
7
V–
6
V+
5
V
A
OUT
00358-003
Rev. C | Page 5 of 20
Page 6
SSM2211
TYPICAL PERFORMANCE CHARACTERISTICS
10
TA = 25°C
= 5V
V
DD
A
= 2 (BTL)
VD
= 8Ω
R
L
P
= 500mW
L
1
CB = 0
10
1
TA = 25°C
= 5V
V
DD
A
= 2 (BTL)
VD
R
= 8Ω
L
= 1W
P
L
CB = 0
CB = 0.1µF
THD + N (%)
CB = 1µF
0.1
0.01
2010020k
FREQUENCY (Hz)
1k10k
Figure 4. THD + N vs. Fre quency
10
CB = 0
1
CB = 1µF
THD + N (%)
0.1
TA = 25°C
V
= 5V
DD
= 10 (BTL)
A
VD
R
= 8Ω
L
P
= 500mW
L
0.01
2010020k
CB = 0.1µF
1k10k
FREQUENCY (Hz)
Figure 5. THD + N vs. Fre quency
10
00358-004
00358-005
CB = 0.1µF
THD + N (%)
0.1
CB = 1µF
0.01
2010020k
FREQUENCY (Hz)
1k10k
Figure 7. THD + N vs. Fre quency
10
CB = 0
1
THD + N (%)
CB = 1µF
0.1
TA = 25°C
= 5V
V
DD
AVD = 10 (BTL)
R
= 8Ω
L
= 1W
P
L
0.01
2010020k
CB = 0.1µF
1k10k
FREQUENCY (Hz)
Figure 8. THD + N vs. Fre quency
10
00358-007
00358-008
CB = 0.1µF
1
CB = 1µF
THD + N (%)
0.1
TA = 25°C
V
= 5V
DD
= 20 (BTL)
A
VD
= 8Ω
R
L
P
= 500mW
L
0.01
2010020k
FREQUENCY (Hz)
1k10k
Figure 6. THD + N vs. Fre quency
00358-006
Rev. C | Page 6 of 20
CB = 0.1µF
1
CB = 1µF
THD + N (%)
0.1
TA = 25°C
= 5V
V
DD
= 20 (BTL)
A
VD
R
= 8Ω
L
= 1W
P
L
0.01
2010020k
FREQUENCY (Hz)
1k10k
Figure 9. THD + N vs. Fre quency
00358-009
Page 7
SSM2211
10
TA = 25°C
= 5V
V
DD
= 2 (BTL)
A
VD
= 8Ω
R
L
FREQUENCY = 20Hz
= 0.1µF
C
B
1
10
1
TA = 25°C
= 3.3V
V
DD
= 2 (BTL)
A
VD
= 8Ω
R
L
P
= 350mW
L
CB = 0
THD + N (%)
0.1
0.01
20n0.12
10
TA = 25°C
= 5V
V
DD
= 2 (BTL)
A
VD
= 8Ω
R
L
FREQUENCY = 1kHz
= 0.1µF
C
B
P
(W)
OUTPUT
Figure 10. THD + N vs. P
OUTPUT
1
THD + N (%)
0.1
0.01
20n0.12
10
TA = 25°C
V
= 5V
DD
= 2 (BTL)
A
VD
R
= 8Ω
L
FREQUENCY = 20kHz
= 0.1µF
C
B
P
(W)
OUTPUT
Figure 11. THD + N vs. P
OUTPUT
1
THD + N (%)
CB = 0.1µF
0.1
CB = 1µF
1
00358-010
0.01
2010020k
1k10k
FREQUENCY (Hz)
00358-013
Figure 13. THD + N vs. Frequency
10
CB = 0
1
THD + N (%)
1
00358-011
CB = 1µF
0.1
0.01
2010020k
CB = 0.1µF
TA = 25°C
V
DD
A
VD
= 8Ω
R
L
= 350mW
P
L
1k10k
FREQUENCY (Hz)
= 3.3V
= 10 (BTL)
00358-014
Figure 14. THD + N vs. Frequency
10
1
CB = 0.1µF
THD + N (%)
0.1
0.01
20n0.12
P
(W)
OUTPUT
Figure 12. THD + N vs. P
OUTPUT
CB = 1µF
THD + N (%)
0.1
TA = 25°C
= 3.3V
V
DD
= 20 (BTL)
A
VD
= 8Ω
R
L
= 350mW
P
L
1
00358-012
0.01
2010020k
1k10k
FREQUENCY (Hz)
00358-015
Figure 15. THD + N vs. Frequency
Rev. C | Page 7 of 20
Page 8
SSM2211
10
TA = 25°C
= 3.3V
V
DD
= 2 (BTL)
A
VD
R
= 8Ω
L
FREQUENCY = 20Hz
= 0.1µF
C
B
1
THD + N (%)
0.1
10
1
THD + N (%)
0.1
TA = 25°C
= 2.7V
V
DD
A
= 2 (BTL)
VD
= 8Ω
R
L
= 250mW
P
L
CB = 1µF
CB = 0
CB = 0.1µF
0.01
20n0.12
10
TA = 25°C
= 3.3V
V
DD
= 2 (BTL)
A
VD
R
= 8Ω
L
FREQUENCY = 1kHz
= 0.1µF
C
B
P
(W)
OUTPUT
Figure 16. THD + N vs. P
OUTPUT
1
THD + N (%)
0.1
0.01
20n0.12
10
TA = 25°C
= 3.3V
V
DD
= 2 (BTL)
A
VD
R
= 8Ω
L
FREQUENCY = 20kHz
= 0.1µF
C
B
P
(W)
OUTPUT
Figure 17. THD + N vs. P
OUTPUT
1
1
00358-016
0.01
2010020k
1k10k
FREQUENCY (Hz)
00358-019
Figure 19. THD + N vs. Frequency
10
CB = 0
CB = 0.1µF
1
THD + N (%)
0.1
1
00358-017
0.01
2010020k
CB = 1µF
FREQUENCY (Hz)
1k10k
TA = 25°C
V
= 2.7V
DD
= 10 (BTL)
A
VD
= 8Ω
R
L
= 250mW
P
L
00358-020
Figure 20. THD + N vs. Frequency
10
CB = 0.1µF
1
THD + N (%)
0.1
0.01
20n0.12
P
OUTPUT
(W)
Figure 18. THD + N vs. Frequency
THD + N (%)
0.1
1
00358-018
0.01
CB = 1µF
TA = 25°C
V
= 2.7V
DD
= 20 (BTL)
A
VD
= 8Ω
R
L
= 250mW
P
L
2010020k
1k10k
FREQUENCY (Hz)
00358-021
Figure 21. THD + N vs. Frequency
Rev. C | Page 8 of 20
Page 9
SSM2211
10
TA = 25°C
V
= 2.7V
DD
A
= 2 (BTL)
VD
R
= 8Ω
L
FREQUENCY = 20Hz
1
THD + N (%)
0.1
0.01
20n0.12
10
TA = 25°C
V
= 2.7V
DD
A
= 2 (BTL)
VD
R
= 8Ω
L
FREQUENCY = 1kHz
P
(W)
OUTPUT
Figure 22. THD + N vs. P
OUTPUT
1
1
00358-022
10
TA = 25°C
V
= 5V
DD
A
= 10 SINGLE ENDED
VD
C
= 0.1µF
B
C
= 1000µF
C
1
RL = 8Ω
P
= 250mW
THD + N (%)
O
0.1
RL = 32Ω
P
= 60mW
O
0.01
2010020k
1k10k
FREQUENCY (Hz)
Figure 25. THD + N vs. Frequency
10
TA = 25°C
V
= 3.3V
DD
= 10 SINGLE ENDED
A
VD
C
= 0.1µF
B
C
= 1000µF
C
1
00358-025
THD + N (%)
0.1
0.01
20n0.12
10
TA = 25°C
V
= 2.7V
DD
A
= 2 (BTL)
VD
R
= 8Ω
L
FREQUENCY = 20kHz
P
(W)
OUTPUT
Figure 23. THD + N vs. P
OUTPUT
1
THD + N (%)
0.1
0.01
20n0.12
P
(W)
OUTPUT
Figure 24. THD + N vs. P
OUTPUT
RL = 8Ω
= 85mW
P
THD + N (%)
O
0.1
RL = 32Ω
P
= 20mW
O
1
00358-023
0.01
2010020k
1k10k
FREQUENCY (Hz)
00358-026
Figure 26. THD + N vs. Frequency
10
TA = 25°C
V
= 2.7V
DD
A
= 10 SINGLE ENDED
VD
C
= 0.1µF
B
C
= 1000µF
C
1
RL = 8Ω
P
= 65mW
THD + N (%)
O
0.1
RL = 32Ω
P
= 15mW
O
1
00358-024
0.01
2010020k
1k10k
FREQUENCY (Hz)
00358-027
Figure 27. THD + N vs. Frequency
Rev. C | Page 9 of 20
Page 10
SSM2211
10
TA = 25°C
A
= 2 (BTL)
VD
R
= 8Ω
L
FREQUENCY = 20Hz
C
= 0.1µF
B
1
VDD = 2.7V
4.0
3.5
3.0
2.5
T
= 150°C
J,MAX
FREE AIR, NO HEAT SINK
SOIC θJA = 121°C/W
LFCSP θ
8-LEAD LFCSP
= 50°C/W
JA
THD + N (%)
0.1
0.01
20n0.12
Figure 28. THD + N vs. P
10
TA = 25°C
A
= 2 (BTL)
VD
R
= 8Ω
L
FREQUENCY = 1kHz
C
= 0.1µF
B
1
THD + N (%)
0.1
0.01
20n0.12
Figure 29. THD + N vs. P
10
TA = 25°C
A
= 2 (BTL)
VD
= 8Ω
R
L
FREQUENCY = 20kHz
C
= 0.1µF
B
1
VDD = 3.3V
P
OUTPUT
VDD = 2.7V
P
OUTPUT
VDD = 2.7V
(W)
OUTPUT
VDD = 3.3V
(W)
OUTPUT
VDD = 3.3V
VDD = 5V
1
VDD = 5V
1
00358-028
00358-029
2.0
1.5
1.0
8-LEAD SOIC
MAXIMUM POWER DISSIPATION (W)
0.5
0
–40 –30 –20 –10 0 1030702040 50 609080110100120
AMBIENT TEMPERATURE (°C)
00358-031
Figure 31. Maximum Power Dissipation vs. Ambient Temperature
10k
VDD = 5V
8k
6k
4k
SUPPLY CURRENT (µA)
2k
0
05
1234
SHUTDOWN VOLTAGE AT PIN 1 (V)
00358-032
Figure 32. Supply Current vs. Shutdown Voltage
14
TA = 25°C
12
= OPEN
R
L
10
8
THD + N (%)
0.1
0.01
20n0.12
P
(W)
OUTPUT
Figure 30. THD + N vs. P
OUTPUT
VDD = 5V
1
SUPPLY CURRENT (mA)
00358-030
Rev. C | Page 10 of 20
6
4
2
0
016
2345
SUPPLY VOLTAGE (V)
Figure 33. Supply Current vs. Supply Voltage
00358-033
Page 11
SSM2211
1.6
1.4
1.2
20
16
VDD = 3.3V
SAMPLE SIZE = 300
1.0
0.8
0.6
OUTPUT POWER (W)
0.4
0.2
0
484812 16 20 24 28 3236 40 44
Figure 34. P
80
60
40
20
0
GAIN (dB)
–20
–40
–60
–80
1001k100M
2.7V
LOAD RESISTANCE (Ω)
vs. Load Resistance
OUTPUT
10k100k1M10M
FREQUENCY (Hz)
3.3V
Figure 35. Gain, Phase vs. Frequency (Single Amplifier)
25
VDD = 2.7V
SAMPLE SIZE = 300
20
12
8
FREQUENCY
5V
00358-034
4
0
–30–2030–1001020
OUTPUT OFFSET VOLTAGE (mV)
00358-037
Figure 37. Output Offset Voltage Distribution
180
135
90
45
0
–45
–90
–135
–180
PHASE SHIFT (Degrees)
00358-035
20
VDD = 3.3V
VDD = 5V
SAMPLE SIZE = 300
SAMPLE SIZE = 300
16
12
8
FREQUENCY
4
0
–30–2030
–1001020
OUTPUT OFFSET VOLTAGE (mV)
00358-038
Figure 38. Output Offset Voltage Distribution
600
500
VDD = 5V
SAMPLE SIZE = 1,700
15
10
FREQUENCY
5
0
–20 –1525–10–501015205
OUTPUT OFFSET VOLTAGE (mV)
Figure 36. Output Offset Voltage Distribution
FREQUENCY
00358-036
Rev. C | Page 11 of 20
400
300
200
100
0
6789101112131415
SUPPLY CURRENT (mA)
Figure 39. Supply Current Distribution
00358-039
Page 12
SSM2211
–50
TA = 25°C
= 5V± 100mV
V
DD
C
= 15µF
B
A
= 2
VD
–55
–60
PSRR (dB)
–65
–70
2010030k1k10k
FREQUENCY (Hz)
Figure 40. PSRR v s. Frequency
00358-040
Rev. C | Page 12 of 20
Page 13
SSM2211
V
PRODUCT OVERVIEW
The SSM2211 is a low distortion speaker amplifier that can run
from a 1.7 V to 5.5 V supply. It consists of a rail-to-rail input
and a differential output that can be driven within 400 mV of
either supply rail while supplying a sustained output current of
350 mA. The SSM2211 is unity-gain stable, requiring no
external compensation capacitors, and can be configured for
gains of up to 40 dB. Figure 41 shows the simplified schematic.
20kΩ
V
DD
6
20kΩ
IN
0.1µF
4
A1
3
50kΩ
2
50kΩ
SSM2211
50kΩ
50kΩ
A2
BIAS
CONTROL
5
8
V
O1
V
O2
Pin 4 and Pin 3 are the inverting and noninverting terminals
to A1. An offset voltage is provided at Pin 2, which should be
connected to Pin 3 for use in single-supply applications. The
output of A1 appears at Pin 5. A second op amp, A2, is configured with a fixed gain of A
= −1 and produces an inverted
V
replica of Pin 5 at Pin 8. The SSM2211 outputs at Pins 5 and 8
produce a bridged configuration output to which a speaker can
be connected. This bridge configuration offers the advantage of
a more efficient power transfer from the input to the speaker.
Because both outputs are symmetric, the dc bias at Pins 5 and 8
are exactly equal, resulting in zero dc differential voltage across
the outputs. This eliminates the need for a coupling capacitor at
the output.
THERMAL PERFORMANCE—LFCSP
The addition of the LFCSP to the Analog Devices package
portfolio offers the SSM2211 user even greater choice when
considering thermal performance criteria. For the 8-lead,
3 mm × 3 mm LFCSP, the θ
performance improvement over most other packaging options.
is 50°C/W. This is a significant
JA
7
1
SHUTDOWN
00358-041
Figure 41. Simplified Schematic
Rev. C | Page 13 of 20
Page 14
SSM2211
A
TYPICAL APPLICATION
R
F
5V
C
S
C
C
R
UDIO
INPUT
I
Figure 42. Typical Configuration
Figure 42 shows how the SSM2211 is connected in a typical
application. The SSM2211 can be configured for gain much like
a standard op amp. The gain from the audio input to the
speaker is
R
F
A×= 2
V
(1)
R
I
The 2 × factor comes from the fact that Pin 8 has the opposite
polarity from Pin 5, providing twice the voltage swing to the
speaker from the bridged output configuration.
is a supply bypass capacitor to provide power supply
C
S
filtering. Pin 2 is connected to Pin 3 to provide an offset voltage
for single-supply use, with C
ground to help power-supply rejection. Because Pin 4 is a
virtual ac ground, the input impedance is equal to R
input coupling capacitor which also creates a high-pass filter
with a corner frequency of
HP
CRf×
π
2
CI
1
=
Because the SSM2211 has an excellent phase margin, a feedback
capacitor in parallel with R
required, as it is in some competitor’s products.
BRIDGED OUTPUT VS. SINGLE-ENDED OUTPUT
CONFIGURATIONS
The power delivered to a load with a sinusoidal signal can be
expressed in terms of the signal’s peak voltage and the resistance
of the load as
2
V
PK
= (3)
P
L
R
2
L
6
4
–
SSM2211
3
+
2
C
B
providing a low ac impedance to
B
5
8
1
7
–
+
SPEAKER
8V
. CC is the
I
00358-042
(2)
to band limit the amplifier is not
F
By driving a load from a bridged output configuration, the
voltage swing across the load doubles. Thus, an advantage in
using a bridged output configuration becomes apparent from
Equation 3, as doubling the peak voltage results in four times
the power delivered to the load. In a typical application
operating from a 5 V supply, the maximum power that can be
delivered by the SSM2211 to an 8 Ω speaker in a single-ended
configuration is 250 mW. By driving this speaker with a bridged
output, 1 W of power can be delivered. This translates to a 12
dB increase in sound-pressure level from the speaker.
Driving a speaker differentially from a bridged output offers
another advantage in that it eliminates the need for an output
coupling capacitor to the load. In a single-supply application,
the quiescent voltage at the output is half of the supply voltage.
If a speaker is connected in a single-ended configuration, a
coupling capacitor is needed to prevent dc current from flowing
through the speaker. This capacitor also needs to be large
enough to prevent low frequency roll-off. The corner frequency
is given by
1
(4)
CRfπ2
CL
where R
dB3=−
is the speaker resistance and CC is the coupling
L
capacitance.
For an 8 Ω speaker and a corner frequency of 20 Hz, a 1000 µF
capacitor would be needed, which is physically large and costly.
By connecting a speaker in a bridged output configuration, the
quiescent differential voltage across the speaker becomes nearly
zero, eliminating the need for the coupling capacitor.
SPEAKER EFFICIENCY AND LOUDNESS
The effective loudness of 1 W of power delivered into an 8 Ω
speaker is a function of the speaker’s efficiency. The efficiency is
typically rated as the sound pressure level (SPL) at 1 meter in
front of the speaker with 1 W of power applied to the speaker.
Most speakers are between 85 dB and 95 dB SPL at 1 meter at
1 W. Table 6 shows a comparison of the relative loudness of
different sounds.
Table 6. Typical Sound Pressure Levels
Source of Sound dB SPL
Threshold of pain 120
Heavy street traffic 95
Cabin of jet aircraft 80
Average conversation 65
Average home at night 50
Quiet recording studio 30
Threshold of hearing 0
It can easily be seen that 1 W of power into a speaker can
produce quite a bit of acoustic energy.
Rev. C | Page 14 of 20
Page 15
SSM2211
POWER DISSIPATION
Another important advantage in using a bridged output configuration is the fact that bridged output amplifiers are more
efficient than single-ended amplifiers in delivering power to a
load. Efficiency is defined as the ratio of power from the power
supply to the power delivered to the load:
P
L
η
=
P
SY
An amplifier with a higher efficiency has less internal power
dissipation, which results in a lower die-to-case junction temperature, as compared to an amplifier that is less efficient. This is
important when considering the amplifier’s maximum power
dissipation rating vs. ambient temperature. An internal power
dissipation vs. output power equation can be derived to fully
understand this.
The power dissipated by the amplifier internally is simply the
difference between Equation 6 and Equation 3. The equation
for internal power dissipated, P
, expressed in terms of power
DISS
delivered to the load and load resistance is
×=22
VV
PEAKDD
P
DISS
R
π
L
(7)
The graph of this equation is shown in Figure 44.
1.5
VDD = 5V
RL = 4
Ω
1.0
The internal power dissipation of the amplifier is the internal
voltage drop multiplied by the average value of the supply
current. An easier way to find internal power dissipation is to
measure the difference between the power delivered by the
supply voltage source and the power delivered into the load.
The waveform of the supply current for a bridged output
amplifier is shown in Figure 43.
V
OUT
V
PEAK
TIME
T
I
SY
I
DD, PEAK
I
DD, AVG
T
Figure 43. Bridged Amplifier Output Voltage and Supply Current vs. Time
TIME
00358-043
By integrating the supply current over a period T, then dividing
the result by T, I
can be found. Expressed in terms of peak
DD,AVG
output voltage and load resistance
V
2
PEAK
I
=
,
AVGDD
(5)
R
π
L
Therefore power delivered by the supply, neglecting the bias
current for the device is
2
VV
PEAKDD
=
P
SY
π
(6)
R
L
RL = 8
0.5
POWER DISSIPATION (W)
RL = 16
Ω
0
01.5
Figure 44. Power Dissipation vs. Output Power with V
0.51.0
OUTPUT POWER (W)
Ω
DD
00358-044
= 5 V
Because the efficiency of a bridged output amplifier (Equation 3
divided by Equation 6) increases with the square root of P
, the
L
power dissipated internally by the device stays relatively flat,
and actually decreases with higher output power. The maximum power dissipation of the device can be found by differentiating Equation 7 with respect to load power, and setting the
derivative equal to zero. This yields
2
×
V
−
∂
P
DISS
=
∂
P
L
π
R
L
DD
1
2
P
L
(8)
01
=−
And occurs when
2
V
2
DD
P=
MAXDISS
,
(9)
2
Rπ
L
Using Equation 9 and the power derating curve in Figure 31,
the maximum ambient temperature can be found easily. This
ensures that the SSM2211 does not exceed its maximum
junction temperature of 150°C.
The power dissipation for a single-ended output application
where the load is capacitively coupled is given by
22
V
×
P−
=∂
DISS
DD
R
π
L
PP
(10)
LL
The graph of Equation 10 is shown in Figure 45.
Rev. C | Page 15 of 20
Page 16
SSM2211
V
0.35
0.30
0.25
0.20
0.15
0.10
POWER DISSIPATION (W)
0.05
0
VDD = 5V
00.40.1
RL = 16
Ω
0.20.3
OUTPUT POWER (W)
RL = 8
Ω
RL = 4
Ω
00358-045
Figure 45. Power Dissipation vs. Single-Ended Output Power
with V
= 5 V
DD
The maximum power dissipation for a single-ended output is
2
V
P
MAXDISS
,
DD
=
(11)
2
R
π2
L
OUTPUT VOLTAGE HEADROOM
The outputs of both amplifiers in the SSM2211 can come to
within 400 mV of either supply rail while driving an 8 Ω load.
As compared to other competitors’ equivalent products, the
SSM2211 has a higher output voltage headroom. This means
that the SSM2211 can deliver an equivalent maximum output
power while running from a lower supply voltage. By running at
a lower supply voltage, the internal power dissipation of the
device is reduced, as can be seen in Equation 9. This extended
output headroom, along with the LFCSP package, allows the
SSM2211 to operate in higher ambient temperatures than other
competitors’ devices.
The SSM2211 is also capable of providing amplification even at
supply voltages as low as 1.7 V. The maximum power available
at the output is a function of the supply voltage. Therefore, as
the supply voltage decreases, so does the maximum power
output from the device. The maximum output power vs. supply
voltage at various bridged-tied load resistances is shown in
Figure 46 The maximum output power is defined as the point
at which the output has 1% total harmonic distortion (THD).
To find the minimum supply voltage needed to achieve a
specified maximum undistorted output power, use Figure 46.
For example, an application requires only 500 mW to be output
for an 8 Ω speaker. With the speaker connected in a bridged
output configuration, the minimum supply voltage required
is 3.3 V.
1.6
1.4
1.2
1.0
0.8
@ 1% THD (W)
OUT
0.6
MAX P
0.4
0.2
0
1.55.02.0
2.53.03.54.04.5
SUPPLY VOLTAGE (V)
Figure 46. Maximum Output Power vs. V
RL = 4
Ω
RL = 8
Ω
RL = 16
Ω
00358-046
SY
Shutdown Feature
The SSM2211 can be put into a low power consumption shutdown mode by connecting Pin 1 to 5 V. In shutdown mode,
the SSM2211 has an extremely low supply current of less than
10 nA. This makes the SSM2211 ideal for battery-powered
applications.
Pin 1 should be connected to ground for normal operation.
Connecting Pin 1 to V
mutes the outputs and puts the device
DD
into shutdown mode. A pull-up or pull-down resistor is not
required. Pin 1 should always be connected to a fixed potential,
either V
or ground, and never be left floating. Leaving Pin 1
DD
unconnected could produce unpredictable results.
AUTOMATIC SHUTDOWN-SENSING CIRCUIT
Figure 47 shows a circuit that can be used to take the SSM2211
in and out of shutdown mode automatically. This circuit can
be set to turn the SSM2211 on when an input signal of a certain
amplitude is detected. The circuit also puts the device into low
power shutdown mode if an input signal is not sensed within
a certain amount of time. This can be useful in a variety of
portable radio applications where power conservation is critical.
4
SSM2211
1
R8
5
8
A1
V
DD
R5
C2
IN
R6
V
DD
R1R3
NOTE
ADDITIONAL PINS OMITTED FOR CLARITY
–
OP181
+
R2
A2
Figure 47. Automatic Shutdown Circuit
R7
V
DD
R4
D1
C1
00358-047
Rev. C | Page 16 of 20
Page 17
SSM2211
The input signal to the SSM2211 is also connected to the noninverting terminal of A2. R1, R2, and R3 set the threshold
voltage for when the SSM2211 is to be taken out of shutdown
mode. D1 half-wave rectifies the output of A2, discharging C1
to ground when an input signal greater than the set threshold
voltage is detected. R4 controls the charge time of C1, which
sets the time until the SSM2211 is put back into shutdown
mode after the input signal is no longer detected.
R5 and R6 are used to establish a voltage reference point equal
to half of the supply voltage. R7 and R8 set the gain of the
SSM2211. D1 should be a 1N914 or equivalent diode and A2
should be a rail-to-rail output amplifier, such as an OP181 or
equivalent. This ensures that C1 discharges sufficiently to bring
the SSM2211 out of shutdown mode.
To find the appropriate component values, first the gain of A2
must be determined by
V
SY
A=
MINV,
(12)
V
THS
where:
V
is the single supply voltage.
SY
V
is the threshold voltage.
THS
should be set to a minimum of 2 for the circuit to work
A
V
properly.
Next choose R1 and set R2 to
⎛
⎜
R1R2
⎜
⎝
⎞
2
⎟
1
(13)
−=
⎟
A
V
⎠
Find R3 as:
R3
R2R1
=
+
R2R2
(14)
(
1−
A
)
V
×
C1 can be arbitrarily set but should be small enough to keep A2
from becoming capacitively overloaded. R4 and C1 control the
shutdown rate. To prevent intermittent shutdown with low
frequency input signals, the minimum time constant should be
(15)
f
LOW
where f
C1R410≥×
is the lowest input frequency expected.
LOW
The minimum gain of the shutdown circuit from Equation 12 is
= 100. R1 is set to 100 kΩ. Using Equation 13 and Equation
A
V
14, R2 = 98 kΩ and R3 = 4.9 MΩ. C1 is set to 0.01 µF, and based
on Equation 15, R4 is set to 10 MΩ . To minimize power supply
current, R5 and R6 are set to 10 MΩ. The previous procedure
provides an adequate starting point for the shutdown circuit.
Some component values may need to be adjusted empirically to
optimize performance.
START-UP POPPING NOISE
During power-up or release from shutdown mode, the midrail
bypass capacitor, C
starts up. By adjusting the charging time constant of C
start-up pop noise can be pushed into the subaudible range,
greatly reducing start-up popping noise. On power-up, the
midrail bypass capacitor is charged through an effective
resistance of 25 kΩ. To minimize start-up popping, the charging
time constant for C
constant for the input coupling capacitor, C
× 25 kΩ > CCR1 (16)
C
B
For an application where R1 = 10 kΩ and C
midrail bypass capacitor, C
minimize start-up popping noise.
SSM2211 Amplifier Design Example
Maximum Output Power 1 W
Input Impedance 20 kΩ
Load Impedance 8 Ω
Input Level 1 V rms
Bandwidth 20 Hz − 20 kHz ± 0.25 dB
The configuration shown in Figure 42 is used. The first thing to
determine is the minimum supply rail necessary to obtain the
specified maximum output power. From Figure 46, for 1 W of
output power into an 8 Ω load, the supply voltage must be at
least 4.6 V. A supply rail of 5 V can be easily obtained from a
voltage reference. The extra supply voltage also allows the
SSM2211 to reproduce peaks in excess of 1 W without clipping
the signal. With V
the maximum power dissipation for the SSM2211 is 633 mW.
From the power derating curve in Figure 31, the ambient
temperature must be less than 73°C for the SOIC and 118°C for
the LFCSP.
, determines the rate at which the SSM2211
B
, the
B
should be greater than the charging time
B
.
C
= 0.22 µF, the
C
, should be at least 0.1 µF to
B
= 5 V and RL = 8 Ω, Equation 9 shows that
DD
SHUTDOWN-CIRCUIT DESIGN EXAMPLE
In this example, a portable radio application requires the
SSM2211 to be turned on when an input signal greater than
50 mV is detected. The device should return to shutdown mode
within 500 ms after the input signal is no longer detected. The
lowest frequency of interest is 200 Hz, and a 5 V supply is used.
Rev. C | Page 17 of 20
The required gain of the amplifier can be determined from
Equation 17 as
RP
A
V
LL
8.2==
V
rmsIN,
(17)
Page 18
SSM2211
()(
)
A
From Equation 1
RI
A
V
F
=
2
R
or R
= 1.4 × RI. Because the desired input impedance is 20 kΩ,
F
RI = 20 kΩ and R2 = 28 kΩ.
The final design step is to select the input capacitor. When
adding an input capacitor, C
, high-pass filter, the corner fre-
C
quency needs to be far enough away for the design to meet the
bandwidth criteria. For a first-order filter to achieve a passband response within 0.25 dB, the corner frequency should
be at least 4.14 × away from the pass-band frequency. So,
(4.14 × f
) < 20 Hz. Using Equation 2, the minimum size of
HP
input capacitor can be found:
C
>
C
> 1.65 µF. Using a 2.2 µF is a practical choice for CC.
So C
C
1
()
⎛
Ω
k20π2
⎜
⎝
(18)
Hz20
⎞
⎟
14.4
⎠
The gain bandwidth product for each internal amplifier in the
SSM2211 is 4 MHz. Because 4 MHz is much greater than
4.14 × 20 kHz, the design meets the upper frequency bandwidth
criteria. The SSM2211 could also be configured for higher
differential gains without running into bandwidth limitations.
Equation 16 shows an appropriate value for C
to reduce start-
B
up popping noise:
>BC
Selecting C
Ω
k25
to be 2.2 µF for a practical value of capacitor
B
=
Ω
(19)
µF76.1
k20µF2.2
minimizes start-up popping noise.
To summarize the final design:
5 V
V
DD
R1 20 kΩ
R
28 kΩ
F
2.2 µF
C
C
2.2 µF
C
B
Max. T
85°C
A
SINGLE-ENDED APPLICATIONS
There are applications in which driving a speaker differentially
is not practical. An example would be a pair of stereo speakers
where the minus terminal of both speakers is connected to
ground. Figure 48 shows how this can be accomplished.
10kΩ
10kΩ
5V
5V
6
AUDIO
AUDIO
INPUT
INPUT
0.47µF
0.47µF
10kΩ
10kΩ
0.1µF
0.1µF
4
4
–
–
SSM2211
SSM2211
3
3
+
+
2
2
6
5
5
8
8
1
1
7
7
470µF
470µF
+
+
–
–
250mW
250mW
SPEAKER
SPEAKER
(8Ω)
(8Ω)
00358-048
00358-048
Figure 48. A Single-Ended Output Application
It is not necessary to connect a dummy load to the unused
output to help stabilize the output. The 470 µF coupling
capacitor creates a high-pass frequency cutoff, as given in
Equation 4, of 42 Hz, which is acceptable for most computer
speaker applications. The overall gain for a single-ended output
configuration is A
= RF/R1, which for this example is equal to 1.
V
DRIVING TWO SPEAKERS SINGLE ENDEDLY
It is possible to drive two speakers single endedly with both
outputs of the SSM2211.
20kΩ
5V
UDIO
INPUT
20kΩ
1µF
0.1µF
4
–
SSM2211
3
+
2
6
5
8
1
7
Figure 49. SSM2211 Used as a Dual-Speaker Amplifier
Each speaker is driven by a single ended output. The trade-off is
that only 250 mW of sustained power can be put into each
speaker. Also, a coupling capacitor must be connected in series
with each of the speakers to prevent large dc currents from
flowing through the 8 Ω speakers. These coupling capacitors
produce a high-pass filter with a corner frequency given by
Equation 4. For a speaker load of 8 Ω and a coupling capacitor
of 470 µF, this results in a −3 dB frequency of 42 Hz.
Because the power of a single-ended output is one quarter that
of a bridged output, both speakers together are still half as loud
(−6 dB SPL) as a single speaker driven with a bridged output.
The polarity of the speakers is important, as each output is 180°
out of phase with the other. By connecting the minus terminal
of Speaker 1 to Pin 5, and the plus terminal of Speaker 2 to Pin
8, proper speaker phase can be established.
470µF
470µF
–
+
+
–
LEFT
SPEAKER
(8Ω)
RIGHT
SPEAKER
(8Ω)
00358-049
Rev. C | Page 18 of 20
Page 19
SSM2211
The maximum power dissipation of the device can be found by
doubling Equation 11, assuming both loads are equal. If the
loads are different, use Equation 11 to find the power dissipation caused by each load, then take the sum to find the total
power dissipated by the SSM2211.
EVALUATION BOARD
An evaluation board for the SSM2211 is available. For more
information, call 1-800-ANALOGD.
R1
51kΩ
SHUTDOWN
ON
AUDIO
INPUT
CW
C
1µF
+
R
IN
IN
20kΩ
VOLUME
20kΩ POT.
Figure 50. Evaluation Board Schematic
The voltage gain of the SSM2211 is given by Equation 20
R
F
A×= 2
V
(20)
R
IN
If desired, the input signal may be attenuated by turning the
10 kΩ potentiometer in the CW direction. C
common-mode voltage (V
/2) present at Pin 2 and 3. With
D
V+ = 5 V, there is 2.5 V common-mode voltage present at both
output terminals, V
and VO2, as well.
O1
CAUTION: The ground lead of the oscilloscope probe, or any
other instrument used to measure the output signal, must not
be connected to either output, as this would short out one of the
amplifier’s outputs and possibly damage the device.
A safe method of displaying the differential output signal using
a grounded scope is shown in Figure 51. Connect Channel A’s
probe to the V
post, invert Channel B and add the two channels
the V
O1
terminal post, connect Channel B’s probe to
O2
together. Most multichannel oscilloscopes have this feature built
in. If you must connect the ground lead of the test instrument
to either output signal pins, a power-line isolation transformer
must be used to isolate the instrument ground from the power
supply ground.
Recall that V = √P × R , so then for P
V = 2.8 V rms, or 8 V p-p. If the available input signal is 1.4 V
rms or more, use the board as is, with R
gain is needed, increase the value of R
V+
+
C2
10µF
6
1
2
SSM2211
3
4
7
R
F
20kΩ
C1
0.1µF
= 1 W and RL = 8 Ω,
O
.
F
J1
8
5
J2
isolates the input
IN
= RI = 20 kΩ. If more
F
C1
0.1µF
R
L
1W 8Ω
V
O2
V
O1
00358-050
When you have determined the closed-loop gain required by
your source level, and can develop 1 W across the 8 Ω load
resistor with the normal input signal level, replace the resistor
with your speaker. Your speaker may be connected across the
and VO2 posts for bridged mode operation only after the
V
O1
8 Ω load resistor is removed. For no phase inversion, V
should
O2
be connected to the (+) terminal of the speaker.
V
SSM2211
5
2.5V
COMMON
MODE
8
8Ω
1W
GND
V
O2
PROBES
O1
CH A
CH B
CH B
INV. ON
OSCILLOSCOPE
DISPLAY
A+B
Figure 51. Using an Oscilloscope to Display the Bridged Output Voltage
To use the SSM2211 in a single-ended output configuration,
replace J1 and J2 jumpers with electrolytic capacitors of a
suitable value, with the negative terminals to the output
terminals V
and VO2. The single-ended loads may then be
O1
returned to ground. Note that the maximum output power is
reduced to 250 mW, one-quarter of the rated maximum, due to
the maximum swing in the nonbridged mode being one-half,
and power being proportional to the square of the voltage. For
frequency response down 3 dB at 100 Hz, a 200 µF capacitor is
required with 8 Ω speakers.
The SSM2211 evaluation board also comes with a shutdown
switch, which allows the user to switch between on (normal
operation) and the power-conserving shutdown mode.
LFCSP PRINTED CIRCUIT BOARD LAYOUT
CONSIDERATIONS
The LFCSP is a plastic encapsulated package with a copper lead
frame substrate. This is a leadless package with solder lands on
the bottom surface of the package instead of conventional
formed perimeter leads. A key feature that allows the user to
reach the quoted θ
paddle (DAP) on the bottom surface of the package. When
soldered to the PCB, the DAP can provide efficient conduction
of heat from the die to the PCB. For the user to achieve
optimum package performance, consideration should be given
to the PCB pad design for both the solder lands and the DAP.
For further information the user is directed to the Amkor
Technology document, “Application Notes for Surface Mount
Assembly of Amkor’s MicroLead Frame (MLF) Packages.” This
can be downloaded from the Amkor Technology website,
www.amkor.com, as a product application note.
performance is the exposed die attach
JA
00358-051
Rev. C | Page 19 of 20
Page 20
SSM2211
R
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
85
1.27 (0.0500)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012AA
Figure 52. 8-Lead Standard Small Outline Package [SOIC]