Complete microphone conditioner in a 10-lead package
Single 3 V operation
Low shutdown current < 2 μA
Adjustable noise gate threshold
Adjustable compression ratio
Automatic limiting feature prevents ADC overload
Low noise and distortion: 0.2% THD + N
20 kHz bandwidth
APPLICATIONS
Desktop, portable, or palmtop computers
Telephone conferencing
Communication headsets
Two-way communications
Surveillance systems
Karaoke and DJ mixers
GENERAL DESCRIPTION
The SSM2167 is a complete and flexible solution for conditioning
microphone inputs in personal electronics and computer audio
systems. It is also excellent for improving vocal clarity in communications and public address systems. A low noise voltage
controlled amplifier (VCA) provides a gain that is dynamically
adjusted by a control loop to maintain a set compression characteristic. The compression ratio is set by a single resistor and can
be varied from 1:1 to over 10:1 relative to the fixed rotation
point. Signals above the rotation point are limited to prevent
overload and to eliminate popping. A downward expander (noise
gate) prevents amplification of background noise or hum. This
results in optimized signal levels prior to digitization, thereby
eliminating the need for additional gain or attenuation in the
digital domain. The flexibility of setting the compression ratio
and the time constant of the level detector, coupled with two
values of rotation point, make the SSM2167 easy to integrate in
a wide variety of microphone conditioning applications.
The device is available in a 10-lead MSOP package, and is
guaranteed for operation over the extended industrial
temperature range of −40°C to +85°C.
SSM2167
PIN CONFIGURATION
GND
1
VCA
2
IN
SSM2167
SHUTDOWN
3
TOP VIEW
(Not to S cale)
4
BUF
OUT
INPUT
5
Figure 1. 10-Lead MSOP (RM Suffix)
(ROTATION POINT)
COMPRESSION
DOWNWARD
EXPANSION
THRESHOLD
(NOISE GATE)
OUTPUT (dB)
DOWNWARD
EXPANSION
REGION
Figure 2. General Input/Output Characteristics
REGION
1
V
DE
INPUT (dB)
V
10
DD
OUTPUT
9
8
COMPRESSION RATIO
7
GATE THRS
AVG CAP
6
LIMITIN
THRESHOLD
1
r
1
V
RP
LIMITING
REGION
VCA GAIN
2628-001
02628-002
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Edits to Specifications ....................................................................... 2
Edits to Figure 2 and Figure 3 .......................................................... 6
7/01—Revision 0: Initial Version
Rev. C | Page 2 of 12
Page 3
SSM2167
www.BDTIC.com/ADI
SPECIFICATIONS
VS = 3.0 V, f = 1 kHz, RL = 100 kΩ, R
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
AUDIO SIGNAL PATH
Voltage Noise Density en 10:1 compression 20 nV/√Hz
Noise 20 kHz bandwidth, VIN = GND −70 dBV
Total Harmonic Distortion + Noise THD + N VIN = 100 mV rms 0.2 %
Input Impedance Z
Output Impedance Z
Load Drive Minimum resistive load 5 kΩ
Maximum capacitive load 2 nF
Input Voltage Range 0.4% THD + N 600 mV rms
Output Voltage Range 0.4% THD + N 700 mV rms
Gain Bandwidth Product 1:1 compression, VCA G = 18 dB 1 MHz
CONTROL SECTION
VCA Dynamic Gain Range 40 dB
VCA Fixed Gain 18 dB
Compression Ratio, Minimum 1:1
Compression Ratio, Maximum See Table 4 for R
Rotation Point 63 mV rms
Noise Gate Range Maximum threshold −40 dBV
POWER SUPPLY
Supply Voltage V
Supply Current I
DC Output Voltage 1.4 V
Power Supply Rejection Ratio PSRR VSY = 2.5 V to 6 V 45 dB
SHUTDOWN
Supply Current I
= 0 Ω, TA = 25°C, VIN = 100 mV rms, R
COMP
100 kΩ
IN
145 Ω
OUT
2.5 5.5 V
SY
2.3 5 mA
SY
Pin 3 = GND 2 8 μA
SY
= 2 kΩ, unless otherwise noted.
GATE
10:1
COMP
Rev. C | Page 3 of 12
Page 4
SSM2167
www.BDTIC.com/ADI
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Supply Voltage 6 V
Input Voltage 6 V
Operating Temperature Range −40°C to +85°C
Junction Temperature 150°C
Lead Temperature (Soldering, 10 sec) 300°C
883 (Human Body) Model 500 V
THERMAL RESISTANCE
θJA is specified for worst-case conditions, that is, θJA is specified
for device soldered in 4-layer circuit board for surface-mount
packages.
Table 3.
Package Type θJA θJC Unit
10-Lead MSOP (RM) 180 35 °C/W
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. C | Page 4 of 12
Page 5
SSM2167
–
www.BDTIC.com/ADI
TYPICAL PERFORMANCE CHARACTERISTICS
100
TA = 25°C
V+ = 3V
R
= 100kΩ
LOAD
COMPRESSIO N RATIO 2:1
ROTATION POINT = 63mV rms
1
10
NOISE GATE (mV rms)
1
0500100015002000250030003500
Figure 3. Noise Gate vs. R
R
GATE
(Ω)
02628-003
GATE
1
TA = 25°C
V+ = 3V
V
= 24.5mV rms
IN
COMPRESSION RATIO 1:1
ROTATION POINT = 63mV rms
NOISE GATE SETTING = 1.4V rms
The SSM2167 is a complete microphone signal conditioning
system on a single integrated circuit. Designed primarily for
voice-band applications, this integrated circuit provides amplification, limiting, variable compression, and noise gate. User
adjustable compression ratio, noise gate threshold, and two
different fixed gains optimize circuit operation for a variety of
applications. The SSM2167 also features a low power shutdown
mode for battery-powered applications.
DD
+
10µF
10
+
9
10µF
V
R
GATE
7
R
COMP
8
OUTPUT
100kΩ
DD
GND
V
DD
HUTDOWN
INPUT
10µF
500kΩ
0.1µF
1
2
4
3
SSM2167
56
10µF
GND
+
Figure 16. Typical Application Circuit
OUT
1kΩ1kΩ
LEVEL
DETECTOR
C
10µF
GND
C2
10µF
+
AVG
C3
VCA
VCA+1
CONTROL
+
IN
OUTPUT
NOISE GATE AND
COMPRESSIO N
SETTINGS
V
DD
R
R
C
G
INPU
+
C1
0.1µF
V
DD
BUF
BUFFER
SHUTDOWN
Figure 17. Functional Block Diagram
THEORY OF OPERATION
The typical transfer characteristic for the SSM2167 is shown in
Figure 2 where the output level in dB is plotted as a function of
the input level in dB. The dotted line indicates the transfer characteristic for a unity-gain amplifier. For input signals in the range
of V
(downward expansion) to VRP (rotation point), an “r” dB
DE
change in the input level causes a 1 dB change in the output level.
Here, r is defined as the compression ratio. The compression ratio
may be varied from 1:1 (no compression) to 10:1 via a single
resistor, R
fixed compression ratio of approximately 10:1. This region of
operation is the limiting region. Varying the compression ratio has
no effect on the limiting region.
. Input signals above VRP are compressed with a
COMP
Rev. C | Page 8 of 12
2628-016
02628-017
The breakpoint between the compression region and the limiting
region is referred to as the limiting threshold or the rotation point.
The term, rotation point, derives from the observation that the
straight line in the compression region rotates about this point on
the input/output characteristic as the compression ratio is changed.
The gain of the system with an input signal level of V
is the fixed
RP
gain, 18 dBV for the SSM2167, regardless of the compression ratio.
Input signals below V
are downward expanded; that is, a −1 dB
DE
change in the input signal level causes approximately a −3 dB
change in the output level. As a result, the gain of the system is
small for very small input signal levels, even though it may be
quite large for small input signals above V
. The external resistor
DE
at Pin 7, RGATE, is used to set the downward expansion
threshold (V
).
DE
Finally, the SSM2167 provides an active low, CMOS-compatible
digital power-down feature that reduces device supply current
to typically less than 2 μA.
SIGNAL PATH
Figure 17 illustrates the block diagram of the SSM2167. The
audio input signal is processed by the input buffer and then by
the VCA. The input buffer presents an input impedance of
approximately 100 kΩ to the source. A dc voltage of approximately
1.5 V is present at INPUT (Pin 5) of the SSM2167, requiring the
use of a blocking capacitor (C1) for ground-referenced sources.
A 0.1 μF capacitor is a good choice for most audio applications.
The input buffer is a unity-gain stable amplifier that can drive
the low impedance input of the VCA and an internal rms detector.
The VCA is a low distortion, variable gain amplifier whose gain
is set by the side-chain control circuitry. An external blocking
capacitor (C2) must be used between the buffer output and the
VCA input. The 1 kΩ impedance between amplifiers determines
the value of this capacitor, which is typically between 4.7 μF and
10 μF. An aluminum electrolytic capacitor is an economical choice.
The VCA amplifies the input signal current flowing through C2
and converts this current to a voltage at the output pin (Pin 9) of
the SSM2167. The net gain from input to output can be as high
as 40 dB, depending on the gain set by the control circuitry.
The output impedance of the SSM2167 is typically less than
145 Ω, and the external load on Pin 9 should be >5 kΩ. The
nominal output dc voltage of the device is approximately 1.4 V;
therefore, a blocking capacitor for grounded loads must be used.
The bandwidth of the SSM2167 is quite wide at all gain settings.
The upper 3 dB point is over 1 MHz at gains as high as 30 dB.
The GBW plots are shown in
frequency of the SSM2167 is set by the input impedance of the
VCA (1 kΩ) and C2. Whereas the noise of the input buffer is
fixed, the input-referred noise of the VCA is a function of gain.
The VCA input noise is designed to be at a minimum when the
gain is at a maximum, thereby maximizing the usable dynamic
range of the part.
Figure 5. The lower 3 dB cutoff
Page 9
SSM2167
www.BDTIC.com/ADI
LEVEL DETECTOR
The SSM2167 incorporates a full-wave rectifier and a true rms
level detector circuit whose averaging time constant is set by an
external capacitor (C
) connected to the AVG CAP (Pin 6).
AVG
For optimal low frequency operation of the level detector down
to 10 Hz, the value of the capacitor should be 2.2 μF. Some experimentation with larger values for C
may be necessary to reduce
AVG
the effects of excessive low frequency ambient background noise.
The value of the averaging capacitor affects sound quality: too
small a value for this capacitor may cause a pumping effect for
some signals, whereas too large a value can result in slow response
times to signal dynamics. Electrolytic capacitors are recommended
here for lowest cost and should be in the range of 2 μF to 22 μF.
The rms detector filter time constant is approximately given by
10 × C
milliseconds where C
AVG
is in μF. This time constant
AVG
controls both the steady state averaging in the rms detector as
well as the release time for compression; that is, the time it takes
for the system gain to increase due to a decrease in input signal.
The attack time, the time it takes for the gain to be reduced
because of a sudden increase in input level, is controlled mainly
by internal circuitry that speeds up the attack for large level
changes. In most cases, this limits overload time to less than 1 ms.
The performance of the rms level detector is illustrated in
Figure 14 for a C
of 2.2 μF and Figure 13 for a C
AVG
of 22 μF.
AVG
In Figure 13, Figure 14, and Figure 15, the input signal to the
SSM2167 (not shown) is a series of tone bursts in six successive
10 dB steps. The tone bursts range from −66 dBV (0.5 mV rms)
to −6 dBV (0.5 V rms). As illustrated in these figures, the attack
time of the rms level detector is dependent only on C
, but the
AVG
release times are linear ramps whose decay times are dependent
on both C
approximately 240 dB/s for a C
C
of 22 μF.
AVG
and the input signal step size. The rate of release is
AVG
of 2.2 μF, and 12 dB/s for a
AVG
CONTROL CIRCUITRY
The output of the rms level detector is a signal proportional to
the log of the true rms value of the buffer output with an added
dc offset. The control circuitry subtracts a dc voltage from this
signal, scales it, and sends the result to the VCA to control the
gain. The gain control of the VCA is logarithmic—a linear change
in control signal causes a dB change in gain. It is this control
law that allows linear processing of the log rms signal to provide
the flat compression characteristic on the input/output characteristic shown in Figure 2.
OUTPUT (d B)
SETTING THE COMPRESSION RATIO
Changing the scaling of the control signal fed to the VCA causes
a change in the circuit compression ratio, r. This effect is shown
in Figure 18. Connecting a resistor (R
V
sets the compression ratio. Lowering R
DD
compression ratios as indicated in Tab le 4 . AGC performance is
achieved with compression ratios between 2:1 and 10:1, and is
dependent on the application. Shorting R
function, setting the compression equal to 1:1. If using a compression resistor, using a value greater than 5 kΩ is recommended.
If lower than 5 kΩ is used, the device may interpret this as a
short, 0 Ω.
Table 4. Setting Compression Ratio
Compression Ratio Value of R
1:1 0 Ω (short to V+)
2:1 15 kΩ
3:1 35 kΩ
5:1 75 kΩ
10:1 175 kΩ
15:1
5:1
2:1
1:1
1
1
V
DE
Figure 18. Effect of Varying the Compression Ratio
INPUT (dB)
VCA GAIN
V
RP
) between Pin 8 and
COMP
COMP
disables the AGC
COMP
COMP
gives smaller
02628-018
Rev. C | Page 9 of 12
Page 10
SSM2167
www.BDTIC.com/ADI
SETTING THE NOISE GATE THRESHOLD
(DOWNWARD EXPANSION)
The noise gate threshold is a programmable point using an external
resistor (RGATE) that is connected between Pin 7 (GATE THRS)
and V
−40 dBV and −55 dBV, as shown in Tabl e 5. The downward
expansion threshold is inversely proportional to the value of this
resistance: setting this resistance to 0 Ω sets the threshold at
approximately 10 mV rms (−40 dBV), whereas a 5 kΩ resistance
sets the threshold at approximately 1 mV rms (−55 dBV). This
relationship is illustrated in Figure 19. It is not recommended to
use more than 5 kΩ for the R
of the SSM2167 prevents the noise gate from being lowered
further without causing problems.
Table 5. Setting Noise Gate Threshold
Noise Gate (dBV) Value of R
−40 0 Ω (short to V+)
−48 1 kΩ
−54 2 kΩ
−55 5 kΩ
. The downward expansion threshold may be set between
DD
resistor because the noise floor
GATE
GATE
r:1
VCA GAIN
OUTPUT (d B)
1
1
V
DE2
V
DE1VDE3
Figure 19. Effects of Varying the Downward
INPUT (dB)
Expansion (Noise Gate) Threshold
V
RP
2628-019
ROTATION POINT (LIMITING)
Input signals above a particular level, the rotation point, are
attenuated (limited) by internal circuitry. This feature allows the
SSM2167 to limit the maximum output, preventing clipping of
the following stage, such as a codec or ADC. The rotation point
for SSM2167 is set internally to −24 dBV (63 mV rms).
SHUTDOWN FEATURE
The supply current of the SSM2167 can be reduced to under
10 μA by applying an active low, 0 V CMOS-compatible input
SHUTDOWN
to the
pin (Pin 3) of the SSM2167. In this state,
the input and output circuitry of the SSM2167 assumes a high
impedance state; as such, the potentials at the input pin and the
output pin are determined by the external circuitry connected
to the SSM2167. The SSM2167 takes approximately 200 ms to
settle from a shutdown to power-on command. For power-on to
shutdown, the SSM2167 requires more time, typically less than
1 sec. Cycling the power supply to the SSM2167 can result in
quicker settling times: the off-to-on settling time of the SSM2167 is
less than 200 ms, whereas the on-to-off settling time is less than
1 ms. The SSM2167 shutdown current is related to both temperature and voltage.
PCB LAYOUT CONSIDERATIONS
Because the SSM2167 is capable of wide bandwidth operation
and can be configured for as much as 60 dB of gain, special care
must be exercised in the layout of the PCB that contains the IC
and its associated components. The following applications hints
should be considered for the PCB.
The layout should minimize possible capacitive feedback from
the output of the SSM2167 back to its input. Do not run input
and output traces adjacent to each other.
A single-point (star) ground implementation is recommended
in addition to maintaining short lead lengths and PCB runs. In
applications where an analog ground and a digital ground are
available, the SSM2167 and its surrounding circuitry should be
connected to the analog ground of the system. As a result of
these recommendations, wire-wrap board connections and
grounding implementations are to be explicitly avoided.
Rev. C | Page 10 of 12
Page 11
SSM2167
www.BDTIC.com/ADI
OUTLINE DIMENSIONS
3.10
3.00
2.90
6
10
3.10
3.00
2.90
1
PIN 1
0.50 BSC
0.95
0.85
0.75
0.15
0.05
0.33
0.17
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-BA
Figure 20. 10-Lead Mini Small Outline Package [MSOP]
ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding