Datasheet SSM2135S, SSM2135P Datasheet (Analog Devices)

Page 1
SSM2135
V+ OUT B –IN B +IN B
OUT A
–IN A +IN A
V–/GND
SSM2135
OUT A
–IN A
+IN A
V–/GND
1
2
3
4
8
7
6
5
V+
OUT B
–IN B
+IN B
a
FEATURES Excellent Sonic Characteristics High Output Drive Capability
5.2 nV/
0.001% THD+N (V
3.5 MHz Gain Bandwidth Unity-Gain Stable Low Cost
APPLICATIONS Multimedia Audio Systems Microphone Preamplifier Headphone Driver Differential Line Receiver Balanced Line Driver Audio ADC Input Buffer Audio DAC l-V Converter and Filter Pseudo-Ground Generator
GENERAL DESCRIPTION
The SSM2135 Dual Audio Operational Amplifier permits excellent performance in portable or low power audio systems, with an operating supply range of +4 V to +36 V or ±2 V to ±18 V. The unity gain stable device has very low voltage noise of 4.7 nV/
0.01% over normal signal levels and loads. Such characteristics are enhanced by wide output swing and load drive capability. A unique output stage* permits output swing approaching the rail
Hz Equivalent Input Noise @ 1 kHz
= 2.5 V p-p @ 1 kHz)
O
Hz, and total harmonic distortion plus noise below
Audio Operational Amplifier
SSM2135
PIN CONNECTIONS
8-Lead Narrow-Body SOIC
(S Suffix) (P-Suffix)
under moderate load conditions. Under severe loading, the SSM2135 still maintains a wide output swing with ultralow distortion.
Particularly well suited for computer audio systems and portable digital audio units, the SSM2135 can perform preamplification, headphone and speaker driving, and balanced line driving and receiving. Additionally, the device is ideal for input signal conditioning in single-supply sigma-delta analog­to-digital converter subsystems such as the AD1878/AD1879.
The SSM2135 is available in 8-lead plastic DIP and SOIC packages, and is guaranteed for operation over the extended industrial temperature range of –40°C to +85°C.
*Protected by U. S. Patent No. 5,146,181.
8-Lead Epoxy DIP

FUNCTIONAL BLOCK DIAGRAM

+IN
–IN
9V
9V
REV. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
V+
OUT
V–/GND
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
Page 2
(VS = +5 V, –408C < TA < +858C unless otherwise noted.
SSM2135–SPECIFICA TIONS
Typical specifications apply at TA = +258C.)
Parameter Symbol Conditions Min Typ Max Units
AUDIO PERFORMANCE
Voltage Noise Density e Current Noise Density i
n
n
f = 1 kHz 5.2 nV/Hz
f = 1 kHz 0.5 pA/Hz Signal-To-Noise Ratio SNR 20 Hz to 20 kHz, 0 dBu = 0.775 V rms 121 dBu Headroom HR Clip Point = 1% THD+N, f = 1 kHz, R Total Harmonic Distortion THD+N A
= +1, VO = 1 V p-p, f = 1 kHz, 80 kHz LPF
V
R
= 10 k 0.003 %
L
= 10 k 5.3 dBu
L
RL = 32 0.005 %
DYNAMIC PERFORMANCE
Slew Rate SR R
= 2 k, TA = +25°C 0.6 0.9 V/µs
L
Gain Bandwidth Product GBW 3.5 MHz Settling Time t
S
to 0.1%, 2 V Step 5.8 µs
INPUT CHARACTERISTICS
Input Voltage Range V Input Offset Voltage V Input Bias Current I Input Offset Current I Differential Input Impedance Z
B OS
CM OS
IN
V
= 2 V 0.2 2.0 mV
OUT
VCM = 0 V, V
VCM = 0 V, V Common-Mode Rejection CMR 0 V V
Large Signal Voltage Gain A
VO
0.01 V V
= 2 V 300 750 nA
OUT
= 2 V 50 nA
OUT
4 V, f = dc 87 112 dB
CM
3.9 V, RL = 600 2V/µV
OUT
0 +4.0 V
4M
OUTPUT CHARACTERISTICS
Output Voltage Swing High V Output Voltage Swing Low V Short Circuit Current Limit I
OH
OL
SC
RL = 100 k 4.1 V
R
= 600 3.9 V
L
RL = 100 k 3.5 mV
R
= 600 3.0 mV
L
±30 mA
POWER SUPPLY
Supply Voltage Range V
S
Single Supply +4 +36 V
Dual Supply ±2 ±18 V Power Supply Rejection Ratio PSRR V Supply Current I
SY
= +4 V to +6 V, f = dc 90 120 dB
S
V
= 2.0 V, No Load
OUT
V
= +5 V 2.8 6.0 mA
S
VS = ±18 V, V
= 0 V, No Load 3.7 7.6 mA
OUT

ABSOLUTE MAXIMUM RATINGS

Supply Voltage
Single Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +36 V
Dual Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±18 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . 10 V
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range . . . . . . . . . . . –40°C to +85°C
Junction Temperature Range (T
) . . . . . . . . –65°C to +150°C
J
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . .+300°C

ESD RATINGS

883 (Human Body) Model . . . . . . . . . . . . . . . . . . . . . . . 1 kV
EIAJ Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175 V

THERMAL CHARACTERISTICS

Thermal Resistance
8-Lead Plastic DIP θ
S
8-Lead SOIC θ
1
θJA is specified for worst case conditions, i.e., θJA is specified for device in
socket for P-DIP and device soldered in circuit board for SOIC package.
1
JA
θ
JC JA
θ
JC

ORDERING GUIDE

Temperature Package Package
Model Range Description Option
SSM2135P –40°C to +85°C 8-Lead Plastic DIP N-8 SSM2135S –40°C to +85°C 8-Lead SOIC SO-8
–2–
103°C/W 43°C/W 158°C/W 43°C/W
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+5V
10
0.1
0.001 10 100 10k1k
1
0.01
LOAD RESISTANCE –
THD – %
VS = +5V A
V
=
+1, ƒ = 1kHz
V
IN
=
1Vp-p
R
L
= 10k
WITH 80kHz FILTER
1
0.001 020 6040
0.01
10
0.1
30 50
VS = +5V R
L
=
100k
V
OUT
=
2.5Vp-p
ƒ = 1kHz WITH 80kHz FILTER
GAIN – dB
THD+N – %
NONINVERTING
INVERTING
500µF +
R
L
+2.5Vdc
Figure 1. Test Circuit for Figures 2–4
SSM2135
Figure 4. THD+N vs. Load (See Test Circuit)
Figure 2. THD+N vs. Amplitude (See Test Circuit; AV = +1, V
= +5 V, f = 1 kHz, with 80 kHz Low-Pass Filter)
S
Figure 3. THD+N vs. Frequency (See Test Circuit;
= +1, VIN = 1 V p-p, with 80 kHz Low-Pass Filter)
A
V
Figure 5. THD+N vs. Gain
1
0.1
THD+N – %
0.01
0.001 51525
10 3020
SUPPLY VOLTAGE – V
Figure 6. THD+N vs. Supply Voltage
VS = +5V
+1, ƒ = 1kHz
A
V
=
1Vp-p
V
IN
= = 10k
R
L
WITH 80kHz FILTER
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SSM2135
Figure 7. SMPTE Intermodulation Distortion (AV = +1,
= +5 V, f = 1 kHz, RL = 10 kΩ)
V
S
1s
100
90
5
VS = +5V T
= +25°C
4
3
Hz
– pA/
n
i
2
1
0
110 1k100
FREQUENCY – Hz
A
Figure 10. Current Noise Density vs. Frequency
10
0%
Figure 8. Input Voltage Noise (20 nV/div)
30
25
20
Hz
15
– nV/
n
e
10
5
0
110 1k100
FREQUENCY – Hz
VS = +5V TA = +25°C
Figure 9. Voltage Noise Density vs. Frequency
Figure 11. Frequency Response (AV = +1, VS = +5 V, V
= 1 V p-p, RL = 10 kΩ)
IN
100
90
10 0%
500mV
1µS
Figure 12. Square Wave Response (VS = +5 V, AV = +1, R
= ∞)
L
–4–
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60
50
30
–20
10k 10M1M100k1k
40
10
20
–10
0
FREQUENCY – Hz
CLOSED-LOOP GAIN – dB
VS = +5V TA = +25°C
AV = +100
AV = +10
AV = +1
100
40
–20
10k 10M1M100k1k
20
0
60
80
FREQUENCY – Hz
OPEN-LOOP GAIN – dB
90
225
135
180
45
0
PHASE – Degrees
VS = +5V TA = +25°C
GAIN
PHASE
θm = 57°
VS = +5V
40
TA = +25°C
20
0 –20
–40
–60
–80
CHANNEL SEPARATION – dB
–100
–120
SSM2135
105
Figure 14. Common-Mode Rejection vs. Frequency
10 100 10M1M100k10k1k
FREQUENCY – Hz
Figure 13. Crosstalk vs. Frequency (RL = 10 kΩ)
140
120
100
80
60
40
COMMON-MODE REJECTION – dB
20
0
140
120
100
80
60
PSRR – dB
40
20
0
–20
10 100 1M100k10k1k
1k 1M100k10k100
FREQUENCY – Hz
–PSRR
FREQUENCY – Hz
VS = +5V TA = +25°C
VS = +5V A
= +1
V
T
= +25°C
A
+PSRR
Figure 15. Power Supply Rejection vs. Frequency
Figure 16. Closed-Loop Gain vs. Frequency
Figure 17. Open-Loop Gain and Phase vs. Frequency
50
VS = +5V
45
RL = 2k VIN = 100mVp–p
40
TA = +25°C
35
AV = +1 30
25
20
OVERSHOOT – %
15
10
5
0
0
100
NEGATIVE EDGE
POSITIVE EDGE
LOAD CAPACITANCE – pF
400300200
500
Figure 18. Small Signal Overshoot vs. Load Capacitance
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–5–
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SSM2135
50
VS = +5V
45
T
= +25°C
A
40
35
30
25
20
IMPEDANCE –
15
10
5
0
10 100 1M100k10k1k
A
= +100
VCL
FREQUENCY – Hz
A
= +10
VCL
A
= +1
VCL
Figure 19. Output Impedance vs. Frequency
5
VS = +5V T
= +25°C
A
4
A
= +1
V
ƒ = 1kHz THD+N = 1%
3
2
40
VS = +5V
35
A
= +1
V
R
= 10k
L
ƒ = 1kHz
30
THD+N = 1%
= +25°C
T
A
25
20
15
10
OUTPUT VOLTAGE – Volts
5
0
05 40353025201510
SUPPLY VOLTAGE – Volts
Figure 22. Output Swing vs. Supply Voltage
5.0
4.5
4.0
+SWING R
= 2k
L
+SWING R
= 600
L
VS = +5.0V
–SWING
= 2k
R
L
2.0
1.5
1.0
MAXIMUM OUTPUT – Volts
1
0
1 10 100k10k1k100
LOAD RESISTANCE –
Figure 20. Maximum Output Voltage vs. Load Resistance
6
5
4
3
2
MAXIMUM OUTPUT SWING – Volts
1
0
10k 10M1M100k1k
FREQUENCY – Hz
VS = +5V RL = 2k TA = +25°C AV = +1
Figure 21. Maximum Output Swing vs. Frequency
3.5
POSITIVE OUTPUT SWING – Volts
3.0 –75
–50
TEMPERATURE – °C
–SWING R
= 600
L
75 10050250–25
125
0.5
0
Figure 23. Output Swing vs. Temperature and Load
2.0 VS = +5V +0.5V V
1.5
1.0
SLEW RATE – V/µs
0.5
0
–75
–50
+4.0V
OUT
TEMPERATURE – °C
+SLEW RATE
–SLEW RATE
75 10050250–25
125
Figure 24. Slew Rate vs. Temperature
NEGATIVE OUTPUT SWING – Volts
–6–
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SSM2135
5
0
125
3
1
–50
2
4
1007550250–25
TEMPERATURE – °C
SUPPLY CURRENT – mA
VS = ±18V
VS = ±15V
VS = +5.0V
–75
500
0
125
300
100
–50
200
400
1007550250–25
TEMPERATURE – °C
INPUT BIAS CURRENT – nA
VS = ±15V
VS = +5.0V
–75
20
18
16
14
12
10
8
6
OPEN-LOOP GAIN – V/µV
4 2
0
–75
–50
RL = 2k
RL = 600
TEMPERATURE – °C
VS = +5.0V
= 3.9V
V
O
1007550250–25
Figure 25. Open-Loop Gain vs. Temperature
70
VS = +5V
65
GBW
60
θm
125
Figure 27. Supply Current vs. Temperature
5
4
3
PHASE MARGIN – Degrees
Figure 26. Gain Bandwidth Product and Phase Margin vs. Temperature

APPLICATION INFORMATION

The SSM2135 is a low voltage audio amplifier that has exceptionally low noise and excellent sonic quality even when driving loads as small as 25 . Designed for single supply use, the SSM2135’s inputs common-mode and output swing to zero volts. Thus with a supply voltage at +5 V, both the input and output will swing from 0 V to +4 V. Because of this, signal dynamic range can be optimized if the amplifier is biased to a +2 V reference rather than at half the supply voltage.
The SSM2135 is unity-gain stable, even when driving into a fair amount of capacitive load. Driving up to 500 pF does not cause any instability in the amplifier. However, overshoot in the frequency response increases slightly.
The SSM2135 makes an excellent output amplifier for +5 V only audio systems such as a multimedia workstation, a CD output amplifier, or an audio mixing system. The amplifier has large output swing even at this supply voltage because it is designed to swing to the negative rail. In addition, it easily drives load impedances as low as 25 with low distortion.
55
50
–75
–50
TEMPERATURE – °C
2
GAIN-BANDWIDTH PRODUCT – MHz
1
75 10050250–25
125
Figure 28. Input Bias Current vs. Temperature
The SSM2135 is fully protected from phase reversal for inputs going to the negative supply rail. However, an internal ESD protection diodes will turn “on” when either input is forced more than 0.5 V below the negative rail. Under this condition, input current in excess of 2 mA may cause erratic output behavior, in which case a current limiting resistor should be included in the offending input if phase integrity is required with excessive input voltages. A 500 or higher series input resistor will prevent phase inversion even with the input pulled 1 volt below the negative supply.
“Hot” plugging the input to a signal generally does not present a problem for the SSM2135, assuming the signal does not have any voltage exceeding the device’s supply voltage. If so, it is advisable to add a series input resistor to limit the current, as well as a Zener diode to clamp the input to a voltage no higher than the supply.
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SSM2135

APPLICATION CIRCUITS

A Low Noise Stereo Headphone Driver Amplifier
Figure 29 shows the SSM2135 used in a stereo headphone driver for multimedia applications with the AD1848, a 16-bit stereo codec. The SSM2135 is equally well suited for the serial­bused AD1849 stereo codec. The headphone’s impedance can be as low as 25 , which covers most commercially available high fidelity headphones. Although the amplifier can operate at up to ±18 V supply, it is just as efficient powered by a single +5 V. At this voltage, the amplifier has sufficient output drive to deliver distortion-free sound to a low impedance headphone.
L
GND
V
AD1848
R
OUT
V
OUT
REF
40
35/36
CC
34/37
32
41
10k
+5V
0.1µF
0.1µF
10k
10µF
8.66k
2
3
5 6
SSM2135
8
0.1µF
SSM2135
4
8.66k
1
1/2
10µF
7
1/2
470µF
L CH
R CH
AGND
470µF
Figure 29. A Stereo Headphone Driver for Multimedia Sound Codec
Figure 30 shows the total harmonic distortion characteristics versus frequency driving into a 32 load, which is a very typical impedance for a high quality stereo headphone. The SSM2135 has excellent power supply rejection, and as a result, is tolerant of poorly regulated supplies. However, for best sonic quality, the power supply should be well regulated and heavily bypassed to minimize supply modulation under heavy loads. A minimum of 10 µF bypass is recommended.
A Low Noise Microphone Preamplifier
The SSM2135’s 4.7 nV/Hz input noise in conjunction with low distortion makes it an ideal device for amplifying low level signals such as those produced by microphones. Figure 31 illus­trates a stereo microphone input circuit feeding a multimedia sound codec. As shown, the gain is set at 100 (40 dB), although it can be set to other gains depending on the microphone output levels. Figure 32 shows the preamplifier’s harmonic distortion performance with 1 V rms output while operating from a single +5 V supply.
The SSM2135 is biased to 2.25 V by the V
pin of the
REF
AD1848 codec. The same voltage is buffered by the 2N4124 transistor to provide “phantom power” to the microphone. A typical electret condenser microphone with an impedance range of 100 to 1 k works well with the circuit. This power booster circuit may be omitted for dynamic microphone elements.
10k
+5V
L CHANNEL
MIC IN
R CHANNEL
MIC IN
2k
+5V
2N4124
2k
100
10µF
10k
10k
10µF
100
2
3
5 6
4
10µF
10k
10µF
8
1
1/2
SSM2135
7
1/2
SSM2135
+5V
0.1µF
0.1µF
35/36
34/37
29
32
28
LMIC V
CC
GND
V
REF
AD1848
RMIC
Figure 31. Low Noise Microphone Preamp for Multimedia Sound Codec
Figure 30. Headphone Driver THD+N vs. Frequency into a
Load (VS = +5 V, with 80 kHz Low-Pass Filter)
32
Figure 32. MIC Preamp THD+N Performance (VS = +5 V,
= 40 dB, V
A
V
= 1 V rms, with 80 kHz Low-Pass Filter)
OUT
–8–
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SSM2135
An 18-Bit Stereo CD-DAC Output Amplifier
The SSM2135 makes an ideal single supply stereo output amplifier for audio D/A converters because of its low noise and distortion. Figure 33 shows the implementation of an 18-bit ste­reo DAC channel. The output amplifier also provides low-pass filtering for smoothing the oversampled audio signal. The filter’s cutoff frequency is set at 22.5 kHz and it has a maximally flat response from dc to 20 kHz.
As mentioned above, the amplifier’s outputs can drive directly into a stereo headphone that has impedance as low as 25 with no additional buffering required.
+5V SUPPLY
18-BIT
V
DAC
1
L
LL
2
18-BIT
SERIAL
DL
3
REG.
CK
4
DR
5
LR
6
DGND
7
VBR
8
18-BIT
SERIAL
REG.
18-BIT
DAC
AD1868
VBL
16
15
7.68k
14
VOL
VOR
330pF
13
12
11
10
7.68k
9
V
S
330pF
V
REF
AGND
V
REF
9.76k
9.76k
1/2
SSM2135
3
2
7.68k
7.68k
6
5
8
4
100pF
100pF
1/2
SSM2135
220µF
LEFT
47k
220µF
47k
CHANNEL OUTPUT
RIGHT CHANNEL OUTPUT
1
7
Figure 33. +5 V Stereo 18-Bit DAC
A Single Supply Differential Line Driver
Signal distribution and routing is often required in audio systems, particularly portable digital audio equipment for professional applications. Figure 34 shows a single supply line driver circuit that has differential output. The bottom amplifier provides a 2 V dc bias for the differential amplifier in order to maximize the output swing range. The amplifier can output a maximum of 0.8 V rms signal with a +5 V supply. It is capable of driving into 600 line termination at a reduced output amplitude.
1k
+5V
10µF+0.1µF
2
8
AUDIO
100µF
IN
1k
10k
2.0V
1µF
1
3
4
6 5
2.5k
0.1µF
100
1/2
SSM2135
1k
7
1/2
SSM2135
1/2
SSM2135
DIFFERENTIAL AUDIO OUT
+5V
8
1
+5V
2
7.5k
3
4
5k
A Single Supply Differential Line Receiver
Receiving a differential signal with minimum distortion is achieved using the circuit in Figure 35. Unlike a difference amplifier (a subtractor), the circuit has a true balanced input impedance regardless of input drive levels. That is, each input always presents a 20 k impedance to the source. For best common-mode rejection performance, all resistors around the differential amplifier must be very well matched. Best results can be achieved using a 10 k precision resistor network.
10k
+5V
10µF+0.1µF
20k
2
8
1
3
1/2
1µF
2.0V
10k
6 5
100
0.1µF
2.5k
20k
7
1/2
SSM2135
+5V
8
1
4
SSM2135
10
1/2
10µF
AUDIO OUT
7.5k
3 2
+5V
5k
DIFFERENTIAL
AUDIO IN
20k
SSM2135
4
Figure 35. Single Supply Balanced Differential Line Receiver
A Pseudo-Reference Voltage Generator
For single supply circuits, a reference voltage source is often required for biasing purposes or signal offsetting purposes. The circuit in Figure 36 provides a supply splitter function with low output impedance. The 1 µF output capacitor serves as a charge reservoir to handle a sudden surge in demand by the load as well as providing a low ac impedance to it. The 0.1 µF feedback capacitor compensates the amplifier in the presence of a heavy capacitive load, maintaining stability.
The output can source or sink up to 12 mA of current with +5 V supply, limited only by the 100 output resistor. Reduc­ing the resistance will increase the output current capability. Alternatively, increasing the supply voltage to 12 V also improves the output drive to more than 25 mA.
+
V
= +5V +12V
5k
5k
S
R1
8
2
1/2
SSM2135
3
R2
4
C1
0.1µF
1
R3
2.5k
R4
100
C2 1µF
V
2
+
S
OUTPUT
Figure 34. Single Supply Differential Line Driver
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Figure 36. Pseudo-Reference Generator
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SSM2135
A Digital Volume Control Circuit
Working in conjunction with the AD7528/PM7528 dual 8-bit D/A converter, the SSM2135 makes for an efficient audio attenuator, as shown in Figure 37. The circuit works off a single +5 V supply. The DAC’s are biased to a 2 V reference level which is sufficient to keep the DAC’s internal R-2R ladder switches operating properly. This voltage is also the optimal midpoint of the SSM2135’s common-mode and output swing range. With the circuit as shown, the maximum input and output swing is 1.25 V rms. Total harmonic distortion measures a respectable 0.01% at 1 kHz and 0.1% at 20 kHz. The fre­quency response at any attenuation level is flat to 20 kHz.
Each DAC can be controlled independently via the 8-bit parallel data bus. The attenuation level is linearly controlled by the binary weighting of the digital data input. Total attenuation ranges from 0 dB to 48 dB.
3
2.0V
+5V
10µF+0.1µF
2
2
8
3
4
SSM2135
19
SSM2135
6
20 1
5
0.1µF
100
1
1/2
1/2
7
2k
+5V
8
1
4
SSM2135
1/2
47µF
47µF
2
3
2.0V
L AUDIO OUT
R AUDIO OUT
+5V
7.5k
5k
L AUDIO
DATA IN
CONTROL
SIGNAL
R AUDIO
AD/PM-7528
47µF
47µF
4
6 15 16
18
DACA/ DACB
CS
WR
17 5
IN
IN
REF A
DAC A
REF B
DAC B
V
DD
+5V
0.1µF
FB
OUTA
FB
OUTB
DGND
1µF
A Logarithmic Volume Control Circuit
Figure 38 shows a logarithmic version of the volume control function. Similar biasing is used. With an 8-bit bus, the AD7111 provides an 88.5 dB attenuation range. Each bit resolves a 0.375 dB attenuation. Refer to AD7111 data sheet for attenuation levels for each input code.
+5V
L AUDIO
R AUDIO
DATA IN & CONTROL
0.1µF
31416
47µF
DGND
15
V
10
47µF
10
10
DGND
15
V
IN
AD7111
0.1µF
31416
IN
AD7111
IN
IN
V
+5V
V
DD
DD
FB
OUTA
AGND
FB
OUTA
AGND
2.0V
1µF
+5V
10µF+0.1µF
2
1
2
1
2
3
6
5
0.1µF
100
8
1
1/2
SSM2135
4
1/2
SSM2135
7
2k
1
+5V
8
4
1/2
SSM2135
47µF
47µF
2
3
L AUDIO OUT
R AUDIO OUT
+5V
7.5k
5k
Figure 38. Single Supply Logarithmic Volume Control
Figure 37. Digital Volume Control
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SSM2135

SPICE MACROMODEL

*
SSM2135 SPICE Macro-Model 9/92, Rev. A * JCB/ADI *Copyright 1993 by Analog Devices, Inc. * *Node Assignments * * Noninverting Input * Inverting Input * Positive Supply * Negative Supply * Output
.SUBCKT SSM2135 32746 * * INPUT STAGE R3 4 19 1.5E3 R4 4 20 1.5E3 C1 19 20 5.311E–12 I1 7 18 106E–6 IOS 2 3 25E–09 EOS 12 5 POLY(1) 51 4 25E–06 1 Q1 19 3 18 PNP1 Q2 20 12 18 PNP1 CIN 3 2 3E–12 D131DY D221DY EN522201 GN1 0 2 25 0 1E–5 GN2 0 3 28 0 1E–5 * * VOLTAGE NOISE SOURCE WITH FLICKER NOISE DN1 21 22 DEN DN2 22 23 DEN VN1 21 0 DC 2 VN2 0 23 DC 2 * * CURRENT NOISE SOURCE WITH FLICKER NOISE DN3 24 25 DIN DN4 25 26 DIN VN3 24 0 DC 2 VN4 0 26 DC 2 * * SECOND CURRENT NOISE SOURCE DN5 27 28 DIN DN6 28 29 DIN VN5 27 0 DC 2 VN6 0 29 DC 2 * * GAIN STAGE & DOMINANT POLE AT .2000E+01 HZ G2 34 36 19 20 2.65E–04 R7 34 36 39E+06 V3 35 4 DC 6 D4 36 35 DX VB2 34 4 1.6 * * SUPPLY/2 GENERATOR ISY 7 4 0.2E–3 R10 7 60 40E+3 R11 60 4 40E+3 C3 60 0 1E–9 *
* CMRR STAGE & POLE AT 6 kHZ ECM 50 4 POLY(2) 3 60 2 60 0 1.6 1.6 CCM 50 51 26.5E–12 RCM1 50 51 1E6 RCM2 51 4 1 * * OUTPUT STAGE R12 37 36 1E3 R13 38 36 500 C4 37 6 20E–12 C5 38 39 20E–12 M1 39 36 4 4 MN L=9E–6 W=1000E–6 AD=15E–9 AS=15E–9 M2 45 36 4 4 MN L=9E–6 W=1000E–6 AD=15E–9 AS=15E–9 5 3947DX D6 47 45 DX Q3 39 40 41 QPA 8 VB 7 40 DC 0.861 R14 7 41 375 Q4 41 7 43 QNA 1 R17 7 43 15 Q5 43 39 6 QNA 20 Q6 46 45 6 QPA 20 R18 46 4 15 Q7 36 46 4 QNA 1 M3 6 36 4 4 MN L=9E–6 W=2000E–6 AD=30E–9 AS=30E–9 * * NONLINEAR MODELS USED
*
.MODEL DX D (IS=1E–15) .MODEL DY D (IS=1E–15 BV=7) .MODEL PNP1 PNP (BF=220) .MODEL DEN D(IS=1E–12 RS=1016 KF=3.278E–15 AF=1) .MODEL DIN D(IS=1E–12 RS=100019 KF=4.173E–15 AF=1) .MODEL QNA NPN(IS=1.19E–16 BF=253 VAF=193 VAR=15 RB=2.0E3 + IRB=7.73E–6 RBM=132.8 RE=4 RC=209 CJE=2.1E–13 VJE=0.573 + MJE =0.364 CJC=1.64E–13 VJC=0.534 MJC=0.5 CJS=1.37E–12 + VJS=0.59 MJS=0.5 TF=0.43E–9 PTF=30) .MODEL QPA PNP(IS=5.21E–17 BF=131 VAF=62 VAR=15 RB=1.52E3 + IRB=1.67E 5–RBM=368.5 RE=6.31 RC=354.4 CJE=1.1E–13 + VJE=0.745 MJE=0.33 CJC=2.37E–13 VJC=0.762 MJC=0.4 + CJS=7.11E–13 VJS=0.45 MJS=0.412 TF=1.0E–9 PTF=30) .MODEL MN NMOS(LEVEL=3 VTO=1.3 RS=0.3 RD=0.3 TOX=8.5E–8 + LD=1.48E–6WD=1E–6 NSUB=1.53E16UO=650 DELTA= 10VMAX=2E5 + XJ=1.75E–6 KAPPA=0.8 ETA=0.066 THETA=0.01TPG=1 CJ=2.9E–4 + PB=0.837 MJ=0.407 CJSW=0.5E–9 MJSW=0.33) * .ENDS SSM-2135
REV. D
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SSM2135
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Plastic DIP (N-8)
0.160 (4.06)
0.115 (2.93)
0.2440 (6.20)
0.2284 (5.80)
0.210 (5.33)
MAX
8
1
0.430 (10.92)
0.022 (0.558)
0.014 (0.356)
0.348 (8.84)
0.100 (2.54)
BSC
5
4
0.280 (7.11)
0.240 (6.10)
0.070 (1.77)
0.045 (1.15)
0.015 (0.381) TYP
SEATING PLANE
0.130 (3.30) MIN
8-Lead Narrow-Body (SO-8)
58
0.1574 (4.00)
0.1497 (3.80)
1
4
0°- 15°
0.325 (8.25)
0.300 (7.62)
0.015 (0.381)
0.008 (0.204)
0.195 (4.95)
0.115 (2.93)
C1772a–10–10/97
0.0098 (0.25)
0.0040 (0.10)
0.0500 (1.27) BSC
0.1968 (5.00)
0.1890 (4.80)
0.0192 (0.49)
0.0138 (0.35)
0.0688 (1.75)
0.0532 (1.35)
SEATING
PLANE
0.0196 (0.50)
0.0099 (0.25)
0.0098 (0.25)
0.0075 (0.19)
× 45°
0.0500 (1.27)
0.0160 (0.41)
0°- 8°
PRINTED IN U.S.A.
–12–
REV. D
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