Datasheet SSH22N50A Datasheet (Fairchild)

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SSH22N50A
FEATURES
Avalanche Rugged Technology
Rugged Gate Oxide Technology
Lower Input Capacitance
Improved Gate Charge
Extended Safe Operating Area
Lower Leakage Current: 10µA (Max.) @ V
Lower R
: 0.197Ω (Typ.)
DS(ON)
Absolute Maximum Ratings
Characteristic Value UnitsSymbol
Drain-to-Source Voltage Continuous Drain Current (T Continuous Drain Current (T Drain Current-Pulsed Gate-to-Source Volta ge Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Total Power Dissipation (TC=25°C) Linear Derating Factor Operating Juncti on and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8
from case for 5-seconds
T
V
DSS
I
D
I
DM
V E
I
AR
E
dv/dt
P
, T
J
T
GS AS
AR
D
STG
L
= 500V
DS
=25°C)
C
=100°C)
C
(1)
(2) (1) (1) (3)
BV R
DSS
DS(on)
= 500 V
ID = 22 A
TO-3P
1
2
3
1.Gate 2. Drain 3. Source
500
22
13.4 88
30
±
2151
22
27.8
3.5
278
2.22
- 55 to +150
300
= 0.25
V A A
V
mJ
A
mJ
V/ns
W
W/°C
°C
Thermal Resistance
R
θJC
R
CS
θ
R
θJA
©1999 Fairchild Semiconductor Corpor ation
Characteristic Max. UnitsSymbol Typ.
Junction-to-Case
Case-to-Sink
Junction-to-Ambient
--
0.24
--
0.45
--
40
°C/W
Rev. B
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SSH22N50A
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Electrical Characteristics
CharacteristicSymbol
BV ∆BV/∆T V
I
I
R
C C t
t
DSS
GS(th)
GSS
DSS
DS(on)
g
fs
C
iss oss rss
d(on)
t
r
d(off)
t
f
Q
g
Q
gs
Q
gd
Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coeff.
J
Gate Threshold Voltage Gate-Source Leakage , Forwar d Gate-Source Leakage , Revers e
Drain-to-Sou rce Leakage Current
Static Drain-Source On-State Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain (
Miller ) Charge
(TC=25°C unless otherwise specified)
Max. UnitsTyp.Min. Test Condition
V
500
--
2.0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
0.69
--
--
--
--
--
--
17.31 3940
465 215
27 30
150
43
182
26
79.6
--
--
4.0
100
-100 10
100
0.25
--
5120
535 250
65 70
310
95
236
--
--
V
V/°C
V
nA
A
µ
pF
ns
nC
=0V,ID=250µA
GS
I
=250µA
D
VDS=5V,ID=250µA
=30V
V
GS
=-30V
V
GS
V
=500V
DS
V
=400V,TC=125°C
DS
=10V,ID=11A
V
GS
VDS=50V,ID=11A V
=0V,VDS=25V,f =1MHz
GS
See Fig 5
VDD=250V,ID=22A, R
=5.3
G
VDS=400V,VGS=10V,
=22A
I
D
See Fig 6 & Fig 12
See Fig 7
See Fig 13
(4)
(4)
(4) (5)
(4) (5)
Source-Drain Diode Ratings and Characteristics
CharacteristicSymbol Max. UnitsTyp.Min. Test Condition
I
I
SM
V
t
Q
Notes;
(1) Repetitive Rating: Pu lse Width Limited by Maximum Junction Temperatu re (2) L=8mH, I (3) I
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2% (5) Essentially Independent of Operating Temper ature
Continuous Source Current
S
Pulsed- S o u rce Curren t Diode Forward Voltage
SD
Reverse Recove ry T ime
rr
Reverse Recovery Ch arge
rr
=22A, VDD=50V, RG=27Ω, Starting TJ =25°C
AS
22A, di/dt ≤ 300A/µs, V
SD
DD
, Starting TJ =25°C
BV
DSS
--
--
22
(1)
--
(4)
--
--
--
--
528
--
8.35
88
1.4
--
--
ns
µ
A V
C
Integral reverse pn-diode in the MOSFET T
=25°C,IS=22A,VGS=0V
J
T
=25°C,IF=22A
J
di
/dt=100A/µs
F
(4)
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Fig 1. Output Characteristics Fig 2. Transfer Characteristics
V
GS
Top : 1 5 V 1 0 V
8.0 V 7 .0 V
6.0 V 5 .5 V
1
5 .0 V
10
Bott om : 4.5 V
0
, Drain C urrent [A]
10
D
I
-1
10
VDS , Drain-S ource Voltage [V]
@ Notes :
1. 250 µs Pulse Test
2. TC = 25 oC
0
10
SSH22N50A
1
10
150 oC
0
10
25 oC
, Drai n Current [A]
D
I
- 55 oC
-1
1
10
10
246810
VGS , Gate -Source Voltag e [V]
@ Notes :
1. V
2. V
3. 250
= 0 V
GS
= 50 V
DS
s Pulse Test
µ
0.60
0.45
]
, [
DS(on)
R
0.30
0.15
VGS = 10 V
VGS = 20 V
Drain-Source On-Resis tance
@ Note : TJ = 25 oC
0.00 0153045607590
ID , Drain Current [A]
Capacitanc e [pF]
6000
4000
2000
C
iss
C
oss
C
rss
0
0
10
C
= Cgs+ Cgd ( Cds= shorted )
iss
= Cds+ C
C
oss
gd
C
= C
rss
gd
@ Notes :
1. V
2. f = 1 MHz
1
10
GS
VDS , Drain-S ource Voltage [V]
= 0 V
Fig 4. Source-Drain Diode Forward VoltageFig 3. On-Resistance vs. Drain Curr ent
1
10
0
10
, Reverse Dra in Current [A]
DR
150 oC
I
25 oC
-1
10
0.40.60.81.01.21.41.61.82.02.2
@ Notes :
1. V
2. 250
= 0 V
GS
s Pulse Test
VSD , Source-Drai n Voltage [V]
Fig 6. Gate Charge vs. Gate-Source VoltageFig 5. Capacitance vs. Drain-Sour ce Voltage
10
5
, Gate -Source Voltag e [V]
GS
V
0
050100150200
VDS = 100 V
VDS = 250 V
VDS = 400 V
@ Notes : ID = 22.0 A
QG , Tota l Gate Charge [nC]
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SSH22N50A
Fig 7. Breakdown Voltage vs. Temperat ure Fig 8. On-Resistance vs. Temperature
1.2
1.1
3.0
2.5
2.0
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1.0
, (Norm alized)
DSS
BV
0.9
Drain-So urce Breakdown Volt age
0.8
-75 -50 -25 0 25 50 75 100 125 150 175
@ Notes :
1. V
2. I
TJ , Junct ion Temperature [oC]
Operation in This Area
2
10
is Limited by R
DS(on)
100 µs
1 ms
10 ms
DC
2
10
, Drain Current [A] I
1
10
0
10
D
-1
10
0
10
@ Notes :
= 25 oC
1. T
C
2. T
= 150 oC
J
3. Single Pulse
1
10
VDS , Drain -Source Voltage [V ]
= 0 V
GS
= 250 µA
D
10 µs
1.5
, (Nor malized)
1.0
DS(on)
R
0.5
Drain-Source On-Resistance
0.0
-75-50-25 0 25 50 75 100125150175
@ Notes :
1. V
2. I
= 10 V
GS
= 11.0 A
D
TJ , Junc tion Temperature [oC]
Fig 10. Max. Drain Current vs. Case TemperatureFig 9. Max. Safe Operating Area
25
20
15
10
, Drai n Current [A]
D
I
5
3
10
0
25 50 75 100125150
Tc , Case Temperature [oC]
-1
10
-2
10
(t) , Thermal Response
JC
θ
Z
-5
10
D=0.5
0.2
0.1
0.05
0.02
0.01
Fig 11. Thermal Response
@ Notes :
1. Z
2. Duty Factor, D=t1/t
(t)=0.45 oC/W Max.
JC
θ
3. TJM-TC=PDM*Z
P
DM
t
single pulse
-4
10
-3
10
-2
10
10
1
t
2
-1
10
t1 , Square Wave Pulse Durat ion [sec]
2
(t)
JC
θ
0
1
10
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SSH22N50A
Fig 12. Gate Charge Test Circuit & Waveform
12V
10V
Current Regulator
200nF
3mA
R
G
50k
300nF
V
GS
R
1
Current Sampli ng (IG)
Resistor
V
out
V
in
V
Same Type
as DUT
V
GS
Q
10V
DS
Q
gs
DUT
R
2
Current Sampli ng (ID)
Resistor
Fig 13. Resistive Switching Test Circuit & Wavefo rms
R
L
V
out
90%
10%
V
in
t
d(on)tr
t
on
DUT
V
DD
( 0.5 rated V
)
DS
g
Q
gd
Charge
t
d(off)
t
f
t
off
Vary tp to obtain required peak I
10V
Fig 14. Un clamped Inductive Switching Test Circuit & Waveforms
BV
L
DUT
L
BV
I
D
C
V
DD
DSS
I
AS
V
DD
V
DS
D
R
G
t
p
E
=LL I
AS
----
1 2
2
AS
(t)
I
D
t
p
DSS
-------------------­BV
-- V
DSS
DD
Time
V
(t)
DS
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SSH22N50A
Fig 15. Peak D iode Recovery dv/dt Test Circuit & Waveforms
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V
V
GS
( Driver )
DUT
+
V
DS
--
I
S
V
GS
GS
Driver
R
G
D =
Same Type
as DUT
dv/dt controlled by R IS control led by Duty Factor D
Gate Pulse Width
-------------------------­Gate Pulse Period
L
V
DD
G
10V
I
S
( DUT )
V
DS
( DUT )
IFM , Body Diode Forward Cu rrent
I
RM
Body Diode Reverse Current
Body Diode Recovery dv/dt
V
f
Body Diode
Forward Voltage Drop
di/dt
V
DD
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TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx™ CoolFET™ CROSSVOLT™ E2CMOS
TM
FACT™ FACT Quiet Series™
®
FAST FASTr™ GTO™ HiSeC™
ISOPLANAR™ MICROWIRE™ POP™ PowerTrench™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
Formative or In Design
First Production
Full Production
Not In Production
This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
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