Datasheet ssg4505 Datasheet

Elektronische Bauelemente

P Channel -8.4A, -30V,RDS(ON) 20m

Enhancement Mode Power Mos.FET

RoHS Compliant Product

Description

The SSG4505 provide the designer with the best combination of fast switching,

ruggedized device design, low on-resistance and cost-effectiveness.

The SOP-8 package is universally preferred for all commercial

industrial surface mount application and suited for low

voltage applications such as DC/DC converters.

Features

SSG4505

N Channel 10A, 30V,RDS(ON) 14m

SOP-8

0.19

0.25

0.40

6.20

5.80

1.27Typ.

0.35

0.49

Dimensions in millimeters

4.80

5.00

0.90

0.25

0.10~0.25

o

45

0.375 REF

3.80

4.00

1.35

o

1.75

0

o

8

Ω

Ω

* Simple Drive Requirement
* Lower On-Resistance

* Fast Switching Performance

Absolute Maximum Ratings

Parameter Symbol

Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Continuous Drain Current
Pulsed Drain Current

Total Power Dissipation
Linear Derating Factor

Operating Junction and Storage Temperature Range

3

3

1

Date Code

D1 D1 D2 D2

8

6

7

4505SS

2

1

S1 G1 S2 G2

3

VDS

VGS
ID@TA=25
ID@TA=7

IDM

PD@TA=25

Tj, Tstg

5

G1

4

Ratings

30

20

o

C

o

C

0

o

C

10

7.9 -6.7
3 3

0 - 0

2.0

0.016

-55~+150

-30

20± ±

-8.4

D1

G2

S1

D2

S2

Unit

V
V

A
A

A
W

o

W / C

o

C

Thermal Data

Parameter

Thermal Resistance Junction-ambient

http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual

01-Jan-2008 Rev. B

3

Max.

Symbol Ratings Unit

o

Rthj-a

62.5

/W C

Page 1 of 7

Elektronische Bauelemente

SSG4505

N Channel 10A, 30V,RDS(ON) 14m

P Channel -8.4A, -30V,RDS(ON) 20m

Enhancement Mode Power Mos.FET

Ω

Ω

Electrical Characteristics N Channel( Tj=25 C Unless otherwise specified)

Parameter Symbol Max.

Drain-Source Breakdown Voltage

Breakdown Voltage Temp. Coefficient
Gate Threshold Voltage
Gate-Source Leakage Current
Drain-Source Leakage Current (Tj=25 )

Drain-Source Leakage Current (Tj=70

Static Drain-Source On-Resistance

Total Gate Charge

2

o

C

o

)

C

2

Gate-Source Charge
Gate-Drain ("Miller") Charge
Turn-on Delay Time

2

Rise Time
Turn-off Delay Time
Fall Time
Input Capacitance

Output Capacitance
Reverse Transfer Capacitance

Forward Transconductance

BVDSS

BVDS/ Tj

VGS(th)

IGSS

IDSS

RDS(ON)

Qg
Qgs
Qgd

Td(ON)

Tr

(Off)

Td

T

f

Ciss
Coss

Crss

Gfs

o

Min. Unit

30

_

1.0

_

_

_

_

_

_
_
_

_

_

_

_

_

_

_

_

_

_

Typ.

_

0.02

_

_
_

_

_

_

23

6

14
14
10

36
17

1770

430

350

_

_

3.0

±

100

1

25

14
20

65

_

_

_

_

_

_

2830

_

_

_

V

o

V/

V

nA

uA

uA

Ω

m

nC

nS

pF

S14

Test Condition

VGS=0V, ID=250uA

Reference to 25 , ID=1mA

C

VDS=VGS, ID=250uA

VGS= 20V

VDS=30V,VGS=0

VDS=24V,VGS=0
VGS=10V, ID=6A

VGS=4.5V,

ID=9A

VDS=24V

VGS=4.5V

VDD=15V
ID=1A
VGS=10V
RG=3.3
RD=15

VGS=0V
VDS=25V

f=1.0MHz

VDS=10V, ID=9A

o

C

±

ID=4A

Ω

Ω

Source-Drain Diode

Parameter Symbol Max.

Forward On Voltage

Reverse Recovery Time

Reverse Recovery Charge

Notes: 1.Pulse width limited by Max. junction temperature.

2.Pulse width 300us, dutycycle 2%.

3.Surface mounted on 1 inch2 copper pad of FR4 board;135 when mounted on min. copper pad.

http://www.SeCoSGmbH.com/

01-Jan-2008 Rev. B

2

≦

≦

Min. Unit

V

SD

_

Trr
Qrr

Any changing of specification will not be informed individual

_

°C/W

Typ.

31
25

__

1.2

_

_

IS=1.7A, VGS=0V

V

nS

IS=9A,V GS=0V
dl/dt=100A/us

nC

Test Condition

Page 2 of 7

Elektronische Bauelemente

SSG4505

N Channel 10A, 30V,RDS(ON) 14m

P Channel -8.4A, -30V,RDS(ON) 20m

Enhancement Mode Power Mos.FET

Ω

Ω

Typ.

_

-0.02

_

_
_

_

_

_

27

4

18
16
11
40

25

1580

540

450

14

_

_

-3.0

±

100

-1

-25
20

30

45

_

_

_

_

_

_

2530

_

_

_

Unit

V

o

V/

V

nA

uA

uA

Ω

m

nC

nS

pF

S

Test Condition

VGS=0V, ID=-250uA

Reference to 25 , ID=-1mA

C

VDS=VGS, ID=-250uA

VGS= 20V

VDS=-30V,VGS=0

VDS=-24V,VGS=0

VGS=-10V, ID=-8A

VGS=-4.5V, ID=-4A

ID=-8A

VDS=-24V

VGS=-4.5V

VDS=-15V

ID=-1A
VGS=-10V
RG=3.3

RD=15

VGS=0V
VDS=-25V

f=1.0MHz

VDS=-10V, ID=-8A

Electrical Characteristics P-Channel( Tj=25 C Unless otherwise specified)

Parameter Symbol Max.

BVDS/ Tj

BVDSS

VGS(th)

IGSS

IDSS

RDS(ON)

Qg

Qgs
Qgd

Td(ON)

Tr

(Off)

Td

T

f
Ciss
Coss

Crss

Gfs

Drain-Source Breakdown Voltage

Breakdown Voltage Temp. Coefficient
Gate Threshold Voltage
Gate-Source Leakage Current
Drain-Source Leakage Current (Tj=25 )

Drain-Source Leakage Current (Tj=70

Static Drain-Source On-Resistance

Total Gate Charge

2

o

C

o

C

)

2

Gate-Source Charge
Gate-Drain ("Miller") Charge

Turn-on Delay Time

2

Rise Time
Turn-off Delay Time
Fall Time
Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

Forward Transconductance

o

Min.

-30

_

-1.0

_

_

_
_

_

_

_

_

_

_

_

_

_

_

_

_

_

o

C

±

Ω

Ω

Source-Drain Diode

Parameter Symbol Max.

Forward On Voltage

2

Reverse Recovery Time
Reverse Recovery Charge

Notes: 1.Pulse width limited by Max. junction temperature.

2.Pulse width 300us, dutycycle 2%.

≦

≦

3.Surface mounted on 1 inch2 copper pad of FR4 board;135 when mounted on min. copper pad.

http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual

01-Jan-2008 Rev. B

V

SD

Trr
Qrr

Min. Unit

_

_

°C/W

Typ.

__

40

32

-1.2

_

_

V

nS
nC

Test Condition

IS=-1.7A, VGS=0V

IS=-8A,VGS=0V
dl/dt=100A/us

Page 3 of 7

Elektronische Bauelemente

Characteristics Curve N-Channel

Fig 1. Typical Output Characteristics

SSG4505

N Channel 10A, 30V,RDS(ON) 14m

P Channel -8.4A, -30V,RDS(ON) 20m

Enhancement Mode Power Mos.FET



Fig 2. Typical Output Characteristics

Ω

Ω

Fig 3. On-Resistance v.s. Gate Voltage

Fig 4. Normalized On-Resistance

v.s. Junction Temperature

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01-Jan-2008 Rev. B

Fig 5. Forward Characteristics of
Reverse Diode

Fig 6. Gate Threshold Voltage v.s.

Junction Temperature

Page 4 of 7

Elektronische Bauelemente

N-Channel



SSG4505

N Channel 10A, 30V,RDS(ON) 14m

P Channel -8.4A, -30V,RDS(ON) 20m

Enhancement Mode Power Mos.FET

Fig 8. Typical Capacitance CharacteristicsFig 7. Gate Charge Characteristics

Ω

Ω

Fig 10. Effective Transient Thermal ImpedanceFig 9. Maximum Safe Operating Area

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01-Jan-2008 Rev. B

Fig 11. Switching Time Waveform

Fig 12. Gate Charge Waveform

Page 5 of 7

P-Channel

GND

Elektronische Bauelemente

Enhancement Mode Power Mos.FET

Description

SSG4505

N Channel 10A, 30V,RDS(ON) 14m

P Channel -8.4A, -30V,RDS(ON) 20m

Ω

Ω

Typically a large storage capacitor is connected from this pin to ground to insure that the input

Fig 1. Typical Output Characteristics

Fig 2. Typical Output Characteristics

Fig 3. On-Resistance v.s. Gate Voltage

Fig 4. Normalized On-Resistance

v.s. Junction Temperature

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01-Jan-2008 Rev. B

Fig 5. Forward Characteristics of
Reverse Diode

Fig 6. Gate Threshold Voltage v.s.

Junction Temperature

Page 6 of 7

Elektronische Bauelemente

P-Channel

SSG4505

N Channel 10A, 30V,RDS(ON) 14m

P Channel -8.4A, -30V,RDS(ON) 20m

Enhancement Mode Power Mos.FET

Ω

Ω

Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics

Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance

Fig 11. Switching Time Waveform Fig 12. Gate Charge Waveform

h tp://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual

01-Jan-2008 Rev. B

Page 7 of 7