Page 1
r
Elektronische Bauelemente
RoHS Compliant Product
A suffix of “-C” specifies halogen free
DESCRIPTION
These miniature surface mount MOSFETs utilize a high
cell density trench process to provide low R
DS(on)
and to
ensure minimal power loss and heat dissipation.
FEATURES
Low R
battery life
Low thermal impedance copper leadframe TO-252
saves board space
Fast switching speed
High performance trench technology
provides higher efficiency and extends
DS(on)
APPLICATION
DC-DC converters and power management in portable
and battery-powered products such as computers, printers,
PCMCIA cards, cellular and cordless telephones.
PACKAGE INFORMATION
Package MPQ LeaderSize
TO-252 2.5K 13’ inch
SSD30N10-50D
26A, 100V, R
N-Ch Enhancement Mode Power MOSFET
M
REF.
50mΩ
DS(ON)
TO-252(D-Pack)
A
B
G E
FHK
J
Millimeter
Min. Max. Min. Max.
A 6.4 6.8 J 2.30 REF.
B 5.20 5.50 K 0.70 0.90
C 2.20 2.40 M 0.50 1.1
D 0.45 0.58 N 0.9 1.6
E 6.8 7.3 O 0 0.15
F 2.40 3.0 P 0.43 0.58
G 5.40 6.2
H 0.8 1.20
REF.
Millimete
C
D
N
O
P
Drain
Gate
ABSOLUTE MAXIMUM RATINGS (T
Parameter Symbol Ratings Unit
Drain-Source Voltage VDS 100 V
Gate-Source Voltage VGS ±20 V
Continuous Drain Current
Pulsed Drain Current
Continuous Source Current (Diode Conduction) 1 I
Power Dissipation 1 T
Operating Junction and Storage Temperature Range TJ, T
Maximum Thermal Resistance Junction-Ambient 1 R
Maximum Thermal Resistance Junction-Case R
Notes:
1. Surface Mounted on 1” x 1” FR4 Board.
2. Pulse width limited by maximum junction temperature.
1
T
2
IDM 36 A
= 25°C unless otherwise specified)
A
=25℃ I
C
=25℃ P
C
20 A
D
30 A
S
50 W
D
-55 ~ 175 °C
STG
Thermal Resistance Ratings
50 °C / W
θJA
3.0 °C / W
θJC
Source
http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually.
04-Mar-2011 Rev. A Page 1 of 2
Page 2
SSD30N10-50D
26A, 100V, R
Elektronische Bauelemente
N-Ch Enhancement Mode Power MOSFET
DS(ON)
50mΩ
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise specified)
A
Parameter Symbol Min. Typ. Max. Unit Test conditions
Static
Gate-Source Threshold Voltage V
Gate-Body Leakage I
GS(th)
- - ±100 nA VDS=0, VGS=20V
GSS
1.0 - - V VDS=VGS, ID=250μA
- - 1
Zero Gate Voltage Drain Current I
DSS
- - 25
On-State Drain Current 1 I
34 - - A VDS=5V, VGS=10V
D(ON)
- - 50
Drain-Source On-Resistance 1 R
DS(ON)
- - 59 VGS=4.5V, ID=6.1A
Forward Transconductance 1 g
Diode Forward Voltage V
fs
SD
- 4.4 - S VDS=40V, ID=5.5A
- 1.1 - V IS=9A, VGS=0
Dynamic 2
Total Gate Charge Qg - 25 -
Gate-Source Charge Qgs - 5 -
Gate-Drain Change Q
- 19 -
gd
VDS=80V, VGS=0
μA
V
DS
TJ=55°C
V
GS
mΩ
I
= 9 A
D
nC
V
DS
VGS= 10 V
=80V, VGS=0,
=10V, ID=9.2A
= 25 V
Turn-on Delay Time T
- 9 -
d(on)
Rise Time Tr - 15 -
Turn-off Delay Time T
- 45 -
d(off)
Fall Time Tf - 39 -
Notes:
1. Pulse test： PW ≦ 300 us duty cycle ≦ 2％.
2. Guaranteed by design, not subject to production testing.
nS
=100V
V
DD
ID= 9A
= 25
R
L
V
= 10V
GEN
http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually.
04-Mar-2011 Rev. A Page 2 of 2
Loading...