Datasheet SSD2007A Datasheet (Fairchild Semiconductor)

Page 1
Dual N-CHANNEL POWER MOSFET
SSD2007A
FEATURES
! Extremely Lower R ! Improved Inductive Ruggedness ! Fast Switching Times ! Rugged Polysilicon Gate Cell Structure ! Low Input Capacitance ! Extended Safe Operating Area ! Improved High Temperature Reliability ! Surface Mounding Package : 8SOP
DS(ON)
Absolute Maximum Ratings
Characteristic Value UnitsSymbol
V
DSS
V
DGR
V
GS
I
D
I
D
I
DM
P
D
T
, T
J
STG
T
L
Drain-to-Source Voltage(1) Drain-Gate Voltage(R
=1.0MΩ)(1)
GS
Gate-to-Source Voltage Continuous Drain Current T Continuous Drain Current TA=100℃ Drain Current-Pulsed (2) Total Power Dissipation T
Operating and Storage Junction Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/16” from case for 5 seconds
A
T
A
=25℃
A
=25℃ =70℃
8 SOP
G1 ,G
- 55 to +150
1
S
1
2
1
3
S
2
4
2
Top View
D1,D
2
N-Channel MOSFET
▼
▼
▼
50 50
±20
2.0
1.6
8.0
2.0
1.3
300
8
D
1
7
D
1
6
D
2
5
D
2
D1,D
S1 ,S
2
▼
2
2
V V V A A V
W
℃
Notes ;
(1) T
℃ to 150℃
= 25
J
(2) Repetitive Rating : Pulse Wi dth Lim i ted by Max. Junction Temperature
Rev. A
Page 2
SSD2007A
Dual N-CHANNEL
POWER MOSFET
Electrical Characteristics
CharacteristicSymbol
BV V
I
I
I
R
t
t
GS(th)
GSS
DSS
DON
DS(on)
g
d(on)
d(off)
Q Q Q
Drain-Source Breakdown Voltage
DSS
Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse
Drain-to-Source Leakage Current
On-State Drain-Source Current(2) Static Drain-Source On-State Resistance(2) Forward Transconductance
fs
Turn-On Delay Time
t
Rise Time
r
Turn-Off Delay Time
t
Fall Time
f
Total Gate Charge
g
Gate-Source Charge
gs
Gate-Drain (“Miller”) Charge
gd
(TA=25℃ unless otherwise specified)
Max. UnitsTyp.Min. Test Condition
V
600
2.0
--
--
--
--
8.0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
2.5
--
--
--
--
--
1.0
2.0
--
4.0
1.0
-1.0 2
25
--
0.3
0.5
--
40 70
100
70 15
--
--
V V
μA
μA
μA
AV
Ω
S
ns
nC
=0V,ID=250μA
GS
V
= VGS,ID=250μA
DS
V
=20V
GS
V
=-20V
GS
V
=50V
DS
VDS=40V,TJ=55℃
=10V,VDS=5V
GS
V
=10V,ID=1.5A
GS
V
=5.0V,ID=0.6A
GS
VDS≥15V,ID=2.0A
VDD=30V,ID=0.6A, Z
=6.0Ω,
0
V
=25V,VGS=10V,
DS
ID=1.3A
Thermal Resistance
Characteristic Max. UnitsSymbol Typ.
R
θJA
Notes ;
(1) T (2) Pulse Test : Pulse Width ≤ 300μs, Duty Cycle ≤ 2%
℃ to 150℃
= 25
J
Junction-to-Ambient
-- 62.5
Source-Drain Diode Ratings and Characteristics
CharacteristicSymbol Max. UnitsTyp.Min. Test Condition
Continuous Source Current
I
S
(Body Diode)
V
Diode Forward Voltage(2)
SD
Reverse Recovery Time
t
rr
--
--
1.8
--
--
--
--
--
--
--
1.2
--
100
Modified MOSFET Symbol Showing the Integral Reverse
A
P-N Junction Rectifier
V
TJ=25℃,IS=1.25A,VGS=0V
ns
T
=25℃,IF=2.5A,diF/dt=100A/μs
J
○
────
G
℃/W
○
││││
││││
────
────
▲
││││
◀
││││
────
││││
││││
││││
────
┘┘┘┘
││││
○
D
S
Page 3
Dual N-CHANNEL
POWER MOSFET
SSD2007A
10
8
6
4
, Drain Current [A ]
D
2
I
0
0246810
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
Vgs=10V
Vgs=5V
Vgs=4V
Vgs=3V
VDS , Drain-Source Voltage [V]
Fig 3. On-Resistance vs. Drain Current
1.0
0.8
]
Ω
0.6
, [
DS(on)
R
0.4
0.2
Drain-Source On-Resistance
VGS = 5 V
VGS = 10 V
10
8
6
150 oC
4
, Drain Current [A]
D
2
I
0
01234567
25 oC
- 55 oC
VGS , Gate-Source Voltage [V]
Fig 4. Capacitance vs. Drain-Source Voltage
320
240
C
iss
160
Capacitance [pF]
80
C
oss
C
rss
@ Notes :
1. V
= 0 V
GS
2. f = 1 MHz
0.0 012345
1.2
1.1
1.0
ID , Drain Current [A]
ID = 250 µA
, (Normalized)
DSS
BV
0.9
Drain-Source Breakdown Voltage
0.8
-50 0 50 100 150
TJ , Junction Temperature [oC]
, (Normalized)
R
0
5 10152025
VDS , Drain-Source Voltage [V]
Fig 6. Nomalized On-Resistance vs. TemperatureFig 5. Breakdown Voltage vs. Temperature
1.4
1.2
1.0
0.8
DS(on)
VGS = 10 V I
= 1.5 A
D
Drain-Source On-Resistance
0.6
-50 0 50 100 150
TJ , Junction Temperature [oC]
Page 4
SSD2007A
Fig 7. Nomalized Effective Transient Thermal Impedance, Junction-to-Amdient
1
Dual N-CHANNEL
POWER MOSFET
Duty Cycle=0. 5
0.2
0.1
0.1
0.05
0.02
Thermal Impedance
0.01
-5
10
Single Pulse
-4
10
Square Wave Pulse Duration [sec]
2
10
1
10
0
10
, Reverse Drain Current [A]
DR
I
TJ=150 oC
0.0 0.4 0.8 1.2 1.6 2.0 2.4
TJ=25 oC
VSD , Source-Drain Voltage [V]
P
DM
t
1
t
@ Notes :
1. R
2. Duty Fac tor, D=t1/t
3. TJM-TA=PDM*Z
4. Surface Mounted
-3
10
(t)=62.5 oC/W Max.
JA
θ
-2
10
θ
-1
10
2
2
(t)
JA
0
10
Fig 9. Gate Charge vs. Gate-Source VoltageFig 8. Source-Drain Diode Forward Voltage
10
VDD = 25 V
5
, Gate-Source Voltage [V]
GS
V
0
0246810
ID = 1.3A
QG , Total Gate Charge [nC]
2.0
1.5
1.0
ID = 250 µA
, (Normalized)
Fig 10. Threshold Voltage
GS(th)
0.5
V
0.0
-50 0 50 100 150
TJ , Junction Temperature [oC]
Page 5
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Advance Information
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No Identification Needed
Formative or In Design
First Production
Full Production
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effectiveness.
This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
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Rev. H5
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