Page 1
TVS Diode Arrays (SPA
®
Diodes)
Lightning Surge Protection- SRDA3.3 Series
SRDA3.3 Series 8pF 35A Diode Array
Pinout
I/O 1
Ref 1
Ref 1
I/O 2
1
2
3
8
Ref 2
I/O 4
7
6
I/O 3
54
Ref 2
RoHS
Pb
GREEN
Description
The SRDA3.3 integrates low capacitance rail-to-rail diodes
with an additional zener diode to protect I/O pins against
ESD and lightning induced surge events. This device can
safely absorb up to 35A per IEC61000-4-5 (tp=8/20s)
without performance degradation and a minimum
±30kV ESD per IEC61000-4-2 international standard. Its
low loading capacitance makes it ideal for high-speed
interfaceprotection.
Features
• Lightning protection,
IEC61000-4-5, 35A
(8/20µs)
• EFT, IEC61000-4-4, 50A
(5/50ns)
• Low clamping voltage
• Low leakage current
• SOIC-8 surface mount
package (JEDEC MS-012)
• ESD, IEC61000-4-2,
±30kV contact, ±30kV air
SRDA3.3
Note: Pinout diagrams above shown as device footprint on circuit board.
SOIC-8 (Top View)
Functional Block Diagram
I/O 1
I/O 4
Ref 1
Ref 2
I/O 2
I/O 3
Applications
• Tertiary (IC Side)
Protection:
- T1/E1/T3/E3
- HDSL/SDSL
- Ethernet
• RS232, RS485
Application Example
R Tip
R Ring
T1/E1/T3/E3
Transceiver
T Tip
SRDA3.3-4
1
• Video Line Protection
• Security Cameras
• Storage DVRs
• Network Equipment
• Instrumentation, Medical
Equipment
58
4
Life Support Note:
Not Intended for Use in Life Support or Life Saving Applications
The products shown herein are not designed for use in life sustaining or life saving
applications unless otherwise expressly indicated.
©2013 Littelfuse, Inc.
Specifi cations are subject to change without notice.
Please refer to www.littelfuse.com for current information.
1
Revision: June 14, 2013
T Ring
T1/E1/T3/E3 Interface Protection
SRDA3.3 Series
Page 2
TVS Diode Arrays (SPA
0.0
0.3
0.6
1.2
1.5
1.8
2.1
2.4
2.7
3.0
3.3
®
Diodes)
Lightning Surge Protection- SRDA3.3 Series
Absolute Maximum Ratings
Symbol Parameter Value Units
P
pk
I
pp
T
op
T
STOR
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress only rating and operation of the device
at these or any other conditions above those indicated in the operational sections of this
specifi cation is not implied.
Peak Pulse Power (8/20µs) 600 W
Peak Pulse Current (8/20µs) 35 A
Operating Temperature -40 to 125 °C
Storage Temperature -55 to 150 °C
Electrical Characteristics (TOP = 25°C)
Parameter Symbol Test Conditions Min Typ Max Units
Reverse Stand-Off Voltage V
Reverse Breakdown Voltage V
Snap Back Voltage V
Reverse Leakage Current I
1
Clamping Voltage, Line-Ground
Clamping Voltage, Line-Ground
Clamping Voltage, Line-Ground
Dynamic Resistance, Line-Ground
ESD Withstand Voltage
Diode Capacitance
1
Parameter is guaranteed by design and/or device characterization.
1
1
V C I
1
V C I
1
V C I
1
R
I
RWM
I
BR
I
SB
V
R
DYN
IEC61000-4-2 (Contact Discharge) ±30 - - kV
IEC61000-4-2 (Air Discharge) ±30 - - kV
Reverse Bias=0V - 4.0 - pF
Reverse Bias=0V - 8.0 - pF
C
C
V
ESD
I/O-I/O
I/O-GND
≤1µA - - 3.3 V
T
=2uA 3.5 - - V
T
=50mA 2.9 - - V
T
= 3.3V - - 1 µA
R
= 1A, t p =8/20 µs - 5.7 - V
PP
= 10A, t p =8/20 µs - 10.1 - V
PP
= 30A, t p =8/20 µs - 17.7 - V
PP
( VC2-VC1)/(I
Thermal Information
Parameter Rating Units
SOIC Package 170 °C/W
Operating Temperature Range -40 to 125 °C
Storage Temperature Range -55 to 150 °C
Maximum Junction Temperature 150 °C
Maximum Lead Temperature (Soldering
20-40s) (SOIC - Lead Tips Only)
) - 0.5 -
PP2-IPP1
260 °C
SP4040
Ω
Normalized Capacitance vs. Bias Voltage
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
Normalized Capacitance (pF)
0.4
0.2
0.0
SRDA3.3 Series
0.9
Bias Voltage (V)
Non-Repetitive Peak Pulse Power vs. Pulse Time
2
Revision: June 14, 2013
10
(kW)
pk
1
0.1
Peak Pulse Power-P
0.01
0.1 1 10 100 1000
Pulse Duration-tp(µS)
Please refer to http://www.littelfuse.com for current information.
Specifi cations are subject to change without notice.
©2013 Littelfuse, Inc.
Page 3
TVS Diode Arrays (SPA
I
5
t
R
R
o
C
T
T
®
Diodes)
Lightning Surge Protection- SRDA3.3 Series
Clamping Voltage vs. I
PP
20
18
16
(V)
14
C
12
10
8
Clam p Voltag e V
6
4
2
0
1
10
15
Peak Pulse Current- (A)
20
25
PP
Pulse Waveform
110%
100%
90%
80%
70%
PP
I
60%
50%
Percent of
40%
30%
20%
10%
0%
0.0 5.0 10.0 15.0 20.0 25.0 30.0
Time (s)
Power Derating Curve
110
100
90
PP
80
70
60
50
40
30
% of Rated Power or I
20
10
0
35
30
0 25 50 75 10 0 125 150
Ambient Temperature-T
A
(oC)
SRDA3.3
Product Characteristics
Lead Plating Matte Tin
Lead Material Copper Alloy
Lead Coplanarity 0.0004 inches (0.102mm)
Substitute Material Silicon
Body Material Molded Epoxy
Flammability UL 94 V-0
Notes :
1. All dimensions are in millimeters
2. Dimensions include solder plating.
3. Dimensions are exclusive of mold fl ash & metal burr.
4. Blo is facing up for mold and facing down for trim/form, i.e. reverse trim/form.
5. Package surface matte fi nish VDI 11-13.
Soldering Parameters
Refl ow Condition Pb – Free assembly
T
P
- Temperature Min (T
Pre Heat
- Temperature Max (T
- Time (min to max) (ts) 60 – 180 secs
Average ramp up rate (Liquidus) Temp
(TL) to peak
T
to TL - Ramp-up Rate 3°C/second max
S(max)
Refl ow
- Temperature (TL) (Liquidus) 217°C
- Temperature (tL) 60 – 150 seconds
Peak Temperature (TP) 260
Time within 5°C of actual peak
Temperature (tp)
) 150°C
s(min)
) 200°C
s(max)
3°C/second max
+0/-5
°C
20 – 40 seconds
T
L
T
S(max)
Temperature
T
S(min)
25
Ramp-up
amp-up
PreheatPrehea
t
S
time to peak temperature
Ramp-down Rate 6°C/second max
Time 25°C to peak Temperature (TP) 8 minutes Max.
Do not exceed 260°C
©2013 Littelfuse, Inc.
Specifi cations are subject to change without notice.
Please refer to www.littelfuse.com for current information.
3
Revision: June 14, 2013
t
P
t
L
Critical Zone
ritical Zone
L to TP
to
T
Ramp-down
amp-d
Time
SRDA3.3 Series
Page 4
TVS Diode Arrays (SPA
®
Diodes)
Lightning Surge Protection- SRDA3.3 Series
Part Numbering System
SRDA
TVS Diode Arrays
®
(SPA Diodes)
Voltage
3.3 B
4
T
G
G= Green
T= Tape & Reel
Package
B = SOIC-8
Channel
4= 4 Channels
Part Marking System
F
SRDA-3.3
L
CYYWW
Ordering Information
Part Number Package Marking Min. Order Qty.
SRDA3.3-4BTG SOIC-8 SRDA3.3 2500
Package Dimensions — Mechanical Drawings and Recommended Solder Pad Outline
Package SOIC
Pins 8
JEDEC MS-012
F
L
o
Recommended
Soldering Pad Outline
(Reference Only)
A 1.35 1.75 0.053 0.069
A1 0.10 0.25 0.004 0.010
A2 1.25 1.65 0.050 0.065
B 0.31 0.51 0.012 0.020
c 0.17 0.25 0.007 0.010
D 4.80 5.00 0.189 0.197
E 5.80
E1 3.80 4.00 0.150 0.157
e 1.27 BSC 0.050 BSC
L 0.40
Marking
Date code
Pin1
Millimetres Inches
Min Max Min Max
6.20
1.27
0.228
0.016
0.244
0.050
Embossed Carrier Tape & Reel Specifi cation — SOIC Package
User Feeding Direction
Pin 1 Location
SRDA3.3 Series
Revision: June 14, 2013
Millimetres Inches
Min Max Min Max
E 1.65 1.85 0.065 0.073
F 5.4 5.6 0.213 0.22
P2 1.95 2.05 0.077 0.081
D 1.5 1.6 0.059 0.063
D1 1.50 Min 0.059 Min
P0 3.9 4.1 0.154 0.161
10P0 40.0 +/- 0.20 1.574 +/- 0.008
W 11.9 12.1 0.468 0.476
P 7.9 8.1 0.311 0.319
A0 6.3 6.5 0.248 0.256
B0 5.1 5.3 0.2 0.209
K0 2 2.2 0.079 0.087
t 0.30 +/- 0.05 0.012 +/- 0.002
4
Please refer to http://www.littelfuse.com for current information.
Specifi cations are subject to change without notice.
©2013 Littelfuse, Inc.
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