Datasheet SPT103 Datasheet (SPT)

4755 Forge Road, Colorado Springs, Colorado 80907, USA

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FAST SETTLING, HIGH CURRENT WIDEBAND OP AMP

Features

■

80MHz full-power bandwidth
(20Vpp, 100Ω)

■

200mA output current

■

0.4% settling in 10ns

■

6000V/µs slew rate

■

4ns rise and fall times (20V)

■

Direct replacement for CLC103

Applications

■

Coaxial line driving

■

DAC current to voltage amplifier

■

Flash A to D driving

■

Baseband and video communications

■

Radar and IF processors

General Description

The SPT103 is a high-power, wideband op amp designed for the
most demanding high-speed applications. The wide bandwidth,
fast settling, linear phase, and very low harmonic distortion
provide the designer with the signal fidelity needed in applications
such as driving flash A to Ds. The 80MHz full-power bandwidth
and 200mA output current of the SPT103 eliminate the need for
power buffers in most applications; the SPT103 is an excellent
choice for driving large high-speed signals into coaxial lines.

In the design of the SPT103 special care was taken in order to
guarantee that the output settles quickly to within 0.4% of the final
value for use with ultra fast flash A to D converters. This is
one of the most demanding of all op amp requirements since
settling time is affected by the op amps bandwidth, passband
gain flatness, and harmonic distortion. This high degree of
performance ensures excellent performance in many other de­manding applications as well.

The dynamic performance of the SPT103 is based on a current
feedback topology that provides performance far beyond that
available from conventional op amp designs. Unlike conventional
op amps where optimum gain-bandwidth product occurs at a high
gain, minimum settling time at a gain of -1, and maximum slew
rate at a gain of +1, the SPT103 provides consistent predictable
performance across its entire gain range. For example, the table
below shows how the -3dB bandwidth remain nearly constant
over a wide range of gains. And since the amplifier is inherently
stable, no external compensation is required. The result is
shorter design time and the ability to accommodate design
changes (in gain, for example) without loss of performance or
redesign of compensation circuits.

The SPT103 is constructed using thin film resistor/bipolar transis­tor technology, and is available in the following version:

SPT103AIJ -25°C to +85°C 24-pin Ceramic DIP

Typical Performance

Small Signal Pulse Response

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SPT103

SPT103 Electrical Characteristics

(Av = +20V, VCC = ±15V, RL = 100Ω; unless specified)

Absolute Maximum Ratings

V

CC

(reversed supplies will destroy part) ±20V
junction temperature (see thermal model) +175°C
thermal resistance see thermal model
storage temperature -65°C to +150°C
lead temperature (soldering 10s) +300°C
output current ±200mA
operating temperature: AI -25°C to +85°C

Notes

1) * AI 100% tested at +25°C

✝ AI sample tested at +25°C

2) This rating protects against damage to the input stage caused by saturation of either the input or output stages. Under

transient conditions not exceeding 1µs (duty cycle not exceeding 10% maximum input voltage may be as large as twice the maximum V

cm

should never exceed ±5V. (Vcm is the voltage at the non-inverting input, pin 7).

3) This rating protects against exceeding transistor collector-emitter breakdown ratings. Recommended VCC is ±15V.

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SPT103

SPT103 Typical Performance Characteristics

(AV = +20°C, VCC = ±15V, RL = 100Ω; unless specified)

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SPT103

SPT103 Operation

The SPT103 is based on a unique design which uses
current feedback instead of the usual voltage feedback.
This design provides dynamic performance far beyond
that previously available, yet it is used basically the same
as the familiar voltage-feedback op amp (see the gain
equations above).

Layout Considerations

To obtain optimum performance from any circuit
operating at high frequencies, good PC layout is
essential. Fortunately , the stable, well-behaved response
of the SPT103 makes operation at high frequencies less
sensitive to layout than is the case with other wideband
op amps, even though the SPT103 has a much wider
bandwidth.

In general, a good layout is one which minimizes the
unwanted coupling of a signal between nodes in a circuit.
A continuous ground plane from the signal input to output
on the circuit side of the board is helpful. Traces should
be kept short to minimize inductance. If long traces are
needed, use microstrip transmission lines which are
terminated in their characteristic impedance. At some
high-impedance nodes, or in sensitive areas such as
near pin 5 of the SPT103, stray capacitance should be
kept small by keeping nodes small and removing ground
planes directly around the node.

The ±VCC connections to the SPT103 are internally
bypassed to ground with 0.1µF capacitors to provide
good high-frequency decoupling. It is recommended that
1µF or larger tantalum capacitors be provided for low­frequency decoupling. The 0.01µF capacitors shown at
pins 18 and 20 in figures 1 and 2 should be kept within

0.1” of those pins. A wide strip of ground plane should be
provided for a signal return path between the load­resistors ground and these capacitors.

Figure 1: Recommended Non-Inver ting Gain Circuit

Figure 2: Recommended Inver ting Gain Circuit

Since the layout of the PC board forms such an important
part of the circuit, much time can be saved if prototype
amplifier boards are tested early in the design stage.

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SPT103

Settling Time, Offset, and Drift

After an output transition has occurred. the output settles
very rapidly to the final value and no change occurs for
several microseconds. Thereafter, thermal gradients in­side the SPT103 will cause the output to begin to drift.
When this cannot be tolerated, or when the initial offset
voltage and drift is unacceptable, use of a composite
amplifier is advised.

A composite amplifier can also be referred to as a feed­forward amplifier. Most feed-forward techniques such as
those used In the vast majority of wideband op amps
involve the use of a wideband AC-coupled channel in
parallel with a low-bandwidth, high-gain DC-coupled am­plifier. For the composite amplifier suggested for use with
the SPT103, the SPT103 replaces the wideband AC­coupled amplifier and a low-cost monolithic op amp is
used to supply high open-loop gain at low frequencies.
Since the SPT103 is strictly DC coupled throughout,
crossover distortion of less than 0.01dB and 1° results.

For composite operation in the non-inverting mode, the
circuit in Figure 1 should be modified by the addition of the
circuit shown in Figure 3. For Inverting operation, modify
the circuit in Figure 2 by the addition of the circuit in Figure

4. Keep all resistors which connect to the SPT103 within

0.2” of the SPT103 pins. The other side of these resistors
should likewise be as close to U1 as
possible. For good overall results, U1 should be similar to
the LF356; this gives 5mV/°C input offset drift and the
crossover frequency occurs at about 2MHz. Since U1 has
a feedback network composed of Ra + Rb and a 15kΩ
resistor, which is in parallel with Rg and the internal 1.5kΩ
feedback resistor of the SPT103, Rb must be
adjusted to match the feedback ratios of the two networks.
This in done by driving the composite amplifier with a
70kHz square wave large enough to produce a
transition from +5V to -5V at the SPT103 output and
adjusting Rb until the output of U1 is at a minimum. R

a

should be about 9.5Rg for bad results; thus, Rb should be
adjusted around the value of 0.5Rg.

Figure 3: Non-Inver ting Gain Composite Amplifier to be Used with Figure 1 Circuit

Figure 4: Inver ting Gain Composite Amplifier to be Used with Figure 2 Circuit

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SPT103

Bias Control

In normal operation, the bias control pin (pin 16) is left
unconnected. However, if control over the bias of the
amplifier is desired, the bias control pin may be driven with
a TTL signal; a TTL high level will turn the amplifier off.

Distortion and Noise

The graphs of intercept point versus frequency on the
page 3 make it easy to predict the distortion at any
frequency, given the output voltage of the SPT103. First
convert the output voltage Vo to V

rms

= (Vpp/2√2) and then

to P = (10log10 (20V

rms

2

)) to get the output power in dBm.
At the frequency of interest, its 2nd harmonic will be S2 =
(I2 - P) dB below the level of P. Its third harmonic will be
S3 = 2(I3 - P) dB below the level of P, as will the two-tone
third order intermodulation products. These approxima­tions are useful for P < -1dB compression levels.

Approximate noise figure can determined for the SPT103
using the Equivalent Input Noise graph on page 3. The
following equation can be used to determine noise figure
(F) in dB.

where vn is the rms noise voltage and in is the rms noise
current. Beyond the breakpoint of the curves (i.e. where
they are flat) broadband noise figure equals spot noise, so
∆f should equal one (1) and vn and in should be read
directly off the graph. Below the breakpoint, the noise
must be integrated and ∆f set to the appropriate band­width.

Signal Processing Technologies, Inc. reserves the right to change products and specifications without notice. Permission is hereby
expressly granted to copy this literature for informational purposes only. Copying this material for any other use is strictly prohibited.

WARNING - LIFE SUPPORT APPLICATIONS POLICY - SPT products should not be used within Life Support Systems without the
specific written consent of SPT. A Life Support System is a product or system intended to support or sustain life which, if it fails, can
be reasonably expected to result in significant personal injury or death.