The SPP3401B is the P-Channel logic enhancement
mode power field effect transistors are produced using
high cell density , DMOS trench technology.
This high density process is especially tailored to
minimize on-state resistance.
These devices are particularly suited for low voltage
application such as cellular phone and notebook
computer power management and other battery powered
circuits, and low in-line power loss are needed in a very
small outline surface mount package.
FEATURES PIN CONFIGURATION(SOT-23-3L)
-30V/-4.0A,RDS(ON)= 70mΩ@VGS=- 10V
-30V/-3.2A,RDS(ON)= 90mΩ@VGS=-4.5V
-30V/-1.2A,RDS(ON)= 115mΩ@VGS=-2.5V
Super high density cell design for extremely low
DS (ON)
R
Exceptional on-resistance and maximum DC
current capability
SOT-23-3L package design
z Portable Equipment
z Battery Powered System
z DC/DC Converter
z Load Switch
z DSC
z LCD Display inverter
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