Datasheet SPLC780D Datasheet (SUNPLUS)

SSPPLLC

C778800

1166CCOOMM//4400SSEEGG CCoonnttrroolllleerr//DDrriivveerr

D

D

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AUG. 06, 2003

Version 0.1

SUNPLUS TECHNOLOGY CO. reserves the right to change this documentation without prior notice. Information provided by SUNPLUS TECHNOLOGY

CO. is believed to be accurate and reliable. However, SUNPLUS TECHNOLOGY CO. makes no warranty for any errors which may appear in this document.

Contact SUNPLUS TECHNOLOGY CO. to obtain the latest version of device specifications before placing your order. No responsibility is assumed by

SUNPLUS TECHNOLOGY CO. for any infringement of patent or other rights of third parties which may result from its use. In addition, SUNPLUS products

are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a malfunction or failure of the product

may reasonably be expected to result in significant injury to the user, without the express written approval of Sunplus.

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SPLC780D

Table of Contents

PAGE

1. GENERAL DESCRIPTION .......................................................................................................................................................................... 3

2. FEATURES.................................................................................................................................................................................................. 3

3. BLOCK DIAGRAM...................................................................................................................................................................................... 3

4. SIGNAL DESCRIPTIONS ........................................................................................................................................................................... 4

4.1. ORDERING INFORMATION ....................................................................................................................................................................... 4

5. FUNCTIONAL DESCRIPTIONS.................................................................................................................................................................. 5

5.1. OSCILLATOR .......................................................................................................................................................................................... 5

5.2. CONTROL AND DISPLAY INSTRUCTIONS ................................................................................................................................................... 5

5.3. INSTRUCTION TABLE............................................................................................................................................................................... 7

5.4. 8-BIT OPERATION AND 8-DIGIT 1-LINE DISPLAY (USING INTERNAL RESET)................................................................................................ 8

5.5. 4-BIT OPERATION AND 8-DIGIT 1-LINE DISPLAY (USING INTERNAL RESET)................................................................................................ 9

5.6. 8-BIT OPERATION AND 8-DIGIT 2-LINE DISPLAY (USING INTERNAL RESET)................................................................................................ 9

5.7. RESET FUNCTION ................................................................................................................................................................................ 10

5.8. DISPLAY DATA RAM (DD RAM) ........................................................................................................................................................... 12

5.9. TIMING GENERATION CIRCUIT............................................................................................................................................................... 12

5.10. LCD DRIVER CIRCUIT ....................................................................................................................................................................... 12

5.11. CHARACTER GENERATOR ROM (CG ROM) ...................................................................................................................................... 12

5.12. CHARACTER GENERATOR RAM (CG RAM) ....................................................................................................................................... 12

5.13. CURSOR/BLINK CONTROL CIRCUIT .................................................................................................................................................... 16

5.14. INTERFACING TO MPU....................................................................................................................................................................... 16

5.15. SUPPLY VOLTAGE FOR LCD DRIVE .................................................................................................................................................... 16

5.16. REGISTER --- IR (INSTRUCTION REGISTER) AND DR (DATA REGISTER) ............................................................................................ 19

5.17. BUSY FLAG (BF) ............................................................................................................................................................................... 19

5.18. ADDRESS COUNTER (AC).................................................................................................................................................................. 19

5.19. I/O PORT CONFIGURATION ................................................................................................................................................................ 19

6. ELECTRICAL SPECIFICATIONS ............................................................................................................................................................. 20

6.1. ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................................. 20

6.2. DC CHARACTERISTICS (VDD = 2.7V TO 4.5V, T

6.3. AC CHARACTERISTICS (VDD = 2.7V TO 4.5V, T

6.4. DC CHARACTERISTICS (VDD = 4.5V TO 5.5V, TA = 25℃) .................................................................................................................... 22

6.5. AC CHARACTERISTICS (VDD = 4.5V TO 5.5V, T

7. APPLICATION CIRCUITS......................................................................................................................................................................... 25

7.1. R-OSCILLATOR .................................................................................................................................................................................... 25

7.2. INTERFACE TO MPU............................................................................................................................................................................. 25

7.3. SPLC780D APPLICATION CIRCUIT ....................................................................................................................................................... 26

7.4. APPLICATIONS FOR LCD ...................................................................................................................................................................... 27

8. CHARACTER GENERATOR ROM ........................................................................................................................................................... 29

8.1. SPLC780D - 001................................................................................................................................................................................ 29

9. PACKAGE /PAD LO CATION S ................................................................................................................................................................... 30

9.1. PAD ASSIGNMENT AND LOCATIONS...................................................................................................................................................... 30

9.2. PACKAGE CONFIGURATION................................................................................................................................................................... 31

9.3. PACKAGE INFORMATION ....................................................................................................................................................................... 32

10. DISCLAIMER............................................................................................................................................................................................. 33

11. REVISION HISTORY................................................................................................................................................................................. 34

Sunplus Confidential

= 25℃) .................................................................................................................... 20

A

= 25℃) .................................................................................................................... 21

A

For GUEST Use Only

= 25℃) .................................................................................................................... 22

A

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Preliminary Version: 0.1

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16COM/40SEG CONTROLLER/DRIVER

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1. GENERAL DESCRIPTION

The SPLC780D, a dot-matrix LCD controller and driver from

SUNPLUS, is a unique design for displaying alpha-numeric,

Japanese-Kana characters and symbols. The SPLC780D

provides two types of interfaces to MPU: 4-bit and 8-bit interfaces.

The transferring speed of 8-bit is twice faster than 4-bit. A single

SPLC780D is able to display up to two 8-character lines. By

cascading with SPLC100 or SPLC063, the display capability can

be extended. The CMOS technology ensures the power saves in

the most efficient way and the performance keeps in the highest

rank.

2. FEATURES

 Character generator ROM: 10880 bits

─ Character font 5 x 8 dots: 192 characters

─ Character font 5 x 10 dots: 64 characters

 Character generator RAM: 512 bits

─ Character font 5 x 8 dots: 8 characters

─ Character font 5 x 10 dots: 4 characters

 4-bit or 8-bit MPU interfaces

 Direct driver for LCD: 16 COMs x 40 SEGs

 Duty factor (selected by program):

─ 1/8 duty: 1 line of 5 x 8 dots

─ 1/11 duty: 1 line of 5 x 10 dots

─ 1/16 duty: 2 lines of 5 x 8 dots / line

 Built-in power on automatic reset circuit

 Built-in oscillator circuit (with external resistor)

 Support external clock operation

 Low Power Consumption

 Package form: 80 QFP or bare chip available

3. BLOCK DIAGRAM

OSC1

OSC2

VDD

Sunplus Confidential

VSS

DB0-DB3

DB4-DB7

RS

R/W

E

Power

Supply

for LCD

Drive :

(V1-V5)

Timing Generation Circuit

Parallel to Serial Data Conversion Circuit

55

Busy Flag

Character

Generator

ROM

For GUEST Use Only

8

7

8

I / O

Buffer

8

Register

8

Instruction

Register

Data

Character

Generator

RAM

Instruction

Decorder

7

8

7

7

Address

Counter

Cursor

Blink

Control

Circuit

8

Display

Data RAM

80 Bytes

40-bit

Shift

Register

Latch

Circuit

16-bit

Shift

Register

40

40

Segments

Commons

16

40

x

16

LCD

Driver

CL1,CL2
M

D

COM1­COM16

SEG1­SEG40

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4. SIGNAL DESCRIPTIONS

Mnemonic PIN No. Type Description

VDD 33 I Power input

VSS 23 I Ground

OSC1

OSC2

V1 - V5 26 - 30 I Supply voltage for LCD driving.

E 38 I A start signal for reading or writing data.

R/W 37 I A signal for selecting read or write actions.

RS 36 I A signal for selecting registers.

DB0 - DB3 39 - 42 I/O Low 4-bit data

DB4 - DB7 43 - 46 I/O High 4-bit data

CL1 31 O Clock to latch serial data D.

CL2 32 O Clock to shift serial data D.

M 34 O Switch signal to convert LCD waveform to AC.

D 35 O Sends character pattern data corresponding to each common signal serially.

SEG1 - SEG22

SEG23 - SEG40

COM1 - COM16 47 - 62 O Common signals for LCD.

24

25

22 - 1

80 - 63

- Both OSC1 and OSC2 are connected to resistor for internal oscillator circuit. For

external clock operation, the clock is input to OSC1.

1: Read, 0: Write.

1: Data Register (for read and write)

0: Instruction Register (for write),

Busy flag - Address Counter (for read).

1: Selection, 0: Non-selection.

O Segment signals for LCD.

SPLC780D

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4.1. Ordering Information

Product Number Package Type

SPLC780D-NnnV-C Chip form

Sunplus Confidential

SPLC780D-NnnV-PQ05 Package form - QFP 80L

Note1: Code number is assigned for customer.

Note2: Code number (N = A - Z or 0 - 9, nn = 00 - 99); version (V = A - Z).

For GUEST Use Only

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5. FUNCTIONAL DESCRIPTIONS

5.1. Oscillator

SPLC780D oscillator supports not only the internal oscillator

operation, but also the external clock operation.

5.2. Control and Display Instructions

Control and display instructions are described in details as follows:

5.2.1. Clear display

DB6 DB5 DB4 DB3 DB2 DB1 DB0

RS R/W

Code

It clears the entire display and sets Display Data RAM Address 0

in Address Counter.

0 0 0 0 0 0 0 0 0

5.2.2. Return home

RS R/W

Code

X: Do not care (0 or 1)

It sets Display Data RAM Address 0 in Address Counter and the

display returns to its original position. The cursor or blink goes to

the most-left side of the display (to the 1st line if 2 lines are

displayed). The contents of the Display Data RAM do not

change.

5.2.3. Entry mode set

DB7

DB6 DB5 DB4 DB3 DB2 DB1 DB0

DB7

0 0 0 0 0 0 0 0 1

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1

X

S = 1 I / D = 1 It shifts the display to the left

S = 1 I / D = 0 It shifts the display to the right

5.2.4. Display ON/OFF control

RS R/W

Code

D = 1: Display on, D = 0: Display off

C = 1: Cursor on, C = 0: Cursor off

B = 1: Blinks on, B= 0: Blinks off

8th line

0 0 0 0 0 0 1 D C

5 x 8 dot

character font

5.2.5. Cursor or display shift

Without changing DD RAM data, it moves cursor and shifts

display.

RS R/W

Code

0 0 0 0 0 1 S/C R/L X

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DB6 DB5 DB4 DB3 DB2 DB1 DB0

DB7

5 x 10 dot

character font

Cursor

DB6 DB5 DB4 DB3 DB2 DB1 DB0

DB7

11th line

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B

X

During writing and reading data, it defines cursor moving direction

and shifts the display.

RS R/W

Code

I / D = 1: Increment, I / D = 0: Decrement.

S = 1: The display shift, S = 0: The display does not shift.

S/C R/L Description Address Counter

0 0 Shift cursor to the left AC = AC - 1

0 1 Shift cursor to the right AC = AC + 1

1 0 Shift display to the left. Cursor follows the display shift AC = AC

1 1 Shift display to the right. Cursor follows the display shift AC = AC

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0 0 0 0 0 0 0 1 I / D

DB7

For GUEST Use Only

DB6 DB5 DB4 DB3 DB2 DB1 DB0

S

Blink display alternately

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5.2.6. Function set

DB6 DB5 DB4 DB3 DB2 DB1 DB0

RS R/W

Code

X: Do not care (0 or 1)

DL: It sets interface data length.

DL = 1: Data transferred with 8-bit length (DB7 - 0).

DL = 0: Data transferred with 4-bit length (DB7 - 4).

It requires two times to accomplish data transferring.

N: It sets the number of the display line.

N = 0: One-line display.

N = 1: Two-line display.

F: It sets the character font.

F = 0: 5 x 8 dots character font.

F = 1: 5 x 10 dots character font.

N F No. of Display Lines Character Font Duty Factor

0 0 1 5 x 8 dots 1 / 8

0 1 1 5 x 10 dots 1 / 11

1 X 2 5 x 8 dots 1 / 16

It cannot display two lines with 5 x 10 dots character font.

0 0 0 0 1 DL N F X

DB7

X

5.2.7. Set character generator RAM address

DB6 DB5 DB4 DB3 DB2 DB1 DB0

RS R/W

Code

It sets Character Generator RAM Address (aaaaaa)

Address Counter.

Character Generator RAM data can be read or written after this

setting.

0 0 0 1 a a a a a

DB7

a

Sunplus Confidential

to the

2

For GUEST Use Only

5.2.8. Set display data RAM address

DB6 DB5 DB4 DB3 DB2 DB1 DB0

RS R/W

Code

It sets Display Data RAM Address (aaaaaaa)

Counter.

0 0 1 a a a a a a

DB7

a

to the Address

2

Display data RAM can be read or written after this setting.

In one-line display (N = 0),

(aaaaaaa)

In two-line display (N = 1),

(aaaaaaa)

(aaaaaaa)

5.2.9. Read busy flag and address

RS R/W

Code

When BF = 1, it indicates the system is busy now and it will not

accept any instruction until not busy (BF = 0). At the same time,

the content of Address Counter (aaaaaaa)

0 1 BF a a a a a a

5.2.10. Write data to character generator RAM or

display data RAM

RS R/W

Code

It writes data (dddddddd)

data RAM.

1 0 d d d d d d d

5.2.11. Read data from character generator RAM or

display data RAM

RS R/W

Code

It reads data (dddddddd)2 from character generator RAM or

display data RAM.

To read data correctly, do the following:

1). The address of the Character Generator RAM or Display Data

RAM or shift the cursor instruction.

2). The “ Read ” instruction.

1 1 d d d d d d d

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SPLC780D

(00)16 - (4F)

2:

(00)16 - (27)

2:

(40)16 - (67)

2:

DB6 DB5 DB4 DB3 DB2 DB1 DB0

DB7

DB6 DB5 DB4 DB3 DB2 DB1 DB0

DB7

to character generator RAM or display

2

DB6 DB5 DB4 DB3 DB2 DB1 DB0

DB7

16.

for the first line,

16

for the second line.

16

is read.

2

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5.3. Instruction Table

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Instruction

Clear Display 0 0 0 0 0 0 0 0 0 1 Write "20H" to DDRAM and set DDRAM

Return Home 0 0 0 0 0 0 0 0 1 - Set DDRAM address to "00H" from AC and

Entry Mode

Set

Display ON/

OFF Control

Cursor or

Display Shift

Function Set 0 0 0 0 1 DL N F - - Set interface data length (DL: 8-bit/4-bit),

Set CGRAM

Address

Set DDRAM

Address

Read Busy Flag

and Address

Counter

Write Data to RAM 1 0 D7 D6 D5 D4 D3 D2 D1 D0 Write data into internal RAM

Read Data from

RAM

Note: "-": don't care

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

0 0 0 0 0 0 0 1 I/D S Assign cursor moving direction and enable

0 0 0 0 0 0 1 D C B Set display(D), cursor(C), and blinking of

0 0 0 0 0 1 S/C R/L - - Set cursor moving and display shift control

0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0 Set CGRAM address in address counter. 38µs

0 0 1 AC6 AC5 AC4 AC3 AC2 AC1 AC0 Set DDRAM address in counter 38µs

0 1 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 Whether during internal operation or not

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1 1 D7 D6 D5 D4 D3 D2 D1 D0 Read data from internal RAM

Instruction Code

address to "00H" from AC

return cursor to its original position if

shifted. The contents of DDRAM are not

changed.

the shift of entire display

cursor(B) on/off control bit.

bit, and the direction, without changing of

DDRAM data.

numbers of display line (N: 2-line/1-line)

and, display font type (F:5x10 dots/5x8

dots)

can be known by reading BF. The

contents of address counter can also be

read.

(DDRAM/CGRAM).

For GUEST Use Only

(DDRAM/CGRAM).

Description

Execution time

(fosc=270KHz)

1.52ms

1.52ms

38µs

38µs

38µs

38µs

38µs

38µs

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5.4. 8-Bit Operation and 8-Digit 1-Line Display (Using Internal Reset)

No. Instruction Display Operation

1 Power on. (SPLC780D starts initializing) Power on reset. No display.

2 Function set

3 Display on / off control

4 Entry mode set

5 Write data to CG RAM / DD RAM

6 Write data to CG RAM / DD RAM

7 : :

8 Write data to CG RAM / DD RAM

9 Entry mode set

10 Write data to CG RAM / DD RAM

11 Write data to CG RAM / DD RAM

12 : :

13 Write data to CG RAM / DD RAM

14 Cursor or display shift

15 Cursor or display shift

16 Write data to CG RAM / DD RAM

17 Cursor or display shift

18 Cursor or display shift

19 Write data to CG RAM / DD RAM

20 : : :

21 Return home

DB7RS R/W DB6 DB5 D B4 DB3 DB2 DB1 DB 0

0

0

0

0 0 0 0 1 1 1 00 0

0 0 0 0 0 1 1 00 0

0

1

0

0 1 0 0 0 1 0 11 0

0 1 0 0 0 1 0 11 0

0 0 0 0 0 1 1 10 0

0 0 1 0 0 0 0 01 0

0 1 0 0 0 0 1 11 0

0 1 0 1 1 0 0 11 0

1

1

0

1

0

1

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0 0 0 1 0 0 X X0 0

0 0 0 1 0 0 X X0 0

0 1 0 0 1 1 1 01 0

0 0 0 1 1 1 X X0 0

0 0 0 1 0 1 X X0 0

0 1 0 0 0 0 0 01 0

0 0 0 0 0 0 1 00 0

0

0

1

For GUEST Use Only

_

_

1

W_

WE_

WELCOME_

WELCOME_

ELCOME _

LCOME C_

COMPAMY_

COMPAMY_

COMPAMY_

OMPANY_

COMPAMY_

OMPANY_

COMPAMY_

WELCOME_

1

X

X

0

Set to 8-bit operation and select 1-line display line and character font.

Display on.

Cursor appear.

Increase address by one.

It will shift the cursor to the right when writing to the DD RAM/CG RAM.

Now the display has no shift.

Write " W ".

The cursor is incremented by one and shifted to the right.

Write " E ".

The cursor is incremented by one and shifted to the right.

Write " E ".

The cursor is incremented by one and shifted to the right.

Set mode for display shift when writing

Write " "(space).

The cursor is incremented by one and shifted to the right.

Write " C ".

The cursor is incremented by one and shifted to the right.

Write " Y ".

The cursor is incremented by one and shifted to the right.

Only shift the cursor's position to the left (Y).

Only shift the cursor's position to the left (M).

Write " N ".

The display moves to the left.

Shift the display and the cursor's position to the right.

Shift the display and the cursor's position to the right.

Write " " (space).

The cursor is incremented by one and shifted to the right.

Both the display and the cursor return to the original position (address 0).

SPLC780D

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5.5. 4-Bit Operation and 8-Digit 1-Line Display (Using Internal Reset)

No. Instruction Display Operation

1 Power on.

(SPLC780D starts initializing)

2 Function set

3

4

5

6

DB7RS R/W DB6 DB5

0 0 10 0 0

0 0 1 00 0

0 0 X X0 0

0 0 0 00 0

1 1 1 00 0

0 0 0 00 0

0 1 1 00 0

0 1 0 11 0

0 1 1 11 0

DB4

_

_

W_

Power on reset. No display.

Set to 4-bit operation.

Set to 4-bit operation and select 1-line display line and character font.

Display on.

Cursor appears.

Increase address by one.

It will shift the cursor to the right when writing to the DD RAM / CG RAM.

Now the display has no shift.

Write " W ".

The cursor is incremented by one and shifted to the right.

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5.6. 8-Bit Operation and 8-Digit 2-Line Display (Using Internal Reset)

No. Instruction Display Operation

1 Power on.

(SPLC780D starts initializing)

2 Function set

3 Display on / off control

4 Entry mode set

DB7RS R/W DB6 DB5 DB4 DB3 DB2 DB1 DB0

0 0 1 1 1 0 X X0 0

0

0

0

0

0

0

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0 0 0 0 0 1 1 00 0

_

0

1

1

1

_

For GUEST Use Only

5 Write data to CG RAM / DD RAM

0 1 0 1 0 1 1 11 0

6 : : :

7 Write data to CG RAM / DD RAM

0 1 0 0 0 1 0 11 0

8 Set DD RAM address

1 1 0 0 0 0 0 00 0

9 Write data to CG RAM / DD RAM

0 1 0 1 0 1 0 01 0

10 : : :

11 Write data to CG RAM / DD RAM

0

1

0

1

0

1

0

1

0

0

W_

WELCOME_

WELCOME
_

WELCOME
T_

WELCOME
TO PART_

Power on reset. No display.

Set to 8-bit operation and select 2-line display line and 5 x 8 dot

character font.

Display on.

Cursor appear.

Increase address by one.

It will shift the cursor to the right when writing to the DD RAM /

CG RAM.

Now the display has no shift.

Write " W ".

The cursor is incremented by one and shifted to the right.

Write " E ".

The cursor is incremented by one and shifted to the right.

It sets DD RAM's address.

The cursor is moved to the beginning position of the 2nd line.

Write " T ".

The cursor is incremented by one and shifted to the right.

Write " T ".

The cursor is incremented by one and shifted to the right.

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No. Instruction Display Operation

12 Entry mode set

0 0 0 0 0 1 1 10 0

13 Write data to CG RAM / DD RAM

0 1 0 1 1 0 0 11 0

14 : : :

15 Return home

0 0 0 0 0 0 1 00 0

5.7. Reset Function

At power on, SPLC780D starts the internal auto-reset circuit and executes the initial instructions. The initial procedures are shown as

follows:

Power On

WELCOME
TO PART_

ELCOME
O PARTY_

WELCOME
TO PARTY

[ 8-Bit Interface ]

When writing, it sets mode for the display shift.

Write " Y ".

The cursor is incremented by one and shifted to the right.

Both the display and the cursor return to the original position

(address 0).

Wait time > 15 ms

after VDD > 4.5V

RS R/W DB7 DB6 DB5 DB4 DB3 DB3 DB1 DB0
0 0 0 0 1 1 X X X X

Wait time > 4.1 ms

RS R/W DB7 DB6 DB5 DB4 DB3 DB3 DB1 DB0
0 0 0 0 1 1 X X X X

Wait time > 100 us

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RS R/W DB7 DB6 DB5 DB4 DB3 DB3 DB1 DB0
0 0 0 0 1 1 X X X X

Wait time > 40ms
After VDD > 2.7V

BF cannot be checked before this instruction .

Function set ( Interface is 8 bits length . )

BF cannot be checked before this instruction .

Function set ( Interface is 8 bits length . )

BF cannot be checked before this instruction .

Function set ( Interface is 8 bits length . )

For GUEST Use Only

BF can be checked after the following
instructions .

Function set ( Interface is 8 bits length .
Specify the number of display lines and
character font . )

RS R/W DB7 DB6 DB5 DB4 DB3 DB3 DB1 DB0
0 0 0 0 1 1 N F X X

0 0 0 0 0 0 1 0 0 0

0 0 0 0 0 0 0 0 0 1

0 0 0 0 0 0 0 1 I/D S

The number of display lines and character
font cannot be changed afterwards .

Display off

Display clear

Initialization Ends

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Entry mode set

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Preliminary Version: 0.1

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Power On

[ 4-Bit Interface ]

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SPLC780D

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W ait time > 15 ms

after VDD > 4.5V

RS R/W DB7 DB6 DB5 DB4

0 0 0 0 1 1

Wait time > 4.1 ms

RS R/W DB7 DB6 DB5 DB4

0 0 0 0 1 1

Wait time > 100 us

RS R/W DB7 DB6 DB5 DB4

0 0 0 0 1 1

RS R/W DB7 DB6 DB5 DB4

0 0 0 0 1 0

0 0 0 0 1 0

0 0 N F X X

0 0 0 0 0 0

0 0 1 0 0 0

0 0 0 0 0 0

0 0 0 0 0 1

0 0 0 0 0 0

0 0 0 1 I/D S

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Wait time > 40ms
After VDD > 2.7V

BF cannot be checked before this instruction .

Function set ( Interface is 8 bits length . )

BF cannot be checked before this instruction .

Function set ( Interface is 8 bits length . )

BF cannot be checked before this instruction .

Function set ( Interface is 8 bits length . )

BF can be checked after the following

instructions .

Function set ( Set interface to be 4 bits length)

Interface is 8 bits length .

Function set ( Interface is 4 bits length .
Specify the number of the display lines

and character font . )

The number of display lines and character
font cannot be changed afterwards .

Display off

Display clear

Initialization Ends

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Entry mode set

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5.8. Display Data RAM (DD RAM)

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The 80-bit DD RAM is normally used for storing display data.

Those DD RAM not used for display data can be used as general

data RAM. Its address is configured in the Address Counter.

1-line display , 80 display characters

312 456

00 01 02 03 04 05

( Example ) 1-line display , 8 display characters

312 4 5678

00 01 02 03 04 05 06 07

When the display shift operation is performed , the display data RAM's address moves as :

( i ) Left shift

01 02 03 04 05 06 06 07

5.9. Timing Generation Circuit

The relationships between Display Data RAM Address and LCD′s

position are depicted as follows.

4E 4F

Display position

Display data RAM
address

( ii ) Right shift

08 4F 00 01 02 03 04 05 06

5.11. Character Generator ROM (CG ROM)

Display position79 80

Display data RAM
address

The timing generating circuit is able to generate timing signals to

the internal circuits. In order to prevent the internal timing

interface, the MPU access timing and the RAM access timing are

generated independently.

5.10. LCD Driver Circuit

Total of 16 commons and 40 segments signal drivers are valid in

the LCD driver circuit. When a program specifies the character

fonts and line numbers, the corresponding common signals output

drive-waveforms and the others still output unselected waveforms.

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Using 8-bit character code, the character generator ROM

generates 5 x 8 dots or 5 x 10 dots character patterns. It also

can generate 192’s 5 x 8 dots character patterns and 64’s 5 x 10

dots character patterns.

5.12. Character Generator RAM (CG RAM)

Users can easily change the character patterns in the character

generator RAM through program. It can be written to 5 x 8 dots,

8-character patterns or 5 x 10 dots for 4-character patterns.

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Preliminary Version: 0.1

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The following diagram shows the SPLC780D character patterns:

Correspondence between Character Codes and Character Patterns.

Higher 4-bit (D4 to D7) of Character Code (Hexadecimal)

0CGRAM

(1)

CG

1

RAM

(2)

CG

2

RAM

(3)

CG

3

RAM

(4)

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SPLC780D

F123456789ABC ED0

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CG

4

RAM

(5)

CG

5

RAM

(6)

CG

6

RAM

(7)

CG

7

RAM

(8)

CG

8

RAM

(1)

CG

9

RAM

(2)

Lower 4-bit (D0 to D3) of Ch aracter Code (Hexadeci mal)

A

RAM

B

RAM

C

RAM

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CG

(3)

CG

(4)

CG

(5)

For GUEST Use Only

CG

D

RAM

(6)

CG

E

RAM

(7)

CG

RAM

F

(8)

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The relationships between Character Generator RAM Addresses, Character Generator RAM Data (character patterns), and Character

Codes are depicted as follows:

5.12.1. 5 x 8 dot character patterns

Character Code

( DD RAM Data )

b6 b5 b4 b3 b2 b1 b0b7 b5 b4 b3 b2 b1 b0 b6 b5 b4 b3 b2 b1 b0b7

0000X XXX

0000X XXX

0 0 0 0 0 0

10 0 10 0

CG RAM

Address

0 00

0 10

0 01

0 11

1

1

1

1

0 00

0 10

0 01

0 11

1

1

1

1

Character Patterns

( CG RAM Data )

00

10

01

11

00

10

01

11

1

1 1 1 1

1

00

1

00

0

0

00

100

0

000

0 0 00

0 01

0

1 0

0

1 0

1 10

1

1 0

0 0

1 00 00

1 00 00

1 01 10

00 0 00

00

Character

00

Pattern
Example (1)

01

0

001

0

Cursor
Position

00

000

0

Character
Pattern
Example (2)

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Note1:

Note2:

Note3: When all of the bit4-7 of the character code are 0, CG RAM character patterns are selected.

Note4: " 1 ": Selected, " 0 " : No selected , " X " : Do not care (0 or 1).

Note5: For example (1), set character code (b2 = b1 = b0 = 0, b3 = 0 or 1, b7-b4 = 0) to display “ T ”. That means character code (00) 16,and (08) 16 can

Note6: The bits 0-2 of the character code RAM is the character pattern line position. The 8th line is the cursor position and display is formed by logical OR

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It means that the bit0~2 of the character code correspond to the bit3~5 of the CG RAM address.

These areas are not used for display, but can be used for the general data RAM.

display “ T ” character.

with the cursor.

For GUEST Use Only

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5.12.2. 5 X 10 dot character patterns

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Character Code

( DD RAM Data )

b6 b5 b4 b3 b2 b1 b0b7 b5 b4 b3 b2 b1 b0 b6 b5 b4 b3 b2 b1 b0b7

0000X XXX

X0 0 0 0

CG RAM

Address

0 00

0

0 10

0

0 01

0

0 11

0

1

0

1

0

1

0

1

0

0 00

1

0 10

1

0 01

1

0 11

1

1

1

1

1

1

1

00

10

01

11

00

10

01

Character Patterns

( CG RAM Data )

XXX

00 01 1

00 01 1

00 01 1

00 01 1

00 01 1

00 01 1

00 01 1

1 00 0

1

1 1

XXXXX

1 1

00 0 00

1

000

1

1

Character
Pattern
Example (1)

Cursor
Position

1

1

Note1:

Note2:

Note3: When all of the bit4-7 of the character code are 0, CG RAM character patterns are selected.

Note4: " 1 “: Selected, " 0 “: No selected, " X “: Do not care (0 or 1).

Note5: For example (1), set character code (b2 = b1 = 0, b3 = b0 = 0 or 1, b7-b4 = 0) to display “ U ”. That means all of the character codes (00) 16, (01) 16,

Note6: The bits 0-3 of the character code RAM is the character pattern line position. The 11th line is the cursor position and display is formed by logical OR

It means that the bit1~2 of the character code correspond to the bit4~5 of the CG RAM address.

These areas are not used for display, but can be used for the general data RAM.

(08) 16,and (09) 16 can display “ U ” character.

with the cursor.

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5.13. Cursor/Blink Control Circuit

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This circuit generates the cursor or blink in the cursor / blink

control circuit. The cursor or the blink appears in the digit at the

Display Data RAM Address defined in the Address Counter.

b6 b5 b4 b3 b2 b1 b0

0 0 0 0 1 1 1AC

In a 1-line display

12345678910digit

00 01 02 03 04 05 06 07 08 09

the cursor position

In a 2-line display

12345678910digit

1st line

2nd line

00 01 02 03 04 05 06 07 08 09

40 41 42 43 44 45 46 47 48 49

When the Address Counter is (07) 16, the cursor position is shown

as belows:

Display position

Display data RAM address

( Hexadecimal )

Display position

Display data RAM address

( Hexadecimal )

the cursor position

5.14. Interfacing to MPU

There are two types of data operations: 4-bit and 8-bit operations.

Using 4-bit MPU, the interfacing 4-bit data is transferred by

4-busline (DB4 to DB7). Thus, DB0 to DB3 bus lines are not

used. Using 4-bit MPU to interface 8-bit data requires two times

transferring. First, the higher 4-bit data is transferred by

4-busline (for 8-bit operation, DB7 to DB4). Secondly, the lower

4-bit data is transferred by 4-busline (for 8-bit operation, DB3 to

DB0). For 8-bit MPU, the 8-bit data is transferred by 8-buslines

(DB0 to DB7).

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5.15. Supply Voltage for LCD Drive

Different voltages can be supplied to SPLC780D’s pins (V5 - 1) for

obtaining LCD drive-waveform. The relationships between bias,

duty factor and supply voltages are shown as belows:

Duty Factor

Supply

Vol tag e

V1 VDD – 1/4 V

V2 VDD – 1/2 V

V3 VDD – 1/2 V

V4 VDD – 3/4 V

V5 VDD – V

1/8, 1/11 1/16

1/4 1/5

LCD

LCD

LCD

LCD

LCD

VDD – 1/5 V

VDD – 2/5 V

VDD – 3/5 V

VDD – 4/5 V

VDD – V

LCD

LCD

LCD

LCD

LCD

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5.15.1. The power connections for LCD (1/4 Bias, 1/5 Bias) are shown belows:

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VDD ( +5.0V )

VDD

V1

V2

V3

V4

V5

1 / 4 Bias

(1/8,1/11 Duty)

The bypass-capacitor improves the LCD display quality.

-V or Gnd

VDD ( +5.0V )

VDD

R

V1

R

VLCD

R

R

VR

1 / 5 Bias

(1/16 Duty)

V2

V3

V4

V5

R

R

R

R

-V or Gnd

VLCD

VR

VDD

VDD

R

V1

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V2

V3

For GUEST Use Only

V4

V5

1 / 4 Bias

(1/8,1/11 Duty)

R

R

R

-V or Gnd

The bias voltage must have the following relations:

VDD > V1 > V2 ≧ V3 > V4 > V5.

( +5.0V )

C

C

C

C

VR

VDD

1 / 5 Bias

(1/16 Duty)

V1

V2

V3

V4

V5

( +5.0V )

VDD

R

R

R

R

R

VR

-V or Gnd

C

C

C

C

C

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5.15.2. The relationship between LCD frame′s frequency and oscillator′s frequency.

(Assume the oscillation frequency is 250KHz, 1 clock cycle time = 4.0µs)

5.15.2.1. 1/8 Duty, TYPE-B waveform

400 clocks

2

12 7812 7812 7812 78

VPP
V1

COM1

V2(V3)

V4
VSS

1 Frame 1 Frame

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1 frame = 4(µs) x 400 x 8 = 12800(µs) = 12.8ms

frequency Frame ==

5.15.2.2. 1/11 Duty, TYPE-B waveform

VPP
V1

COM1

V2(V3)

V4
VSS

1 frame = 4(µs) x 400 x 11 = 17600(µs) = 17.6ms

frequency Frame 8.6==

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5.15.2.3. 1/16 Duty, TYPE-B waveform

For GUEST Use Only

12.8(ms)

400 clocks

1 2 10 11 1 2

2

200 clocks

1

78.1(Hz)

1 Frame 1 Frame

1

17.6(ms)

(Hz)5

10 11 1 2

VPP
V1

COM1

V2
V3
V4
VSS

1 frame = 4(µs) x 200 x 16 = 12800(µs) = 12.8ms

Frame frequency ==

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2

1 2 15 16 1 2

1 Frame 1 Frame

1

12.8(ms)

78.1(Hz)

18 AUG. 06, 2003

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Preliminary Version: 0.1

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5.16. REGISTER --- IR (Instruction Register) and DR

(Data Register)

SPLC780D contains two 8-bit registers: Instruction Register (IR)

and Data Register (DR). Using combinations of the RS pin and

the R/W pin selects the IR and DR, see below:

RS R/W Operation

0 0 IR write (Display clear, etc.)

0 1 Read busy flag (DB7) and Address Counter

(DB0 - DB6)

1 0 DR write (DR to Display data RAM or

Character generator RAM)

1 1 DR read (Display data RAM or Character

generator RAM to DR)

The IR can be written by MPU, but it cannot be read by MPU.

5.17. Busy Flag (BF)

When RS = 0 and R/W = 1, the busy flag is output to DB7. As

the busy flag =1, SPLC780D is in busy state and does not accept

any instruction until the busy flag = 0.

5.19. I/O Port Configuration

5.19.1. Input port: E

5.19.2. Input port: R/W, RS

5.19.3. Output port: CL1, CL2, M, D

5.18. Address Counter (AC)

The Address Counter assigns addresses to Display Data RAM

and Character Generator RAM. When an instruction for address

is written in IR, the address information is sent from IR to AC.

After writing to/reading from Display Data RAM or Character

Generator RAM, AC is automatically incremented by one (or

decremented by one). The contents of AC are output to DB0 -

DB6 when RS = 0 and R/W = 1.

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VDD

PMOS

sch

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VDD

PMOS

NMOS

VDD

PMOS

NMOS

VDD

PMOS

NMOS

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5.19.4. Input / Output port: DB7 - DB0

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For GUEST Use Only

PMOS

sch

VDD

PMOS

NMOS

VDDVDD

Enable

Data

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6. ELECTRICAL SPECIFICATIONS

6.1. Absolute Maximum Ratings

Characteristics Symbol Ratings

Operating Voltage VDD -0.3V to +7.0V

Driver Supply Voltage V

Input Voltage Range V

Operating Temperature T

Storage Temperature T

Note: Stresses beyond those given in the Absolute Maximum Rating table may cause operational errors or damage to the device. For normal operational

conditions see AC/DC Electrical Characteristics.

LCD

IN

A

STO

6.2. DC Characteristics (VDD = 2.7V to 4.5V, TA = 25℃)

VDD - 12V to VDD + 0.3V

-0.3V to VDD + 0.3V

-30℃ to +80℃

-55℃ to +125℃

Characteristics Symbol

Operating Current I

Input High Voltage V

Input Low Voltage V

Input High Voltage V

Input Low Voltage V

Input High Current I

Input Low Current I

Output High

Voltage (TTL)

Output Low

Voltage (TTL)

Output High

Voltage (CMOS)

Output Low

Voltage (CMOS)

Driver ON Resistance

(COM)

Driver ON Resistance

(SEG)

LCD Voltage V

Note: F

= 250KHz, VDD = 3.0V, pin E = “L”, RS, R/W, DB0 - DB7 are open, all outputs are no loads.

OSC

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For GUEST Use Only

Limit

Min. Typ. Max.

DD

IH1

IL1

IH2

IL2

IH

IL

V

OH1

V

OL1

V

OH2

V

OL2

R

COM

R

SEG

LCD

- 0.2 0.4 mA External clock (Note)

0.7VDD - VDD V

-0.3 - 0.55 V

0.7VDD - VDD V

-0.2 - 0.2VDD V

-1.0 - 1.0 µA

-5.0 -15 -30 µA

0.75VDD - - V

- - 0.2VDD V

0.8VDD - - V

- - 0.2VDD V

- - 20 KΩ

- - 30 KΩ

3.0 - 9.0 V VDD-V5, 1/4 bias or 1/5 bias

Unit Test Condition

Pins:(E, RS, R/W, DB0 - DB7)

Pin OSC1

Pins: (RS, R/W, DB0 - DB7)

VDD = 3.0V

I

= - 0.1mA

OH

Pins: DB0 - DB7

I

= 0.1mA

OL

Pins: DB0 - DB7

I

= - 40µA,

OH

Pins: CL1, CL2, M, D

I

= 40µA, Pins:

OL

CL1, CL2, M, D

= ±50µA, V

I

O

Pins: COM1 - COM16

= ±50µA, V

I

O

Pins: SEG1 - SEG40

LCD

LCD

= 4.0V

= 4.0V

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6.3. AC Characteristics (VDD = 2.7V to 4.5V, TA = 25℃)

6.3.1. Internal clock operation

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Characteristics Symbol

OSC Frequency F

OSC1

Min. Typ. Max.

190 270 350 KHz

Limit

6.3.2. External clock operation

Characteristics Symbol

External Frequency F

Duty Cycle 45 50 55 %

Rise/Fall Time t r, t f - - 0.2 µs

OSC2

Min. Typ. Max.

125 250 350 KHz

Limit

6.3.3. Write mode (Writing data from MPU to SPLC780D)

Characteristics Symbol

E Cycle Time

E Pulse Width

E Rise/Fall Time

Address Setup Time

Address Hold Time

Data Setup Time

Data Hold Time

Min. Typ. Max.

t

C

t

PW

, t

t

R

F

t

SP1

t

HD1

t

SP2

t

HD2

1000 - - ns Pin E

450 - - ns Pin E

- - 25 ns Pin E

60 - - ns Pins: RS, R/W, E

20 - - ns Pins: RS, R/W, E

195 - - ns Pins: DB0 - DB7

10 - - ns Pins: DB0 - DB7

Limit

6.3.4. Read mode (Reading data from SPLC780D to MPU)

Unit Test Condition

VDD = 3.0V, Rf = 75K

Unit Test Condition

Unit Test Condition

Ω±2%

Characteristics Symbol

E Cycle Time

E Pulse Width

E Rise/Fall Time

Address Setup Time

Address Hold Time

Data Output Delay Time

Data hold time

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Min. Typ. Max.

t

C

t

W

, t

t

R

F

t

SP1

t

HD1

t

D

t

HD2

1000 - - ns Pin E

450 - - ns Pin E

- - 25 ns Pin E

60 - - ns Pins: RS, R/W, E

20 - - ns Pins: RS, R/W, E

- - 360 ns Pins: DB0 - DB7

5.0 - - ns Pin DB0 - DB7

Unit Test Condition

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Preliminary Version: 0.1

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6.4. DC Characteristics (VDD = 4.5V to 5.5V, TA = 25℃)

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Characteristics Symbol

Operating Current

Input High Voltage

Input Low Voltage

Input High Voltage

Input Low Voltage

Input High Current

Input Low Current

Output High

Voltage (TTL)

Output Low

Voltage (TTL)

Output High

Voltage (CMOS)

Output Low

Voltage (CMOS)

Driver ON Resistance

(COM)

Driver ON Resistance

(SEG)

LCD Voltage

Note: F

= 250KHz, VDD = 5.0V, pin E = “L”, RS, R/W, DB0 - DB7 are open, all outputs are no loads.

OSC

I

DD

V

IH1

V

IL1

V

IH2

V

IL2

I

IH

I

IL

V

OH1

V

OL1

V

OH2

V

OL2

R

COM

R

SEG

V

LCD

Min. Typ. Max.

- 0.55 0.8 mA External clock (Note)

2.2 - VDD V Pins:(E, RS, R/W, DB0 - DB7)

-0.3 - 0.6 V

VDD-1 - VDD V Pin OSC1

-0.2 - 1.0 V Pin OSC1

-2.0 - 2.0 µA

-20 -50 -100 µA

2.4 - VDD V

- - 0.4 V

0.9VDD - VDD V

- - 0.1VDD V

- - 20 KΩ

- - 30 KΩ

3.0 - 11 V VDD-V5, 1/4 bias or 1/5 bias

6.5. AC Characteristics (VDD = 4.5V to 5.5V, TA = 25℃)

Limit

Unit Test Condition

Pins: (RS, R/W, DB0 - DB7)

VDD = 5.0V

I

= - 0.1mA

OH

Pins: DB0 - DB7

I

= 0.1mA

OL

Pins: DB0 - DB7

I

= - 40µA,

OH

Pins: CL1, CL2, M, D

I

= 40µA, Pins:

OL

CL1, CL2, M, D

= ±50µA, V

I

O

Pins: COM1 - COM16

= ±50µA, V

I

O

Pins: SEG1 - SEG40

LCD

LCD

= 4.0V

= 4.0V

6.5.1. Internal clock operation

Sunplus Confidential

Characteristics Symbol

OSC Frequency F

6.5.2. External clock operation

Characteristics Symbol

External Frequency

Duty Cycle

Rise/Fall Time

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For GUEST Use Only

Limit

Min. Typ. Max.

OSC1

F

OSC2

45 50 55 %

t r, t f - - 0.2

190 270 350 KHz

Limit

Min. Typ. Max.

125 250 350 KHz

22 AUG. 06, 2003

Unit Test Condition

VDD = 5.0V, Rf = 91K

Unit Test Condition

µs

Ω±2%

Preliminary Version: 0.1

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6.5.3. Write mode (Writing Data from MPU to SPLC780D)

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Characteristics Symbol

E Cycle Time

E Pulse Width

E Rise/Fall Time

Address Setup Time

Address Hold Time

Data Setup Time

Data Hold Time

Min. Typ. Max.

t

C

t

PW

, t

t

R

F

t

SP1

t

HD1

t

SP2

t

HD2

500 - - ns Pin E

230 - - ns Pin E

- - 20 ns Pin E

40 - - ns Pins: RS, R/W, E

10 - - ns Pins: RS, R/W, E

80 - - ns Pins: DB0 - DB7

10 - - ns Pins: DB0 - DB7

Limit

6.5.4. Read mode (Reading Data from SPLC780D to MPU)

Characteristics Symbol

E Cycle Time

E Pulse Width

E Rise/Fall Time

Address Setup Time

Address Hold Time

Data Output Delay Time

Data hold time

Min. Typ. Max.

t

C

t

W

, t

t

R

F

t

SP1

t

HD1

t

D

t

HD2

500 - - ns Pin E

230 - - ns Pin E

- - 20 ns Pin E

40 - - ns Pins: RS, R/W, E

10 - - ns Pins: RS, R/W, E

- - 120 ns Pins: DB0 - DB7

5.0 - - ns Pin DB0 - DB7

Limit

6.5.5. Interface mode with LCD Driver (SPLC100A1)

Unit Test Condition

Unit Test Condition

Characteristics Symbol

Clock pulse width high t

Clock pulse width low t

Clock setup time t

Data setup time t

Data hold time t

M delay time t

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PWH

PWL

CSP

DSP

HD

Limit

Min. Typ. Max.

800 - - ns Pins: CL1, CL2

800 - - ns Pins: CL1, CL2

500 - - ns Pins: CL1, CL2

300 - - ns Pins: D

300 - - ns Pins: D

D

-1000 - 1000 ns Pins: M

Unit Test Condition

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6.5.6. Write mode timing diagram (Writing Data from MPU to SPLC780D)

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VIH1
VIL1

tC

VIH1
VIL1

tF

tHD2

VIH1
VIL1

tHD1

tHD1

tHD1

RS

R / W

E

DB7 - 0

6.5.7. Read mode timing diagram (Reading Data from SPLC780D to MPU)

RS

R / W

VIH1
VIL1

tSP1

VIL1

VIH1
VIL1

tSP1

VIH1

tPW

VIH1
VIL1

tR

V

IH1

VIL1

tSP2

Valid Data

VIL1

VIL1

VIH1
VIL1

VIH1

E

DB0 - DB7

VIH1
VIL1

tR

tD

V

IH1

VIL1

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6.5.8. Interface mode with SPLC100A1 timing diagram

For GUEST Use Only

CL1

CL2

D

M

0.9VDD

0.1VDD

tPWH

tCSP

0.1VDD

tCSP

tD

tPW

Valid Data

0.9VDD

tPWH

0.9VDD

0.1VDD

tDSP tHD

0.1VDD

VIH1
VIL1

tC

0.9VDD

tPWL

0.9VDD

0.1VDD

tF

tHD1

VIL1

tHD2

VIH1
VIL1

© Sunplus Technology Co., Ltd.

Proprietary & Confidential

24 AUG. 06, 2003

Preliminary Version: 0.1

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7. APPLICATION CIRCUITS

7.1. R-Oscillator

The oscillation resistor Rf is used only for the internal oscillator operation mode.

OSC1

Rf : 75.0KΩ±2% ( when VDD = 3.0V)

R

f : 91KΩ± 2% ( when VDD = 5.0V)

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SPLC780D

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OSC2

400

200

Fosc ( KHz )

Since the oscillation frequency varies depending on the OSC
pin capacitance, the wiring length to these pins should be minimized.

270

0

75

0 100 200 300 400

VDD = 3.0V VDD = 5.0V

7.2. Interface to MPU

7.2.1. Interface to 8-bit MPU (6805)

PA0

|

PA7

6805

Sunplus Confidential

PB0

PB1
PB2

Rosc ( Kohms )

8

DB0

|

DB7

SPLC780D

E

RS

R / W

COM1

|

COM16

SEG1

|

SEG40

1 and OSC2

600

400

270

200

Fosc ( KHz )

0

91

0 100 200 300 400

Rosc ( Kohms )

16

40

LCD PANEL

16 COMMONS

X

40 SEGMENTS

For GUEST Use Only

7.2.2. Interface to 8-bit MPU (Z80)

D0

D7

Z80

© Sunplus Technology Co., Ltd.

Proprietary & Confidential

A1

A7

IORQ

WR

|

|

A0

8

7

DB0

|

DB7

SPLC780D

E

RS

R / W

COM1

|

COM16

SEG1

|

SEG40

25 AUG. 06, 2003

16

40

LCD PANEL

16 COMMONS

X

40 SEGMENTS

Preliminary Version: 0.1

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7.3. SPLC780D Application Circuit

DOT MATRIX LCD

PANEL

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SPLC780D

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16
(8)

COM16

COM1

|

(COM8)

SPLC780D

40

SEG1

|

VDD
GND

CL1
CL2

M
V1
V2
V3
V4
V5

40

SEG40

Y1-Y40

DL1
VDD
FCS
SHL1
SHL2
GND

VEE

V1V2V3V4V5V6

SPLC100A1

DR2

DL2
DR1

CL1
CL2

M

VDD
FCS
SHL1

SHL2
GND

V1V2V3 V4V5V6

40

SPLC100A1

Y1-Y40 Y1-Y40

DL1

VEE

DR2

DL2
DR1

CL1
CL2

M

DL1
VDD
FCS
SHL1
SHL2
GND

VEE

V1V2V3 V4V5V6

40

SPLC100A1

DR2

DL2
DR1

CL1
CL2

M

Sunplus Confidential

VDD ( +5V )

© Sunplus Technology Co., Ltd.

Proprietary & Confidential

RR R R VR

C

For GUEST Use Only

R

C

C

C

C

26 AUG. 06, 2003

-V or Gnd

Preliminary Version: 0.1

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s

7.4. Applications for LCD

SPLC780D

COM1

PPrreelliimmiinnaar

SPLC780D

LCD Panel

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SPLC780D

COM8

SEG1

SEG40

COM1

COM11

SEG1

SEG40

8 characters x 1 lin

( Example 1 ) : 5 x 8 dots , 8 characters x 1 line [ 1 / 4 Bias , 1 / 8 Duty ]

LCD Panel

8 characters x 1 lin

( Example 2 ) : 5 x 10 dots , 8 characters x 1 line [ 1 / 4 Bias , 1 / 11 Duty ]

SPLC780D

COM1

COM8
COM9

COM16

SEG1

SEG40

© Sunplus Technology Co., Ltd.

Proprietary & Confidential

Sunplus Confidential

( Example 3 ) : 5 x 8 dots , 8 characters x 2 lines [ 1 / 5 Bias , 1 / 16 Duty ]

For GUEST Use Only

LCD Panel

8 characters x 2 line

27 AUG. 06, 2003

Preliminary Version: 0.1

y

s

SPLC780D

COM1

COM8

SEG1

SEG40

COM9

COM16

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r

SPLC780D

y

SPLC780D

SEG1

SEG20

COM1

COM8

( Example 4 ) : 5 x 8 dots , 16 characters x 1 line [ 1 / 5 Bias , 1 / 16 Duty ]

Sunplus Confidential

LCD Panel

4 characters x 2 line

For GUEST Use Only

SEG21

SEG40

( Example 5 ) : 5 x 8 dots , 4 characters x 2 lines [ 1 / 4 Bias , 1 / 8 Duty ]

© Sunplus Technology Co., Ltd.

Proprietary & Confidential

28 AUG. 06, 2003

Preliminary Version: 0.1

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8. CHARACTER GENERATOR ROM

8.1. SPLC780D - 001

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SPLC780D

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Sunplus Confidential

© Sunplus Technology Co., Ltd.

Proprietary & Confidential

For GUEST Use Only

29 AUG. 06, 2003

Preliminary Version: 0.1

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9. PACKAGE/PAD LOCATIONS

9.1. PAD Assignment and Locations

Please contact Sunplus sales representatives for more information.

PPrreelliimmiinnaar

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SPLC780D

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Sunplus Confidential

© Sunplus Technology Co., Ltd.

Proprietary & Confidential

For GUEST Use Only

30 AUG. 06, 2003

Preliminary Version: 0.1

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9.2. Package Configuration

QFP 80L Top View

68 SEG3 5

69 SEG3 4

70 SEG3 3

71 SEG3 2

72 SEG3 1

73 SEG3 0

74 SEG2 9

75 SEG2 8

76 SEG2 7

79 SEG2 4

80 SEG2 3

77 SEG2 6

78 SEG2 5

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SPLC780D

65 SEG3 8

66 SEG3 7

67 SEG3 6

1SEG22

2SEG21

3SEG20

4SEG19

5SEG18

6SEG17

7SEG16

8SEG15

9SEG14

10SEG13

11SEG12

12SEG11

13SEG10

14SEG09

15SEG08

16SEG07

17SEG06

18SEG05

19SEG04

20SEG03

21SEG02

22SEG01

23VSS

24OSC1

Sunplus Confidential

For GUEST Use Only

SPLC780D-

XXX

64 SEG39

63 SEG40

62 COM16

61 COM15

60 COM14

59 COM13

58 COM12

57 COM11

56 COM10

55 COM9

54 COM8

53 COM7

52 COM6

51 COM5

50 COM4

49 COM3

48 COM2

47 COM1

46 DB7

45 DB6

44 DB5

43 DB4

42 DB3

41 DB2

© Sunplus Technology Co., Ltd.

Proprietary & Confidential

25OSC2

26V1

27V2

28V3

29V4

30V5

31CL1

32CL2

33VDD

34M

35D

36RS

37

38E

39DB0

40DB1

R/W

31 AUG. 06, 2003

Preliminary Version: 0.1

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PPrreelliimmiinnaar

9.3. Package Information

QFP 80L Outline Dimensions Unit: Millimeter

D

D1

SPLC780D

y

r

SUNPLUS

E1E

SPLC780D
YYWW

e

b

c

L1

Symbol Min. Nom. Max. Unit

D 23.20 REF Millimeter

D1 20.00 REF Millimeter

E 17.20 REF Millimeter

E1 14.00 REF Millimeter

e 0.80 REF Millimeter

b 0.30 0.35 0.45 Millimeter

A - - 3.40 Millimeter

A1 0.25 - - Millimeter

A2 2.50 2.72 2.90 Millimeter

c 0.11 0.15 0.23 Millimeter

L1 1.60 REF Millimeter

Sunplus Confidential

For GUEST Use Only

AA2

A1

© Sunplus Technology Co., Ltd.

Proprietary & Confidential

32 AUG. 06, 2003

Preliminary Version: 0.1

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PPrreelliimmiinnaar

10. DISCLAIMER

The information appearing in this publication is believed to be accurate.

Integrated circuits sold by Sunplus Technology are covered by the warranty and patent indemnification provisions stipulated in the terms of

sale only. SUNPLUS makes no warranty, express, statutory implied or by description regarding the information in this publication or

regarding the freedom of the described chip(s) from patent infringement. FURTHER, SUNPLUS MAKES NO WARRANTY OF

MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. SUNPLUS reserves the right to halt production or alter the specifications and

prices at any time without notice. Accordingly, the reader is cautioned to verify that the data sheets and other information in this

publication are current before placing orders. Products described herein are intended for use in normal commercial applications.

Applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support equipment, are

specifically not recommended without additional processing by SUNPLUS for such applications. Please note that application circuits

illustrated in this document are for reference purposes only.

SPLC780D

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Sunplus Confidential

For GUEST Use Only

© Sunplus Technology Co., Ltd. 33 AUG. 06, 2003

Proprietary & Confidential Preliminary Version: 0.1

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11. REVISION HISTORY

Date Revision # Description Page

AUG. 06, 2003 0.1 Original 34

SPLC780D

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Sunplus Confidential

© Sunplus Technology Co., Ltd.

Proprietary & Confidential

For GUEST Use Only

34 AUG. 06, 2003

Preliminary Version: 0.1