Page 1
SPA20N60CFD
CoolMOSTM Power Transistor
Features
• New revolutionary high voltage technology
• Intrinsic fast-recovery body diode
Product Summary
V
DS
R
DS(on),max
1)
I
D
• Extremely low reverse recovery charge
• Ultra low gate charge
• Extreme dv /dt rated
• High peak current capability
• Periodic avalanche rated
0)
• Qualified according to JEDEC
for target applications
• Pb-free lead plating; RoHS compliant
Type Package Ordering Code Marking
SPA20N60CFD PG-TO220-3-31 SP000216361 20N60CFD
600 V
0.22
20.7 A
PG-TO220-3-31
Ω
Maximum ratings, at T
Parameter Symbol Conditions Unit
Continuous drain current
Pulsed drain current
Avalanche energy, single pulse
Avalanche energy, repetitive t
Avalanche current, repetitive t
Drain source voltage slope dv /dt
Reverse diode dv /dt dv /dt V/ns
Maximum diode commutation speed di /dt A/µs
Gate source voltage
Power dissipation
=25 °C, unless otherwise specified
j
1)
I
D
TC=25 °C
T
2)
AR
AR
2),3)
2),3)
I
D,pulse
E
AS
E
AR
I
AR
TC=25 °C
ID=10 A, VDD=50 V
ID=20 A, VDD=50 V
I
V
I
T
V
GS
static V
AC (f >1 Hz)
P
tot
TC=25 °C
=100 °C
C
=20.7 A,
D
=480 V, T j=125 °C
DS
=20.7 A, V DS=480 V,
S
=125 °C
j
Value
20.7
13.1
52
690 mJ
1
20
80
40
900
±20
±30
35
A
A
V/ns
W
Operating and storage temperature
T
j
stg
-55 ... +150
°C
, T
Rev. 1.2 page 1 2006-05-15
Page 2
SPA20N60CFD
Parameter Symbol Conditions Unit
Values
min. typ. max.
Thermal characteristics
Thermal resistance, junction - case
Thermal resistance, junction ambient
Soldering temperature, wave solderin
Electrical characteristics, at T
R
thJC
R
thJA
T
sold
=25 °C, unless otherwise specified
j
leaded - - 62
1.6 mm (0.063 in.)
from case for 10 s
- - 3.6 K/W
- - 260 °C
Static characteristics
Drain-source breakdown voltage
Avalanche breakdown voltage
Gate threshold voltage
V
(BR)DSSVGS
V
(BR)DSVGS
V
GS(th)
=0 V, I D=250 µA
=0 V, I D=20 A
VDS=VGS, ID=1000µA
600 - - V
- 700 -
345
Zero gate voltage drain current
Gate-source leakage current
Drain-source on-state resistance
Gate resistance
Transconductance
I
I
R
R
g
DSS
GSS
DS(on)
G
fs
VDS=600 V, VGS=0 V,
T
=25 °C
j
V
=600 V, V GS=0 V,
DS
T
=150 °C
j
VGS=20 V, VDS=0 V
VGS=10 V, ID=13.1 A,
T
=25 °C
j
V
=10 V, I D=13.1 A,
GS
T
=150 °C
j
- 2.1 - µA
- 1700 -
- - 100 nA
- 0.19 0.22
- 0.43 -
f =1 MHz, open drain - 0.54 -
|V DS|>2|I D|R
I
=13.1 A
D
DS(on)max
,
- 17.5 - S
Ω
Rev. 1.2 page 2 2006-05-15
Page 3
SPA20N60CFD
Parameter Symbol Conditions Unit
Values
min. typ. max.
Dynamic characteristics
Input capacitance
Output capacitance
Reverse transfer capacitance
Effective output capacitance, energy
4)
related
Effective output capacitance, time
related5
)
Turn-on delay time
Rise time
Turn-off delay time
Fall time
C
C
C
C
C
t
t
t
t
iss
oss
rss
o(er)
o(tr)
d(on)
r
d(off)
f
=0 V, V DS=25 V,
V
GS
f =1 MHz
=0 V, V DS=0 V
V
GS
to 480 V
V
=380 V,
DD
V
=10 V, I D=20.7 A,
GS
=3.6 Ω
R
G
- 2400 - pF
- 780 -
-5 0-
-8 3-
- 160 -
-1 2- n s
-1 5-
-5 9-
- 6.4 -
Gate Charge Characteristics
Gate to source charge
Gate to drain charge
Gate charge total
Gate plateau voltage
0)
J-STD20 and JESD22
1)
Limited only by maximum temperature.
2)
Pulse width t p limited by T
3)
Repetitive avalanche causes additional power losses that can be calculated as P AV=E AR*f.
4)
C
is a fixed capacitance that gives the same stored energy as C
o(er)
5)
C
is a fixed capacitance that gives the same charging time as C
o(tr)
j,max
Q
Q
Q
V
gs
gd
g
plateau
=480 V,
V
DD
I
=20.7 A,
D
V
=0 to 10 V
GS
while V DS is rising from 0 to 80% V
oss
while V DS is rising from 0 to 80% V
oss
-1 5- n C
-5 4-
- 95 124
- 7.0 - V
DSS.
DSS.
Rev. 1.2 page 3 2006-05-15
Page 4
SPA20N60CFD
Parameter Symbol Conditions Unit
Values
min. typ. max.
Reverse Diode
Diode continuous forward current
Diode pulse current
2)
Diode forward voltage
Reverse recovery time
Reverse recovery charge
Peak reverse recovery current
I
S
I
S,pulse
V
SD
t
rr
Q
I
rrm
=25 °C
T
C
VGS=0 V, IF=20.7 A,
T
=25 °C
j
V
=480 V, I F=I S,
rr
R
di
/dt =100 A/µs
F
- - 20.7 A
--5 2
- 1.0 1.2 V
- 150 - ns
-1- µ C
-1 3- A
1)
Typical Transient Thermal Characteristics
Symbol Value Unit Symbol Value Unit
typ. typ.
R
th1
0.00862 K/W C
th1
0.000205 Ws/K
R
R
R
R
5)
R
th2
th3
th4
th5
C
thCA
th6
=0 K/W.
0.0471 C
0.119 C
0.476 C
1.57 C
th2
th3
th4
th5
C
th6
0.00198
0.0068
0.0482
0.957
0.1
models the additional heat capacitance of the package in case of non-ideal cooling. It is not needed if
Rev. 1.2 page 4 2006-05-15
Page 5
1 Power dissipation 2 Safe operating area
P
=f(T C) I D=f(V DS); T C=25 °C; D =0
TOT
40
30
[W]
20
tot
P
10
0
0 40 80 120 160
TC [°C]
parameter: t
[A]
D
I
10
10
10
10
2
1
0
-1
p
limited by on-state
resistance
0
10
10
1
VDS [V]
SPA20N60CFD
1 µs
10 µs
100 µs
10 ms
1 ms
DC
10
2
10
3
3 Max. transient thermal impedance 4 Typ. output characteristics
Z
=f(tP) ID=f( VDS); Tj=25 °C
thJC
parameter: D=t
1
10
0.5
0
10
0.2
0.1
[K/W]
0.05
thJC
Z
0.02
-1
10
0.01
single pulse
-2
10
10
/T parameter: V
p
2
1
0
-1
-2
-3
-4
-5
10
10
10
10
10
10
10
tp [s]
GS
60
50
40
30
[A]
D
I
20
10
0
0 5 10 15 20 25
VDS [V]
5.5 V
10 V
8 V
7.5 V
7 V
6.5 V
6 V
5 V
Rev. 1.2 page 5 2006-05-15
Page 6
SPA20N60CFD
5 Typ. output characteristics 6 Typ. drain-source on-state resistance
I
=f(V DS); Tj=150°C R
D
parameter: V
GS
=f(I D); T j=150 °C
DS(on)
parameter: V
GS
1.5
4.5 V
5.5 V
6.5 V
6 V
1.2
5 V
0.9
]
Ω
[
DS(on)
R
0.6
[A]
D
I
40
30
20
20 V
7.5 V
7 V
6.5 V
6 V
10
5.5 V
5 V
4.5 V
0
0 4 8 1 21 62 02 42 8
VDS [V]
0.3
0
0 1 02 03 04 0
ID [A]
7 Drain-source on-state resistance 8 Typ. transfer characteristics
R
=f(T j); I D=13.1 A; V GS=10 V I D=f(V GS); |V DS|>2|I D|R
DS(on)
parameter: T
j
DS(on)max
7 V
7.5 V
20 V
0.6
0.5
typ
98 %
70
60
C °25
50
0.4
]
Ω
[
R
0.3
DS(on)
[A]
D
I
40
C °150
30
0.2
20
0.1
0
-60 -20 20 60 100 140 180
Tj [°C]
10
0
0 4 8 12 16 20
VGS [V]
Rev. 1.2 page 6 2006-05-15
Page 7
SPA20N60CFD
9 Typ. gate charge 10 Forward characteristics of reverse diode
V
=f(Q
GS
parameter: V
); I D=20.7 A pulsed I F=f(V SD)
gate
DD
15
parameter: T
2
10
j
120 V
10
480 V
[V]
GS
V
[A]
F
I
10
1
5
0
0 50 100 150
Q
[nC]
gate
-1
10
0 0.5 1 1.5 2
11 Avalanche SOA 12 Avalanche energy
I
=f(t AR) E AS=f(T j); I D=10 A; V DD=50 V
AR
parameter: T
20
j(start)
750
150 °C
25°C, 98%
150°C 98%
25 °C
VSD [V]
600
15
450
[A]
10
AV
I
125 °C
25 °C
[mJ]
E
AS
300
5
150
0
10
-3
10
10
10
10
10
10
10
4
3
2
1
0
-1
-2
tAR [µs]
0
20 60 100 140 180
Tj [°C]
Rev. 1.2 page 7 2006-05-15
Page 8
13 Drain-source breakdown voltage 14 Typ. capacitances
SPA20N60CFD
V
)=f(Tj);I D=10mA C =f(V DS); V GS=0 V; f =1 MHz
BR(DSS
700
660
10
10
10
5
4
3
[V]
620
BR(DSS)
V
580
540
-60 -20 20 60 100 140 180
[pF]
C
2
10
1
10
0
10
0 100 200 300 400 500
Tj [°C]
Ciss
Coss
Crss
VDS [V]
15 Typ. C
E
= f (VDS)Q
oss
[µJ]
oss
E
stored energy 16 Typ. reverse recovery charge
oss
=f(T j); I S=20.7 A
rr
14
12
10
8
6
4
2
0
0 200 400 600
1.8
1.6
1.4
[µC]
rr
Q
1.2
1
25 50 75 100 125
VDS [V]
Tj [°C]
Rev. 1.2 page 8 2006-05-15
Page 9
17 Typ. reverse recovery charge 18 Typ. reverse recovery charge
Q
= f (IS); d i /d t =100A/µs Qrr=f(di /dt ); ID=20.7 A
rr
parameter: T
j
parameter: T
j
SPA20N60CFD
2
1.5
1
[µC]
rr
Q
0.5
0
2 4 6 8 10 12 14 16 18 20
125 °C
25 °C
IS [A]
3.5
3
2.5
[µC]
rr
Q
125 °C
2
1.5
25 °C
1
100 300 500 700 900
di/ dt [A/µs]
Rev. 1.2 page 9 2006-05-15
Page 10
Definition of diode switching characteristics
SPA20N60CFD
Rev. 1.2 page 10 2006-05-15
Page 11
PG-TO220-3-31: Outline
SPA20N60CFD
Dimensions in mm
Rev. 1.2 page 11 2006-05-15
Page 12
SPA20N60CFD
Published by
Infineon Technologies AG
D-81726 München, Germany
© Infineon Technologies AG 2006
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as
warranted characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement,
regarding circuits, descriptions and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
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For further information on technology, delivery terms and conditions and prices, please contact your
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(see address list).
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Due to technical requirements, components may contain dangerous substances.
For information on the types in question, please contact your nearest Infineon Technologies office.
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Rev. 1.2 page 12 2006-05-15