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Product Description
Stanford Microdevices’ SNA-400 is a GaAs monolithic
broadband amplifier (MMIC) in die form. This amplifier
provides 13dB of gain when biased at 70mA and 5.0V.
P1dB and TOIP may be improved by 2dB by biasing @
100mA.
External DC decoupling capacitors determine low
frequency response. The use of an external resistor
allows for bias flexibility and stability.
These unconditionally stable amplifiers are designed for
use as general purpose 50 ohm gain blocks. Also available
in packaged form (SNA-476, -486 & -487), its small size
(0.4mm x 0.4mm) and gold metallization make it an ideal
choice for use in hybrid circuits.
SNA-400
DC-8 GHz, Cascadable
GaAs MMIC Amplifier
The SNA-400 is available in gel pak at 100 devices per
container.
Product Features
• Cascadable 50 Ohm Gain Block
Output Power vs. Frequency
22
20
18
dBm
16
14
0.10.511.5246810
GHz
• 13dB Gain, +17dBm P1dB
• 1.5:1 Input and Output VSWR
• Operates From Single Supply
• Chip Back Is Ground
Applications
• Narrow and Broadband Linear Amplifiers
• Commercial and Industrial Applications
Electrical Specifications at Ta = 25C
Symbol
G
G
BW 3dB 3dB B andwidth GHz 8.0
P
NF N oise Figure f = 2.0 GH z dB 5.5 6.0
VS WR Input / O utput f = 0.1-8.0 GH z 1.5:1
IP
T
ISO L Reverse Isolation f = 0.1-8.0 GH z dB 18.0
VD D evice Voltage V 4 .3 5 .0 5 .7
dG /dT D evice Gain Tem perature C oefficient dB/degC -0.0027
dV/dT Device Voltage Tem perature Coefficient m V/degC -5.0
The information provided herein is believed to be reliable at press time. Stanford Microdevices assumes no responsibility for inaccuracies or omissions.
Stanford Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. Stanford Microdevices does not authorize or warrant any Stanford
Microdevices product for use in life-support devices and/or systems.
Copyright 1999 Stanford Microdevices, Inc. All worldwide rights reserved.
522 Almanor Ave., Sunnyvale, CA 94086 Phone: (800) SMI-MMIC http://www.stanfordmicro.com
P ara m e ters : Tes t C on d itio ns :
Id = 70m A, Z
Sm all Signal Power Gain
P
G ain Flatness f = 0.1-6.0 GH z dB +/- 1.0
F
O utput Power at 1dB C ompression f = 2.0 GH z dBm 17.0
1dB
Third Order Intercept P oint f = 2.0 GH z dBm 34.0
3
G roup D elay f = 2.0 G Hz psec 120
D
= 50 O hms
0
f = 0.1-2.0 GH z
f = 2.0-6.0 GH z
f = 6.0-8.0 GH z
Units Min. Typ . M ax.
dB
dB
dB
5-53
11 .0
10.0
9.0
13.0
12.0
11 .0
50 Ohm Gain Blocks
Page 2
SNA-400 DC-8 GHz Cascadable MMIC Amplifier
Typical Performance at 25
°°
°
C (Vds = 5.0V , Ids = 70mA)
°°
0
-5
-10
dB
-15
-20
-25
0.10.511.5246810
|S12| vs. Frequency
|S11| vs. Frequency
0
-5
-10
dB
-15
-20
-25
0.1 0.5 1 1.5 2 4 6 8 10
50 Ohm Gain Blocks
Noise Figure vs. Frequency
7
6
dB
5
4
0.1 2.0 4.0 6.0 8.0
GHz
GHz
GHz
16
|S21| vs. Frequency
14
12
dB
10
8
0.10.511.5246810
GHz
|S22| vs. Frequency
0.1 0.5 1 1.5 2 4 6 8 10
GHz
TOIP vs. Frequency
0.10.511.5246810
GHz
dB
dBm
0
-5
-10
-15
-20
-25
38
36
34
32
30
28
Typical Chip S-Parameters Vds = 5.0V, Id = 70mA
Freq GHz |S 11| S11 Ang |S21| S21 Ang |S 12| S12 Ang |S22| S22 A ng
.100
.250
.500
1.00
1.50
2.00
4.00
6.00
8.00
522 Almanor Ave., Sunnyvale, CA 94086 Phone: (800) SMI-MMIC http://www.stanfordmicro.com
0.233 178 5.121 175 0.116 3 0.143 -179
0.235 175 5.119 172 0.118 3 0.146 -175
0.236 176 5.119 170 0.121 2 0.148 -173
0.233 174 5.118 167 0.122 1 0.154 -172
0.229 172 5.260 161 0.123 1 0.160 -164
0.221 171 5.385 154 0.124 1 0.174 -162
0.187 177 6.231 117 0.129 1 0.253 -164
0.242 179 5.482 67 0.134 0 0.30 8 174
0.278 165 3.479 29 0.13 6 -4 0.264 156
5-54
Page 3
SNA-400 DC-8 GHz Cascadable MMIC Amplifier
Absolute Maximum Ratings
Parameter
Devic e Current 1 30m A
Power Dissipation 750mW
RF In pu t Po we r 200m W
Junction Temperature +200C
Operating Temperature -45C to +85C
Storage Temperature -65C to +150C
Notes:
1. Operation of this device above any one of these
parameters may cause permanent damage.
Absolute
Maximum
MTTF vs. Temperature @ Id = 70mA
Die Bottom
+65C +155C 1000000
+100C +190C 100000
+130C +220C 10000
Thermal Resistance (Lead-Junction): 265° C/W
Junction
Temperature
MTTF (hrs)
Die Attach
The die attach process mechanically attaches the die to
the circuit substrate. In addition, it electrically connects
the ground to the trace on which the die is mounted and
establishes the thermal path by which heat can leave the
die.
Assembly Techniques
Epoxy die attach is recommended. The top and bottom
metallization is gold. Conductive silver-filled epoxies are
recommended. This method involves the use of epoxy to
form a joint between the backside gold of the chip and
the metallized area of the substrate. A 150 C cure for 1
hour is necessary. Recommended epoxy is Ablebond
84-1LMIT1 from Ablestik.
Part Number Ordering Information
Part Number Devices Per Pak
SNA-400 100
6.0
5.0
Typical Biasing Configuration
Wire Bonding
Electrical connections to the die are through wire
bonds. Stanford Microdevices recommends wedge
bonding or ball bonding to the pads of these devices.
Recommended Wedge Bonding Procedure
1. Set the heater block temperature to 260C +/- 10C.
2. Use pre-stressed (annealed) gold wire between
0.0005 to 0.001 inches in diameter.
3. Tip bonding pressure should be between 15 and
20 grams and should not exceed 20 grams. The
footprint that the wedge leaves on the gold wire
should be between 1.5 and 2.5 wire diameters
across for a good bond.
50 Ohm Gain Blocks
522 Almanor Ave., Sunnyvale, CA 94086 Phone: (800) SMI-MMIC http://www.stanfordmicro.com
5-55
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