Single-Chip RS-232 Interface for IBM PC
Compatible Serial Port
D
Designed to Transmit and Receive 4-µs Pulses
(Equivalent to 256 kbit/s)
D
Standby Power Is Less Than 750 µW Maximum
D
Wide Supply-Voltage Range . . . 4.75 V to 15 V
D
Driver Output Slew Rates Are Internally
Controlled to 30-V/µs Maximum
D
RS-232 Bus-Pin ESD Protection Exceeds:
– 15 kV, Human-Body Model
– 8-kV IEC1000-4-2, Contact
– 15-kV IEC1000-4-2, Air Gap
D
Receiver Input Hysteresis . . . 1000 mV Typical
D
Three Drivers and Five Receivers Meet or
Exceed the Requirements of TIA/EIA-232-F and
ITU v.28 Standards
D
Complements the SN75LP196
D
One Receiver Remains Active During WAKE-UP
Mode (100 µA Maximum)
D
Matches the Flow-Through Pinout of the
Industry-Standard SN75185, SN75C185, and
SN75LP185, With Additional Control Pins
D
Package Options Include Plastic Shrink
Small-Outline (DB), Small-Outline (DW), Thin
Shrink Small-Outline (PW), and Standard
Plastic (NT) DIPs
DB, DW, NT, OR PW PACKAGE
MODE
NC – No internal connection
V
DD
RA1
RA2
RA3
DY1
DY2
RA4
DY3
RA5
V
SS
EN
(TOP VIEW)
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
V
CC
RY1
RY2
RY3
DA1
DA2
RY4
DA3
RY5
GND
NC
NC
description
The SN75LPE185 is a low-power bipolar device containing three drivers and five receivers, with 15-kV ESD
protection on the bus pins, with respect to each other. Bus pins are defined as those pins that tie directly to the
serial-port connector, including GND. The pinout matches the flow-through design of the industry-standard
SN75185, SN75C185, and SN75LP185, with the addition of four pins for control signals. The flow-through
pinout of the device allows easy interconnection of the UART and serial-port connector of the IBM PC
compatibles. The SN75LPE185 provides a rugged, low-cost solution for this function with the combination of
bipolar processing and 15-kV ESD protection.
The SN75LPE185 has an internal slew-rate control to provide a maximum rate of change in the output signal
of 30 V/µs. The driver output swing is clamped at ±6 V to enable the higher data rates associated with this device
and reduce EMI emissions. Although the driver outputs are clamped, the outputs can handle voltages up to
±15 V without damage.
The device has flexible control options for power management when the serial port is inactive. A common
disable for all of the drivers and receivers is provided with the active-low enable (EN
(MODE) input selects between the ST ANDBY and W AKE-UP modes. With a low-level input on the MODE pin
and a high-level input on the EN
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
IBM and PC are trademarks of International Business Machines Corporation.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
pin, one receiver remains active while the remaining drivers and receivers are
Copyright 1998, Texas Instruments Incorporated
) input. The mode control
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
Page 2
SN75LPE185
LOW-POWER MULTIPLE RS-232 DRIVERS/RECEIVERS
WITH ENABLE
SLLS256D – DECEMBER 1996 – REVISED OCTOBER 1998
description (continued)
disabled to implement the WAKE-UP mode. With a high-level input on both the MODE and EN pins, all drivers
and receivers are disabled to implement the STANDBY mode. The outputs of the drivers are in a
high-impedance state when the device is powered off. To ensure the outputs of the receivers are in a known
output level (as listed in the
in ST ANDBY , or WAKE-UP mode, external pullup/pulldown circuitry must be provided. All the logic inputs accept
3.3-V or 5-V input signals.
The SN75LPE185 complies with the requirements of TIA/EIA-232-F and ITU v .28 standards. These standards
are for data interchange between a host computer and peripheral at signaling rates up to 20 kbit/s. The switching
speeds of the SN75LPE185 support rates up to 256 kbit/s.
The SN75LPE185 is characterized for operation from 0°C to 70°C.
Application Information
Function Tables
DRIVERS
INPUT
DA
XHZ
HLL
LLH
OpenLL
HOpenL
LOpenH
H = high level, L = low level,
X = irrelevant, Z = high impedance (off)
ENABLEENOUTPUT
section of this data sheet) when the device is powered off,
DY
RECEIVERS
INPUTS
RA1–RA4RA5ENMODERY1–RY4RY5
HHLXLL
LLLXHH
XHHLZL
XLHLZH
XXHHZZ
OpenOpenLXHH
HHLOpenLL
LLLOpenHH
XHHOpenZL
XLHOpenZH
HHOpenXLL
LLOpenXHH
H = high level, L = low level, X = irrelevant, Z = high impedance (off)
ENABLE INPUTSOUTPUTS
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Page 3
functional logic diagram (positive logic)
SN75LPE185
LOW-POWER MULTIPLE RS-232 DRIVERS/RECEIVERS
WITH ENABLE
SLLS256D – DECEMBER 1996 – REVISED OCTOBER 1998
EN
MODE
2
RA1RY1
3
RA2
4
RA3
5
DY1
6
DY2
7
RA4
8
DY3
9
RA5
11
12
23
22
21
20
19
18
17
16
RY2
RY3
DA1
DA2
RY4
DA3
RY5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
Page 4
SN75LPE185
LOW-POWER MULTIPLE RS-232 DRIVERS/RECEIVERS
WITH ENABLE
SLLS256D – DECEMBER 1996 – REVISED OCTOBER 1998
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Positive supply voltage range:V
Negative supply voltage range, V
Receiver input voltage range, V
Driver input voltage range, V
Receiver output voltage range, V
Driver output voltage range, V
Electrostatic discharge, bus pins: Machine model (see Note 2) Class 3, 500 V. . . . . . . . . . . . . . . . . . . . . . . . . .
Electrostatic discharge, all pins: Human-body model (see Note 2) Class 3, 5 kV. . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
Storage temperature range, T
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to network ground terminal unless otherwise noted.
2. Per MIL-STD-883 Method 3015.7
3. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
Supply voltage, VCC (see Note 4)4.7555.25V
Supply voltage, V
Supply voltage, V
High level input voltage, V
Low level input voltage, V
Receiver input voltage range, V
High level output current, I
Low level output current, I
Operating free air temperature, T
NOTE 4: VCC cannot be greater than VDD.
DD
SS
IH
IL
I
OH
OL
A
DA, EN, MODE2V
DA, EN, MODE0.8V
RA–2525V
RY–1mA
RY2mA
91215V
–9–12–15V
070°C
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Page 5
µ
CC
y
CC
minimum V
µ
ormaximumV
OL
µ
DD
y
DD
minimum V
µ
ormaximumV
OL
SS
y
SS
minimum V
OH
µ
OL
V
g
I
,
L
,
V
V
I
,
L
,
V
SN75LPE185
LOW-POWER MULTIPLE RS-232 DRIVERS/RECEIVERS
WITH ENABLE
SLLS256D – DECEMBER 1996 – REVISED OCTOBER 1998
supply currents over the recommended operating conditions (unless otherwise noted)
PARAMETERTEST CONDITIONS
VDD = 9 V, VSS = –9 V, EN at GND,
No load,
SS
All inputs at
or maximum V
No load,
All inputs at
or maximum V
No load,
All inputs at
or maximum V
OH
OH
I
I
I
SS
NOTE 5: Minimum RS-232 driver output voltages are not attained with ±5-V supplies.
Supply current for V
Supply current for V
Supply current for V
See Note 5
VDD = 12 V, VSS = –12 V, EN at GND1000
EN, MODE at V
EN at VCC, MODE at GND700
VDD = 9 V, VSS = –9 V, EN at GND,
See Note 5
VDD = 12 V, VSS = –12 V, EN at GND800
EN, MODE at V
EN at VCC, MODE at GND20
VDD = 9 V, VSS = –9 V, EN at GND,
See Note 5
VDD = 12 V, VSS = –12 V, EN at GND
EN, MODE at V
EN at VCC, MODE at GND–50
CC
CC
CC
MINTYPMAXUNIT
1000
650
800
20
–625
–625
–50
A
A
µA
driver electrical characteristics over the recommended operating conditions (unless otherwise
noted)
PARAMETERTEST CONDITIONS
VDD = 9 V, VSS = –9 V, EN at GND,
OH
OL
I
IH
I
IL
I
OZ
I
OS(H)
I
OS(L)
r
o
NOTES: 5. Minimum RS-232 driver output voltages are not attained with ±5-V supplies.
High-levelV
output voltage
Low-levelV
output voltage
High-level input currentVI at V
Low-level input currentVI at GND–1µA
High-impedance
Short-circuit high-level output currentVO = 0,See Figure 5 and Note 7–20mA
Short-circuit low-level output currentVO = VCC,See Figure 5 and Note 720mA
High-impedance output currentVCC= 0 or 5 V,0.3 V ≤ VO ≤ V
Input resistanceVI = ±3 V to ±25 V357kΩ
IT+
– V
IT–
See Figure 36001100mV
VI = 3 V0.430.61
VI = 25 V3.65.18.3
VI = –3 V–0.43–0.6–1
VI = –25 V–3.6–5.1–8.3
CC
MINTYPMAXUNIT
±100µA
receiver switching characteristics over recommended operating free-air temperature range
(unless otherwise noted)
t
PHL
t
PLH
t
TLH
t
THL
t
SK(P)
t
PZL
t
PZH
t
PLZ
t
PHZ
t
PHL
t
PLH
PARAMETERTEST CONDITIONS
Propagation delay time, high- to low-level output400900
Propagation delay time, low- to high-level output400900
Transition time low- to high-level output200500
Transition time high- to low-level output200400
Pulse skew |t
Receiver output-enable time to low-level output
Receiver output-enable time to high-level output
Receiver output-disable time from low-level output50100
Receiver output-disable time from high-level output50100
Propagation delay time, high- to low-level output (WAKE-UP mode)5001500
Propagation delay time, low- to high-level output (WAKE-UP mode)5001500
PLH
– t
PHL
|
STANDBY mode
CL = 50 pF,
See Figures 4 and 7
MINTYPMAXUNIT
200425ns
50100
50100
µ
µ
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
7
Page 8
SN75LPE185
LOW-POWER MULTIPLE RS-232 DRIVERS/RECEIVERS
WITH ENABLE
SLLS256D – DECEMBER 1996 – REVISED OCTOBER 1998
PARAMETER MEASUREMENT INFORMATION
InputsOutputs
I
I
V
I
V
I
O
O
C
L
R
L
V
I
t
PLH
V
O
50%50%
50%
V
TR–
t
TLH
t
w
V
TR+VTR+
t
50%
V
PHL
TR–
t
THL
3 V
0 V
V
V
OH
OL
NOTES: A. The pulse generator has the following characteristics:
For CL < 1000 pF: tw = 4 µs, PRR = 250 kbit/s, ZO = 50 Ω, tr = tf < 50 ns.
For CL = 2500 pF: tw = 8 µs, PRR = 125 kbit/s, ZO = 50 Ω, tr = tf < 50 ns.
B. CL includes probe and jig capacitance.
Figure 1. Driver Parameter Test Circuit and Waveform
InputsOutputs
I
I
V
I
V
O
Figure 2. Driver IOS Test
InputsOutputs
I
I
V
I
V
V
DD
V
GND
SS
CC
I
O
I
O
V
O
Figure 3. Receiver VIT Test
t
w
InputsOutputs
I
I
V
I
NOTES: A. The pulse generator has the following characteristics: tw = 4 µs, PRR = 250 kbit/s, ZO = 50 Ω, tr = tf < 50 ns.
B. CL includes probe and jig capacitance.
V
I
O
C
L
O
V
I
t
PLH
V
O
50%50%
50%
10%10%
t
TLH
90%90%
t
50%
Figure 4. Receiver Parameter Test Circuit and Waveform
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PHL
t
THL
V
IH
V
IL
V
OH
V
OL
Page 9
SN75LPE185
LOW-POWER MULTIPLE RS-232 DRIVERS/RECEIVERS
WITH ENABLE
SLLS256D – DECEMBER 1996 – REVISED OCTOBER 1998
PARAMETER MEASUREMENT INFORMATION
InputsOutputs
From Output
Under Test
CL = 15 pF
(see Note A)
LOAD CIRCUIT
I
I
V
I
V
I
O
O
V
GND
CC
Figure 5. Receiver IOS Test
3 V
V
R
L
Waveform 1
(see Note B)
Waveform 2
(see Note B)
I
t
PZL
V
O
t
PZH
V
O
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
t
PLZ
50%
t
PHZ
50%
50%50%
VOL + 0.3 V
VOH – 0.3 V
0 V
0 V
V
V
0 V
OL
OH
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, tr = tf < 50 ns.
D. The outputs are measured one at a time with one transition per measurement.
Figure 6. Driver 3-State Parameter Circuit and Voltage Waveforms
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
9
Page 10
SN75LPE185
LOW-POWER MULTIPLE RS-232 DRIVERS/RECEIVERS
WITH ENABLE
SLLS256D – DECEMBER 1996 – REVISED OCTOBER 1998
PARAMETER MEASUREMENT INFORMATION
4 V
From Output
Under Test
CL = 50 pF
(see Note A)
5k Ω
LOAD CIRCUIT
V
I
t
PZL
S1
Open
GND
t
PLZ
50%50%
TESTS1
t
PHL/tPLH
t
PLZ/tPZL
t
PHZ/tPZH
3 V
0 V
Open
4 V
GND
V
Waveform 1
(see Note B)
Waveform 2
(see Note B)
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, tr = tf < 50 ns.
D. The outputs are measured one at a time with one transition per measurement.
O
t
V
O
Figure 7. Receiver 3-State Parameter Test Circuit and Voltage Waveforms
Diodes placed in series with the VDD and VSS leads protect the SN75LPE185 in the fault condition, in which the device
outputs are shorted to ±15 V and the power supplies are at low voltage and provide low-impedance paths to ground.
V
DD
SN75LPE185OutputSN75LPE185Output
V
SS
Figure 8. Power-Supply Protection to Meet Power-Off Fault Conditions of TIA/EIA-232-F
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SN75LPE185
LOW-POWER MULTIPLE RS-232 DRIVERS/RECEIVERS
WITH ENABLE
SLLS256D – DECEMBER 1996 – REVISED OCTOBER 1998
APPLICATION INFORMATION
WAKE-UP mode
While in the WAKE-UP mode, all the drivers and receivers of the SN75LPE185 device are in the high-impedance
state, except for receiver 5, which can be used as a Ring Indicator function. In this mode, the current drawn from
the power supplies is low, to conserve power.
In today’s PCs, board designers are becoming more concerned about power consumption. The flexibility of the
SN75LPE185 during WAKE-UP mode allows the designer to operate the device at auxiliary power-supply
voltages below specified levels. The SN75LPE185 functions properly during WAKE-UP mode, using the
following power-supply conditions:
(a) V
(b) V
(c) V
(d) V
Condition (a) describes the minimum supply voltages necessary for the device to comply fully to specifications.
Conditions (b) and (d) describe the condition where a –5-V supply is not available during auxiliary power. In this
case, V
Condition (c) states V
In all cases, GND is understood to be 0 V, and the power supply voltages should never exceed the absolute
maximum ratings.
must be shorted to the most negative supply (i.e., GND or a voltage source close to, but below GND).
SS
= 4.75 V, VDD = 9 V, and VSS = –9 V (data-sheet specifications)
CC
= 5 V, VDD = 5 V, and VSS = –5 V
CC
= 5 V, VDD = open, and VSS = open
CC
= 5 V, VDD = 5 V, and VSS is shorted to the most negative supply.
CC
and VSS power supplies can be shut off.
DD
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Page 13
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERT AIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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