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SN75LBC241
LOW-POWER LinBiCMOS MULTIPLE DRIVERS AND RECEIVERS
SLLS137E – MA Y 1992 – REVISED JANUAR Y 1999
D
Operates With Single 5-V Power Supply
D
Meets or Exceeds the Requirements of
TIA/EIA-232-F and ITU Recommendation
V.28
D
Improved Performance Replacement for
MAX241
D
Operates at Data Rates up to 100 kbit/s
Over a 3-m Cable
D
Low-Power Shutdown Mode... ≤1 µA Typ
D
LinBiCMOS Process Technology
D
Four Drivers and Five Receivers
D
±30-V Input Levels
D
3-State TTL/CMOS Receiver Outputs
D
±9-V Output Swing With a 5-V Supply
D
Applications
– TIA/EIA-232-F Interface
– Battery-Powered Systems
– Terminals
– Modems
– Computers
D
Package Options Include Plastic
Small-Outline (DW) and Shrink
Small-Outline (DB) Packages
DB OR DW PACKAGE
(TOP VIEW)
TOUT3
TOUT1
TOUT2
RIN2
ROUT2
TIN2
TIN1
ROUT1
RIN1
GND
V
CC
C1+
V
DD
C1–
1
2
3
4
5
6
7
8
9
10
11
12
13
14
TOUT4
28
RIN3
27
ROUT3
26
SHUTDOWN
25
EN
24
RIN4
23
ROUT4
22
21
TIN4
20
TIN3
19
ROUT5
18
RIN5
17
V
SS
16
C2–
15
C2+
description
The SN75LBC241† is a low-power LinBiCMOS line-interface device containing four independent drivers and
five receivers. It is designed as a plug-in replacement for the Maxim MAX241. The SN75LBC241 provides a
capacitive-charge-pump voltage generator to produce RS-232 voltage levels from a 5-V supply. The
charge-pump oscillator frequency is 20 kHz. Each receiver converts RS-232 inputs to 5-V TTL/CMOS levels.
The receivers have a typical threshold of 1.2 V and a typical hysteresis of 0.5 V and can accept ±30-V inputs.
Each driver converts TTL/CMOS input levels into RS-232 levels.
The SN75LBC241 includes a receiver, a 3-state control line, and a low-power shutdown control line. When the
line is high, receiver outputs are placed in the high-impedance state. When EN is low, normal operation is
EN
enabled.
The shutdown mode reduces power dissipation to less than 5 µW typically . In this mode, receiver outputs have
high impedance, driver outputs are turned off, and the charge-pump circuit is turned off. When SHUTDOWN
is high, the shutdown mode is enabled. When SHUTDOWN is low, normal operation is enabled.
This device has been designed to conform to TIA/EIA-232-F and ITU Recommendation V.28.
The SN75LBC241 has been designed using LinBiCMOS technology and cells contained in the Texas
Instruments LinASIC library. Use of LinBiCMOS circuitry increases latch-up immunity in this device over an
all-CMOS design.
The SN75LBC241 is characterized for operation from 0°C to 70°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
†
Patent pending
LinBiCMOS and LinASIC are trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1999, Texas Instruments Incorporated
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SN75LBC241
LOW-POWER LinBiCMOS MULTIPLE DRIVERS AND RECEIVERS
SLLS137E – MA Y 1992 – REVISED JANUAR Y 1999
logic symbol
†
V
CC
11
SHUTDOWN
EN
C1+
C1–
C2+
C2–
RIN1
RIN2
RIN3
RIN4
RIN5
TOUT1
TOUT2
TOUT3
TOUT4
25
24
12
14
15
16
9
4
27
23
18
2
3
1
28
EN2
EN1
CX
CX
CX
CX
2
2
2
2
DRV/RCV
V
V
1,2
1,2
1,2
1,2
1,2
DD
SS
13
17
26
22
19
20
21
8
5
7
6
V
DD
V
SS
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
TIN1
TIN2
TIN3
TIN4
10
GND
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
24
EN
9
RIN1
RIN2
RIN3
RIN4
RIN5
2
4
3
27
1
23
28
TOUT1
TOUT2
TOUT3
TOUT4
26
20
22
21
1918
8
7
5
6
ROUT1
TIN1
ROUT2
TIN2
ROUT3
TIN3
ROUT4
TIN4
ROUT5
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Page 3
High-level input voltage, V
V
External charge-pump capacitor voltage rating
V
SN75LBC241
LOW-POWER LinBiCMOS MULTIPLE DRIVERS AND RECEIVERS
SLLS137E – MA Y 1992 – REVISED JANUAR Y 1999
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Input supply voltage range, V
Positive output supply voltage range, V
Negative output supply voltage range, V
Input voltage range, V
: Driver –0.3 V to VCC + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
Receiver ±30 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, V
O
Short-circuit duration: TOUT Unlimited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to the network ground terminal.
PACKAGE
DB 1348 mW 10.8 mW/°C 862 mW
DW 1603 mW 12.8 mW/°C 1026 mW
(see Note 1) –0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
V
DD
0.3 V to –15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SS
CC
: TOUT VSS – 0.3 V to VDD + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ROUT –0.3 V to V
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
DISSIPATION RATING TABLE
TA ≤ 25°C
POWER RATING
OPERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
– 0.3 V to 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
+ 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
†
recommended operating conditions
MIN NOM MAX UNIT
Supply voltage, V
Low-level input voltage, V
External charge-pump capacitor C1–C4 (see Figure 1) 1 µF
Receiver input voltage, V
Operating free-air temperature, T
CC
p
p
IH
IL
p
p
I
A
TIN 2
EN, SHUTDOWN 2.4
TIN, EN, SHUTDOWN 0.8 V
C1, C3 (see Figure 1) 6.3
C2, C4 (see Figure 1) 16
4.5 5 5.5 V
±30 V
0 70 °C
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SN75LBC241
VOHHigh-level output voltage
V
VOLLow-level output voltage
V
ICCSupply current
LOW-POWER LinBiCMOS MULTIPLE DRIVERS AND RECEIVERS
SLLS137E – MA Y 1992 – REVISED JANUAR Y 1999
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN
p
p
V
V
V
r
i
r
o
I
OS
I
IS
†
All typical values are at VCC = 5 V, TA = 25°C.
‡
The algebraic convention, in which the least positive (most negative) value is designated minimum, is used in this data sheet for logic voltage
levels only.
§
Not more than one output should be shorted at one time.
NOTES: 2. Total IOH drawn from TOUT1, TOUT2, TOUT3, T OUT4, and VDD terminals should not exceed 12 mA.
Receiver positive-going input threshold voltage RIN VCC = 5 V, TA = 25°C 1.7 2.4 V
IT+
Receiver negative-going input threshold voltage RIN VCC = 5 V, TA = 25°C 0.8 1.2 V
IT–
Input hysteresis voltage (V
hys
Receiver input resistance RIN VCC = 5 V, TA = 25°C 3 5 7 kΩ
Output resistance TOUT
Short circuit output current
Short circuit input current TIN VI = 0 200 µA
pp
3. Total IOL drawn from TOUT1, TOUT2, TOUT3, T OUT4, and VSS terminals should not exceed –12 mA.
IT+
§
– V
) RIN VCC = 5 V 0.5 1 V
IT–
TOUT RL = 3 kΩ to GND, See Note 2 5 9
ROUT IOH = –1 mA 3.5
TOUT RL = 3 kΩ to GND, See Note 3
ROUT IOL = 3.2 mA 0.4
VDD = VSS = VCC = 0,
VO = ±2 V
TOUT VCC = 5.5 V, VO = 0 ±10 mA
VCC = 5.5 V, TA = 25°C,
All outputs open
All outputs open, TA = 25°C,
SHUTDOWN high
300 Ω
†
TYP
MAX UNIT
‡
–9
4 8 mA
1 10 mA
–5
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
PLH(R)
t
PHL(R)
t
PZH
t
PZL
t
PHZ
t
PLZ
SR Driver slew rate
SR
Receiver propagation-delay time,
low- to high-level output
Receiver propagation-delay time,
high- to low-level output
Receiver output-enable time to high level See Figure 5 100 ns
Receiver output-enable time to low level See Figure 5 100 ns
Receiver output-disable time from high level See Figure 5 50 ns
Receiver output-disable time from low level See Figure 5 50 ns
Driver transition region slew rate
(tr)
See Figure 2 500 ns
See Figure 2 500 ns
RL = 3 kΩ to 7 kΩ, CL = 2500 pF,
See Figure 4
RL = 3 kΩ to 7 kΩ, CL = 2500 pF,
See Figure 4
30 V/µs
4 6 V/µs
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Page 5
SN75LBC241
LOW-POWER LinBiCMOS MULTIPLE DRIVERS AND RECEIVERS
SLLS137E – MA Y 1992 – REVISED JANUAR Y 1999
APPLICATION INFORMATION
5-V Input
TTL/CMOS
Inputs
1 µF
6.3 V
1 µF
16 V
TIN1
TIN2
TIN3
TIN4
ROUT1
C1
C2
11
12
14
15
16
20
21
C1+
C1–
C2+
C2–
V
CC
400 kΩ
7
V
CC
400 kΩ
6
V
CC
400 kΩ
V
CC
400 kΩ
8
+
+
V
CC
5-V to 10-V
Voltage Doubler
10-V to –10-V
Voltage Inverter
T1
T2
T3
T4
R1
V
DD
V
SS
5 kΩ
13
17
2
3
1
28
9
+
+
C3
1 µF
6.3 V
C4
1 µF
16 V
TOUT1
TOUT2
RS-232
Outputs
TOUT3
TOUT4
RIN1
TTL/CMOS
Outputs
ROUT2
ROUT3
ROUT4
ROUT5
EN
26
22
19
24
5
R2
5 kΩ
R3
5 kΩ
R4
5 kΩ
R5
5 kΩ
10
GND
4
27
23
18
25
Figure 1. Typical Operating Circuit
RIN2
RIN3
RIN4
RIN5
SHUTDOWN
RS-232
Inputs
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SN75LBC241
LOW-POWER LinBiCMOS MULTIPLE DRIVERS AND RECEIVERS
SLLS137E – MA Y 1992 – REVISED JANUAR Y 1999
PARAMETER MEASUREMENT INFORMATION
V
CC
RL = 1.3 kΩ
Generator
(see Note A)
NOTES: A. The pulse generator has the following characteristics: ZO = 50 Ω, duty cycle ≤ 50%.
B. CL includes probe and jig capacitance.
C. All diodes are 1N3064 or equivalent.
RIN
TEST CIRCUIT VOLTAGE WAVEFORMS
ROUT
See Note C
CL = 50 pF
(see Note B)
Input
Output
10% 10%
t
PHL(R)
50% 50%
500 ns
≤10 ns≤10 ns
t
PLH(R)
3 V
0 V
V
V
OH
OL
90%90%
1.5 V1.5 V
Figure 2. Receiver Test Circuit and Waveforms for t
Input
Generator
(see Note A)
NOTES: A. The pulse generator has the following characteristics: ZO = 50 Ω, duty cycle ≤ 50%.
B. CL includes probe and jig capacitance.
TIN
TEST CIRCUIT VOLTAGE WAVEFORMS
Figure 3. Driver Test Circuit and Waveforms for t
Generator
(see Note A)
TEST CIRCUIT
NOTES: A. The pulse generator has the following characteristics: ZO = 50 Ω, duty cycle ≤ 50%.
B. CL includes probe and jig capacitance.
TOUT
R
L
R
L
RS-232
Output
CL = 10 pF
(see Note B)
RS-232
Output
C
L
(see Note B)
SR
Output
and t
PHL
Input
Output
6V
+
t
or t
THL
TLH
and t
PHL
10% 10%
t
PHL
t
THL
90%
Measurement (5-µs Input)
PLH
10% 10%
t
THL
VOLTAGE WAVEFORMS
Measurement
PLH
≤10 ns≤10 ns
5 µs
20 µs
90%90%
t
PLH
90%
10%
≤10 ns≤10 ns
90%90%
–3 V
50% 50%
10%
1.5 V 1.5 V
3 V 3 V
–3 V
t
TLH
t
TLH
3 V
0 V
V
V
3 V
0 V
V
V
OH
OL
OH
OL
Figure 4. Test Circuit and Waveforms for t
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THL
and t
Measurement (20-µs Input)
TLH
Page 7
SN75LBC241
LOW-POWER LinBiCMOS MULTIPLE DRIVERS AND RECEIVERS
SLLS137E – MA Y 1992 – REVISED JANUAR Y 1999
PARAMETER MEASUREMENT INFORMATION
3 V
EN
0 V
t
PZH
3.5 V
0.8 V
Generator
(see Note A)
RIN ROUT
RL = 1 kΩ
2.5 V
t
PZL
CL = 150 pF
(see Note B)
TEST CIRCUIT
NOTES: A. The pulse generator has the following characteristics: ZO = 50 Ω, duty cycle ≤ 50%.
B. CL includes probe and jig capacitance.
EN
Figure 5. Receiver Output Enable and Disable Timing
t
PHZ
VOH – 0.1 V
VOL + 0.1 V
t
PLZ
3 V
0 V
2.5 V
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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IMPORTANT NOTICE
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any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERT AIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1999, Texas Instruments Incorporated
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