The SN75436 and SN75437A quadruple
peripheral drivers are designed for use in systems
requiring high current, high voltage, and high load
power. Each device features four inverting
open-collector outputs with a common-enable
input that, when taken low, disables all four
outputs. The envelope of 1-V characteristics
exceeds the specifications sufficiently to avoid
high-current latch-up. Applications include driving
relays, lamps, solenoids, motors, LEDs,
transmission lines, hammers, and other highpower-demand devices.
NE PACKAGE
(TOP VIEW)
1Y
1
1,2 D
HEAT SINK
AND GND
3,4 D
logic symbol
G
1A
2A
3A
4A
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC publication 617-12.
†
14
16
15
10
9
2Y
3Y
4Y
EN
2
3
4
5
6
7
8
CLAMP
16
15
14
13
12
11
10
9
1A
2A
G
HEAT SINK
AND GND
V
CC
3A
4A
1
3
2
6
8
7
1Y
2Y
1,2 D
3Y
4Y
3,4 D
The SN75436 and SN75437A are offered in a
16-pin wide-body surface-mount (NE) package
and is characterized for operation over the free-air
temperature of 0°C to 70°C.
FUNCTION TABLE
(each NAND driver)
INPUTSOUTPUT
AGY
HHL
LXH
XLH
H = high level, L = low level,
X = irrelevant
SELECTION GUIDE
FEATURESN75436SN75437AUNIT
Maximum recommended output current0.50.5A
Maximum VOL at maximum I
Maximum recommended output supply
voltage in an inductive switching circuit, V
OL
0.50.5V
S
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1995, Texas Instruments Incorporated
3–1
Page 2
SN75436, SN75437A
PARAMETER
UNIT
Output suppl
oltage in inductive switching circuit (see Figure 2), V
5035V
QUADRUPLE PERIPHERAL DRIVERS
SLRS019A – DECMEBER 1986 – REVISED OCT OBER 1995
logic diagram (positive logic, each driver)equivalent schematic of each input
V
A
CC
Enable
G
To Three
Other Drivers
To One
Other Driver
absolute maximum ratings over operating temperature range (unless otherwise noted)
CCL
All typical values are at VCC = 5 V, TA = 25°C.
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
Propagation delay time, low-to-high-level output19505000ns
PLH
Propagation delay time, high-to-low-level output
PHL
Transition time, low-to-high-level output
TLH
Transition time, high-to-low-level output36ns
THL
p
= 4.75 V,
VIH = 2 V
V
= 4.75 V, V
VIL = 0.8 V,
C
= 30 pF,R
See Figure 1
V
= 50 V,I
RL = 100 Ω,
V
= 35 V,I
RL = 70 Ω,
IOL = 250 mA0.140.25
IOL = 500 mA0.280.5
= 2 V,
VOH = 70 V
= 60 Ω,
≈ 500 mA,
See Figure 2
≈ 500 mA,
See Figure 2
–
S
–
S
150500ns
40ns
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3–3
Page 4
SN75436, SN75437A
H
QUADRUPLE PERIPHERAL DRIVERS
SLRS019A – DECMEBER 1986 – REVISED OCT OBER 1995
PARAMETER MEASUREMENT INFORMATION
Open
30 V
RL = 60 Ω
CL = 30 pF
(see Note B)
Input
10%
Output
90%
Output
Input
Pulse
Generator
(see Note A)
NOTES: A. The pulse generator has the following characteristics: PRR = 100 kHz, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
2.4 V
A/G
G/A
V
CC
Circuit
Under
Test
TEST CIRCUITVOLTAGE WAVEFORMS
Figure 1. Test Circuit and Voltage Waveforms
V
S
Input
Pulse
Generator
(see Note A)
2.4 V
5 V
A
Circuit
Under
G
Test
GND SUB
TEST CIRCUIT
2 mH
R
L
Output
CL = 15 pF
(see Note B)
Input
1.5 V
10%10%
Output
90%90%
≤ 5 ns≤ 10 ns
VOLTAGE WAVEFORMS
90%
1.5 V
≤ 5 ns
t
PHL
50%
10%
5 µs
t
THL
40 µs
90%
1.5 V
50%
10%
10%
1.5 V
≤ 10 ns
t
PLH
90%
t
TLH
3 V
0 V
V
V
3 V
0 V
V
V
O
OL
OH
OL
NOTES: A. The pulse generator has the following characteristics: PRR = 12.5 kHz, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 2. Latch-Up Test Circuit and Voltage Waveforms
3–4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Page 5
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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